A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Add QDSS IPA bam connection config for sdxlemur"

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qctecmdr 2021-04-16 06:46:56 -07:00 • committed by Gerrit - the friendly Code Review server
commit f2d69eee1c
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3
bindings/arm/coresight.txt
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@ -151,6 +151,9 @@ its hardware characteristcs.
* cti-flush-trig-num: Specifies the flush CTI trigger number for TMC
ETR and TMC ETF.
* qcom,qdss-ipa-support : indicates whether qdss to ipa bam connection
need to support.
* Optional property for CATU and APSS :
* interrupts : Exactly one SPI may be listed for reporting the address
error for CATU and four interrupts for TGU to get trigger from four

7
qcom/sdxlemur-coresight.dtsi
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@ -148,6 +148,13 @@
arm,buffer-size = <0x400000>;
arm,scatter-gather;
qcom,qdss-ipa-support;
ipa-conn-data-base-pa = <0x1468B000>;
ipa-conn-data-size = <0x3000>;
ipa-conn-desc-base-pa = <0x1468E000>;
ipa-conn-desc-size = <0x1000>;
ipa-peer-evt-reg-pa = <0x6077818>;
coresight-name = "coresight-tmc-etr";
coresight-ctis = <&cti0 &cti3_swao>;
cti-reset-trig-num = <0>;