Commit graph

858,472 commits

Author SHA1 Message Date
qctecmdr
14b5a2da73 Merge "ion: msm: Correct memory-region of_node reference counting" 2019-09-26 11:14:33 -07:00
qctecmdr
1aea860783 Merge "Revert "staging: android: ion: Use the MSM dmabuf ops when possible"" 2019-09-26 10:38:24 -07:00
qctecmdr
4f857060ef Merge "ion: msm: Update the heap IDs as per the ION core standards" 2019-09-26 10:03:02 -07:00
qctecmdr
306f178df8 Merge "msm: ipa3: remove ipa3_ctx access from wan driver and qmi service" 2019-09-26 09:16:12 -07:00
qctecmdr
f2b18e2809 Merge "include: dt-bindings: ion: Add header for the MSM ION heap IDs" 2019-09-26 08:47:42 -07:00
qctecmdr
af4a510da5 Merge "ion: msm: Define heap IDs as constants in their own file" 2019-09-26 08:08:29 -07:00
qctecmdr
95a9b89382 Merge "clk: qcom: clk-alpha-pll: Add support for controlling Lucid5lpe PLLs" 2019-09-25 08:02:45 -07:00
qctecmdr
a178938446 Merge "drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs" 2019-09-25 08:02:45 -07:00
Michael Adisumarta
75cf0024f4 msm: ipa3: remove ipa3_ctx access from wan driver and qmi service
Access ipa3_ctx through ipa_utils.c instead of direct access
which is prohibited.

Change-Id: I1682037cf845d3d8553966551410ff5e8a833f84
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-09-25 01:25:46 -07:00
Michael Adisumarta
8386504ae8 msm: ipa: add additional checks to prevent use-after free errors
Adding a function to check for dangling pointer using IPA IDR structure
to avoid use after free error.

Change-Id: I0bd3d733bf10403366abc643f89c3e5c5e6228e9
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-09-24 16:36:17 -07:00
Isaac J. Manjarres
38a894b463 ion: msm: Correct memory-region of_node reference counting
of_parse_phandle() is used to deduce if a memory region is
associated with a particular device. The call to of_parse_phandle()
internally increments the reference count to the memory region's
of_node, and thus, the caller should reverse that action by
decrementing it via a call to of_node_put().

Change-Id: I80a0ed843312229f277c09fe107e407118a0a473
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:40 -07:00
Isaac J. Manjarres
b11b966555 ion: msm: Prevent log-spam from ION dmabuf mmap failures
Use rate-limited prints when an ION buffer should not be
mapped to userspace. This prevents the kernel logs from being
flooded by failures triggered by continuous userspace requests
to map a buffer that should not be mapped to it.

Change-Id: I5f4a1bc1fab7424588e68a55cb18aa28e969841c
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:40 -07:00
Isaac J. Manjarres
2e94d4453b Revert "staging: android: ion: Use the MSM dmabuf ops when possible"
This reverts commit b0cbb06dd1.
This commit is no longer needed, since the ION core now allows
for dmabuf ops to be overridable.

Change-Id: I32def4db2d7de97f465a82531367c78eeae8a4a1
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:39 -07:00
Isaac J. Manjarres
a641971d26 ion: Update the heaps to use the MSM ION dmabuf ops for CMO
Since the dmabuf portion of the ION core now allows for heaps
to specify their own dmabuf ops for cache maintenance, update
the heaps so that they specify the MSM ION dmabuf ops.

Change-Id: I98d9f2fa3e3ab8288e481c72e18e5d2f14a8a400
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:39 -07:00
Isaac J. Manjarres
18fe521583 ion: msm: Update the heap IDs as per the ION core standards
Update the heap IDs as per the standard imposed by the ION
core (i.e.):

SYSTEM_HEAP: (1 << 0)
SYSTEM_CONTIG_HEAP: (1 << 1)
CARVEOUT_HEAPS: [(1 << 2), (1 << 6)]
CHUNK_HEAP: (1 << 7)
CMA_HEAPS: [(1 << 8), (1 << 15)]
VENDOR_HEAPS: [(1 << 16), (1 << 31)]

Since the heap IDs are now bitmasks, as opposed to offsets
within a bitmask, update the userspace ION_HEAP() macro/as
well as the heap ID treatment in the kernel to account for
this as well.

Change-Id: I6b7ca1caf89dda03dfb499a362db863168c2753c
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:38 -07:00
Isaac J. Manjarres
33bf5566ad include: dt-bindings: ion: Add header for the MSM ION heap IDs
Add a reference to the MSM ION heap ID header as part of the
dt-bindings headers, so that the device-tree can reference
the heap IDs via the defined macros.

Change-Id: I7fd7e45e8a61908b037a421b08f4ba8b4ddebfbf
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:38 -07:00
Isaac J. Manjarres
5baf1404c7 ion: msm: Define heap IDs as constants in their own file
The ION heap IDs are also needed by the device-tree to
provide the kernel with the heap ID for the heap that
a device-tree entry describes. Currently, these IDs are
hard-coded, which can be error-prone when updating the
heap IDs.

Thus, create a header that can also be accessed by the
device-tree and userspace, and move the heap IDs to that
header. This makes it so that the device-tree can now use
the constants defined in the header, instead of hard-coded
IDs, making updates significantly easier.

Change-Id: I58b1aae9924504f2b20e159b9be8da7a2ee8d248
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:29 -07:00
qctecmdr
03bcb3cbf0 Merge "ion: msm: Relocate MSM ION header directly to include/uapi/linux" 2019-09-24 12:23:30 -07:00
qctecmdr
04df73fc45 Merge "iommu/arm-smmu: Mask TLBI address correctly" 2019-09-24 11:38:33 -07:00
Vivek Aknurwar
610636dbb8 clk: qcom: clk-alpha-pll: Add support for controlling Lucid5lpe PLLs
Add programming sequence support for managing the Lucid 5lpe
PLLs.

Change-Id: Ib15da038c5c2904487d5eac31384cbf3310daf83
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-09-24 11:31:09 -07:00
Lina Iyer
5155a9bc8a drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs
Introduce a new domain for wakeup capable GPIOs. The domain can be
requested using the bus token DOMAIN_BUS_WAKEUP. In the following
patches, we will specify PDC as the wakeup-parent for the TLMM GPIO
irqchip. Requesting a wakeup GPIO will setup the GPIO and the
corresponding PDC interrupt as its parent.

Change-Id: I13b206773e5f04452eed87ad1490da50b034ac4c
Co-developed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
2019-09-24 10:39:20 -06:00
qctecmdr
9fbdb30f29 Merge "msm: ipa: remove unneeded files" 2019-09-24 08:56:21 -07:00
Michael Adisumarta
e4ea599a9a msm: ipa: Enable qmi send request to remove last connection
Change the if condition to be inclusive to allow remove_offload
ioctl to send the rmv_offload_request through qmi on the last
connection.

Change-Id: I6eec7799fd1a76ab168bc588b3e9c74dbfd215fd
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-09-23 15:56:10 -07:00
Bojun Pan
91c832801c msm: ipa: remove unneeded files
Remove code check-in not belonging to IPA driver.

Change-Id: I6f79d72d054c7c3b9d5448ae83150d5afaedacff
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-09-23 13:49:40 -07:00
Robin Murphy
367d9d7d5f iommu/arm-smmu: Mask TLBI address correctly
The less said about "~12UL" the better. Oh dear.

We get away with it due to calling constraints that mean IOVAs are
implicitly at least page-aligned to begin with, but still; oh dear.

Change-Id: I8e4ed0ccc1aae76988449895e6f7a9944d429af6
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Git-commit: 353b325047
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 11:49:47 -07:00
Isaac J. Manjarres
5d45437535 ion: msm: Relocate MSM ION header directly to include/uapi/linux
Instead of using a symlink to point to the MSM ION header,
place it directly in the include/uapi/linux path.

Change-Id: Id2a91adb4bdfc2c03e8eb535882734603ccd0f94
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 09:47:34 -07:00
Isaac J. Manjarres
436d1f81a7 ion: Fail system secure heap creation if system heap is unavailable
The system secure heap relies on the existence of the system
heap. Thus, if the system heap is not available, do not create,
the system secure heap.

Change-Id: I7a99e0fda45ae02ed6e5c8a797d29e917e84f182
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 09:47:34 -07:00
Bojun Pan
2a54c015b8 msm: ipa: Fix KW P1 issue
KW tool detect the potential NULL access and buffer
index overflow issue.
The change is to add the proper handle for NULL response
and prevent buffer index overflow.

Change-Id: I0bb1b45ba6e5b0abe6c3539d451f74e19028737c
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-09-21 14:04:45 -07:00
qctecmdr
398c93fd7f Merge "msm: ipa: Fix accessing coal registers when clock is off" 2019-09-21 02:15:49 -07:00
qctecmdr
a6ae3f7c81 Merge "msm:ipa : enable HOLB drop timeout on MHIP producer channels" 2019-09-21 01:47:47 -07:00
qctecmdr
4cf35aac0a Merge "msm: ipa3: Fix to memory allocation failure" 2019-09-21 01:47:46 -07:00
Michael Adisumarta
a9351cb436 msm:ipa : enable HOLB drop timeout on MHIP producer channels
This fix enables HOLB drop timeout for MHIP TX channels which will
cause IPA to drop the packets if the packet is not processed within
the timeout. This will help relieve the back pressure on MHIP Producer
channels.

Change-Id: I607ebb460c970ccbcce2f0e364ff22e0222ded03
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-09-21 00:40:19 -07:00
Chaitanya Pratapa
551c0d6b73 msm: ipa: Fix accessing coal registers when clock is off
There is a possibility to access coal registers when the clock
is off which results in unknown behavior. Make changes to ensure
clock is on when accessing coal registers.

Change-Id: Ia13841c5543798cb47ed6953a5c714e7426cb180
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-09-21 00:33:49 -07:00
Pooja Kumari
abbd9ae583 msm: ipa3: Fix to memory allocation failure
During device reboot when IPA is going for shutdown,
the allocation for memory request fails.  Add change in
IPA to not sleep while memory allocation.

Change-Id: I0bdbf0f622770566ad1135c76f6edc2790285420
Signed-off-by: Pooja Kumari <kumarip@codeaurora.org>
2019-09-21 00:32:48 -07:00
Bojun Pan
eaacc9c707 msm: ipa: Decrease refcount of the pages held in cache before freeing
While freeing the buffers in the transfer ring, the ref_count of the
pages that were allocated from the sys->repl->cache have to be
decremented explicitly to ensure there is no memory leak.

Change-Id: Ie853bf15f084f503e8818d46c72671dbb9ddad7b
Acked-by: Priyadarshini Rajagopal <prajagop@qti.qualcomm.com>
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-09-21 00:19:31 -07:00
Bojun Pan
5398ee57fd msm: ipa: Fix race condition between timer expiry for wq and pipe teardown
db_timer expires after wq has been flushed in ipa3_teardown_sys_pipe.
This causes the wq to be scheduled after pipe teardown.

Add workqueue_flushed flag which set after the wq is flushed during
teardown. This flag is checked against in the wq function to ensure
it is not executed once the wq has been flushed.

Change-Id: I176a3a6dbf25985a41decf008ad045647081b871
Acked-by: Priyadarshini Rajagopal <prajagop@qti.qualcomm.com>
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-09-20 18:22:23 -07:00
qctecmdr
2388afd39a Merge "driver: pinctrl: Add reserved GPIOs for Lahaina" 2019-09-20 17:23:19 -07:00
qctecmdr
7afe38e4e1 Merge "msm: ipa: Fix the double unmap page recycling cleanup on ssr" 2019-09-20 17:23:18 -07:00
qctecmdr
fd00f25c7c Merge "msm: ipa: Enable USB DPL end point" 2019-09-20 16:47:21 -07:00
qctecmdr
ee3d766697 Merge "drivers: llcc-lahaina: Update the SCT table for MMUHWT" 2019-09-20 16:47:21 -07:00
qctecmdr
c62f857eb4 Merge "soc: qcom: qmi_interface: Add new error enum" 2019-09-20 16:17:31 -07:00
qctecmdr
0adbcf1121 Merge "soc: qcom: pil: Correct memory-region of_node reference counting" 2019-09-20 15:47:13 -07:00
qctecmdr
93ac3b0be5 Merge "msm: ipa4: Fix to update the polling mode for coalescing channel" 2019-09-20 15:47:12 -07:00
qctecmdr
1d1b326bd3 Merge "drivers: irqchip: pdc: Do not toggle IRQ_ENABLE during mask/unmask" 2019-09-20 14:41:20 -07:00
qctecmdr
d6f15eb2c7 Merge "coresight: Add snapshot of Coresight hwevent driver" 2019-09-20 14:11:24 -07:00
qctecmdr
7b03e7d3ba Merge "coresight: Add snapshot of Coresight dummy driver" 2019-09-20 13:39:26 -07:00
Mohammed Javid
1cfaac4aac msm: ipa: Enable USB DPL end point
Enable USB-DPL ep on MHI configuration
which was missed.

Change-Id: I881696d0fb383e7644670e7c2940022433069a8c
Signed-off-by: Mohammed Javid <mjavid@codeaurora.org>
2019-09-20 18:19:11 +05:30
Raghavendra Rao Ananta
9b8214e062 drivers: llcc-lahaina: Update the SCT table for MMUHWT
Update the bonus ways for the MMUHWT entry of the SCT table
as per the new configuration.

Change-Id: I144290b7b0c1e5781842d1034d5084566a180df6
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2019-09-19 14:00:34 -07:00
Chris Lew
55c3cc7de5 soc: qcom: qmi_interface: Add new error enum
Add enum for QMI_ERR_DISABLED_V01 for clients to use in the kernel.
Previously, this error enum was not used by any client but the service
registry service has updated to use this enum.

Change-Id: I955b3d6f1acf2e5cfb2627323f6b0662810834ae
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-09-19 11:09:55 -07:00
Ashok Vuyyuru
8685133563 msm: ipa4: Fix to update the polling mode for coalescing channel
When default wan consumer pipe polling mode was changed, not updating
the polling mode for coalescing pipe. As both the pipes are sharing
a common event ring because of that observing warning logs, it was
leading to watchdog bite. Add changes to update the polling mode
for coalescing channel when wan default pipe polling mode changed.

Change-Id: I8630c9866cb7925d21ff7fd9dc68fcb03a98cbc5
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2019-09-19 08:46:38 -07:00