Commit graph

903,735 commits

Author SHA1 Message Date
qctecmdr
27c59eee88 Merge "Bluetooth: Add format specifier" 2021-10-29 17:16:56 -07:00
qctecmdr
14ce2c67d6 Merge "cnss2: Update bound checks for sbl reg dumps to SRAM mem range" 2021-10-29 17:16:56 -07:00
qctecmdr
6797d3ad33 Merge "events: Reuse value read using READ_ONCE instead of re-reading it" 2021-10-29 08:18:32 -07:00
qctecmdr
9503f53c47 Merge "Revert "pci:switch: Implement PM ops for QPS615 support"" 2021-10-28 21:16:57 -07:00
qctecmdr
5759de5ab4 Merge "Revert "config: sdxlemur: enable Switch driver"" 2021-10-28 21:16:57 -07:00
Balakrishna Godavarthi
37ae7bd9b4 Bluetooth: Add format specifier
This patch adds format specifier corresponding to arguments
passed to print debug logs.

Change-Id: Iff586dd827037cca3419e1c3c9822d2637ef94aa
Signed-off-by: Balakrishna Godavarthi <bgodavar@codeaurora.org>
2021-10-28 06:59:18 -07:00
qctecmdr
d12c787a66 Merge "mtd: msm_qpic_nand: register msm_nand to panic_notifier" 2021-10-28 00:48:56 -07:00
Baptiste Lepers
dadc47f87a events: Reuse value read using READ_ONCE instead of re-reading it
In perf_event_addr_filters_apply, the task associated with
the event (event->ctx->task) is read using READ_ONCE at the beginning
of the function checked and then re read from event->ctx->task,
voiding all guarantees of the checks. Reuse the value that was read by
READ_ONCE to ensure the consistency of the task struct throughout the
function.

Fixes: 375637bc52 ("perf/core: Introduce address range filtering")
Change-Id: Ia4f6161cfc2c95073aeaff85936efa737508c5a2
Signed-off-by: Baptiste Lepers <baptiste.lepers@xxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Link: https://lkml.kernel.org/r/20210906015310.12802-1-baptiste.lepers@xxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
Signed-off-by: Baptiste Lepers <baptiste.lepers@xxxxxxxxx>
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
Git-commit: b89a05b21f46150ac10a962aa50109250b56b03b
Signed-off-by: Kishor Krishna Bhat <kishkris@codeaurora.org>
2021-10-28 00:12:49 -07:00
qctecmdr
8aafd51f3a Merge "msm: ipa: macro to determine consolidated stats structure" 2021-10-27 19:05:45 -07:00
qctecmdr
8130739446 Merge "msm: ipa: move definition of IPA_ETH_API_VER" 2021-10-27 08:41:29 -07:00
Subramanian Ananthanarayanan
3d5af28181 Revert "config: sdxlemur: enable Switch driver"
This reverts commit d898a71fd7.

Change-Id: Ie7e791c7825f07fc98a304c7f16821aefba7914e
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
2021-10-27 04:09:17 -07:00
qctecmdr
766fca0d8f Merge "usb: dwc3: Add support to enable best fit algorithm" 2021-10-26 18:21:39 -07:00
qctecmdr
40075faa5b Merge "msm_rmnet.h: Add new ioctls for rmnet to reg/unreg for notification" 2021-10-26 03:14:01 -07:00
qctecmdr
e1be2792f0 Merge "msm: kgsl: Allow concurrent requests for oob_perfcntr" 2021-10-26 03:14:01 -07:00
qctecmdr
8579e19a94 Merge "ANDROID: mm: use raw seqcount variants in vm_write_*" 2021-10-26 03:14:00 -07:00
Michael Adisumarta
e8b9cba55e msm: ipa: move definition of IPA_ETH_API_VER
Move definition of IPA_ETH_API_VER to msm_ipa.h so it
can be accessed by IPACM and other user space modules.

Change-Id: Ib4dafe1db310b352bbbb08018fc9e63c398cb09a
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2021-10-25 12:23:44 -07:00
Elson Roy Serrao
29fa6d3d55 usb: dwc3: Add support to enable best fit algorithm
This change adds the needed support to enable best fit algorithm
for iova allocation. Best fit algorithm helps in reducing fragmentation
and thus utilizing the iova address space more efficiently.

Change-Id: Icaa9bf1db534eba75c1b5724b6210240e4e6faef
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
2021-10-25 09:39:12 -07:00
qctecmdr
4c90589e66 Merge "dmabuf: fix use-after-free of dmabuf's file->f_inode" 2021-10-24 22:47:10 -07:00
qctecmdr
019228e12c Merge "icnss2: Fix incomplete fw_build_id in IPC logs" 2021-10-22 04:59:48 -07:00
Pradeep P V K
63ef97004c mtd: msm_qpic_nand: register msm_nand to panic_notifier
Register msm_nand to panic notifiers list to dump apss
qpic bam registers information during any subsytem failures.

Change-Id: If717d063b41dc8e75b707574e4f703ea4b41da65
Signed-off-by: Pradeep P V K <pragalla@codeaurora.org>
2021-10-22 04:50:30 -07:00
Vinayak Menon
f2c1ef71ed ANDROID: mm: use raw seqcount variants in vm_write_*
write_seqcount_begin expects to be called from a non-preemptible
context to avoid preemption by a read section that can spin due
to an odd value. But the readers of vm_sequence never retries and
thus writers need not disable preemption. Use the non-lockdep
variant as lockdep checks are now in-built to write_seqcount_begin.

Bug: 161210518
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
Change-Id: If4f0cddd7f0a79136495060d4acc1702abb46817
Git-commit: c9201630e8a53106406516ba40862e637c324480
Git-repo: https://android.googlesource.com/kernel/common/
Signed-off-by: Srinivasarao Pathipati <quic_spathi@quicinc.com>
2021-10-22 00:11:57 -07:00
Naman Padhiar
6d1ea40ef8 icnss2: Fix incomplete fw_build_id in IPC logs
Fix incomplete fw_build_id in IPC logging due to MAX
character limit. Cleaned up in debug code.

Change-Id: Ia0f104158645e27f774d9598883cfcd8ec765d3c
Signed-off-by: Naman Padhiar <quic_npadhiar@quicinc.com>
2021-10-22 09:39:06 +05:30
qctecmdr
54ae581cdd Merge "FROMLIST: dm-verity: skip verity_handle_error on I/O errors" 2021-10-21 19:19:23 -07:00
qctecmdr
5d183f1f81 Merge "haven: hh_rm_core: Check payload size in hh_rm_init_connection_buff()" 2021-10-21 08:39:55 -07:00
qctecmdr
8ce8709c4f Merge "f_gsi: Increase MBIM IN aggregation to 31KB" 2021-10-21 08:39:54 -07:00
qctecmdr
b298073d4d Merge "Config: arm: disable sched_debug for sdxlemur" 2021-10-21 08:23:15 -07:00
Michael Adisumarta
833f1ea3b0 msm_rmnet.h: Add new ioctls for rmnet to reg/unreg for notification
Add new ioctls for rmnet to reg/unreg for yellow water mark hit
notifications.

Change-Id: Ib1162213e8fc463efaaa1149330e889110dc3dab
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2021-10-20 11:19:39 -07:00
Subramanian Ananthanarayanan
873b6ae5f4 Revert "pci:switch: Implement PM ops for QPS615 support"
This reverts commit f9c8d6dd2b.

Change-Id: I98da9ef48ce30cb0363025c14a72564c29e47861
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
2021-10-20 21:27:37 +05:30
Subramanian Ananthanarayanan
c89d4e16c8 pci:msm: Implement SUSPEND LATE for switch support
Changes are to save and restore PCI switch config space as part
of suspend late using framework support.

Framework does save and resore post suspend and prior to suspend
late, hence this change is important for switch.

Change-Id: I1aa06ad43d647fb8deb8cf15903c91d43344553c
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
2021-10-20 21:23:04 +05:30
Jagadeesh Kona
08faf9323c clk: qcom: clk-rcg2: Update logic to calculate D value for RCG
The current implementation does not check for D value is within
the accepted range for a given M & N value. Update the logic to
calculate the final D value based on the range. While at it, add
support for 2/3 divider in frac_table_pixel.

Change-Id: Ia42b9197de6d594129b1a48106f8e5a2be70a1c6
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2021-10-19 22:48:14 -07:00
Michael Adisumarta
1a01232af2 msm: ipa: macro to determine consolidated stats structure
Macro for detecting consolidated stats structure mismatch
between ipa_lnx_agent and IPA stats module.

Change-Id: I5322d432710a798305b6943a0e4b379880eabab9
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2021-10-19 12:08:19 -07:00
Mayank Rana
5960c9eff7 f_gsi: Increase MBIM IN aggregation to 31KB
This change increases MBIM IN aggregation and related TRB buffer size
from 16KB to 31KB. With this aggregation change, DL throughput is
increased form 4.2 Gbps to 4.7 Gbps. Also reduced OUT buffer size from
31KB to 16 KB (i.e. as equal to size of OUT aggregation).

Change-Id: Ida6444536f27f385034fefc71e663d7b7ce5626f
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
2021-10-19 11:28:29 -07:00
qctecmdr
c0674405ba Merge "PM / EM: Fix debugfs entry creation" 2021-10-19 09:03:33 -07:00
qctecmdr
495e1d771e Merge "msm: mhi: Handle PCIe events from the common work queue" 2021-10-19 09:03:32 -07:00
Jianmin Zhu
53fbd72999 Config: arm: disable sched_debug for sdxlemur
CONFIG_SCHED_DEBUG maintains scheduler statistic debug information
and can accessed the data dynamically.
On user builds, its not needed to enable debug related information,
so disable the scheduler debug.
It can improve system performance and network throughput too.

Change-Id: Ic0ca28d49210266fc5931979cde7f72a5c421e79
CRs-Fixed: 3048893
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
Signed-off-by: Jianmin Zhu <jianminz@codeaurora.org>
2021-10-19 21:02:37 +08:00
Mohammed Siddiq
a4946b539b cnss2: Update bound checks for sbl reg dumps to SRAM mem range
Add code to update the bound checks for sbl reg dumps to SRAM mem
range. Due to a firmware update, the sbl start address was moved
and the bound checks to dumps sbl reg failed. Update the bound
checks to SRAM mem range, so that any future update in firmware
would not impact SRAM dumps.

Change-Id: I28026f03fe1f44f2ba6ff7f903dcb98543f8847c
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
2021-10-19 16:53:13 +05:30
Srinivasarao Pathipati
e404838e08 haven: hh_rm_core: Check payload size in hh_rm_init_connection_buff()
Ensure that the payload being copied to the connection's recv_buff
buffer does not exceed the buffer's maximum size.

Change-Id: Ic0e0b894e7746430916b24f45e583822ccea2748
Signed-off-by: Srinivasarao Pathipati <quic_spathi@quicinc.com>
2021-10-19 15:38:42 +05:30
Lingutla Chandrasekhar
362ed223ec PM / EM: Fix debugfs entry creation
recent changes in debugfs dont allow to create directories till fs_init
call level, but some cpu clock drivers populate OPP table in prior init
call levels, the energy model debugfs population called from the OPP
framework, before debugfs initialization. This breaks energy model
population in debugfs.

Fix it by not allowing energy model population prior to debugfs init call,
and populate debugfs entries, if power domains already created.

Change-Id: I2fb747b2c033fa83d362fea1ff815a628448b00f
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
Signed-off-by: Srinivasarao Pathipati <quic_spathi@quicinc.com>
2021-10-19 14:09:01 +05:30
Akilesh Kailash
de6b7708bf FROMLIST: dm-verity: skip verity_handle_error on I/O errors
If there is an I/O error and FEC correction fails, return
an error instead of calling verity_handle_error().

Suggested-by: Sami Tolvanen <samitolvanen@google.com>
Signed-off-by: Akilesh Kailash <akailash@google.com>.

Bug: 197830746
Change-Id: Ie0f79b4dced50ce35904f8e63216d8d251f6caa8
Patch-mainline: lkml @ 	Mon, 13 Sep 2021 09:26
Signed-off-by: Sachin Grover <sgrover@codeaurora.org>
2021-10-18 23:53:53 -07:00
qctecmdr
98d84ff1d6 Merge "Merge android11-5.4.134+ (2385b6c) into msm-5.4" 2021-10-18 09:23:31 -07:00
qctecmdr
b36c4dba6e Merge "msm: kgsl: Enable ACD feature for A643 GPU" 2021-10-17 23:09:49 -07:00
Pranav Patel
da19547ce8 msm: kgsl: Allow concurrent requests for oob_perfcntr
Currently we directly send all oob requests to gmu. This
creates timeout waiting for ack when a thread attempts
to do oob set for oob_perfcntr while it was already set
by another thread because gmu firmware does not send ack
to second thread. Add and a counter inside device mutex's
protection for oob_perfcntr requests so that we only send
first oob set and last oob clear requests to gmu.

Change-Id: I702e9f1c45ec5dd9a24822300a7810dd390f1c7e
Signed-off-by: Pranav Patel <pranavp@codeaurora.org>
2021-10-13 21:35:51 +05:30
qctecmdr
6acb487be4 Merge "config: sdxlemur: enable Switch driver" 2021-10-13 03:44:13 -07:00
qctecmdr
07a3bdc09b Merge "i2c: i2c-msm-v2: set irq flag to IRQF_EARLY_RESUME for i2c" 2021-10-12 21:21:58 -07:00
Subramanian Ananthanarayanan
c9289da0fe i2c: i2c-msm-v2: set irq flag to IRQF_EARLY_RESUME for i2c
I2C interrupts get enabled/disabled during transfers,if a
client driver tries to do transfer as part of early system
resume, i2c interrupts may not fire as they are not
registered as EARLY_RESUME IRQ's.

Change is to register interrupt as IRQF_EARLY_RESUME.

Change-Id: Iecbe887c51302dc64632ef45daee4e5ba3d18aa2
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
2021-10-12 19:07:42 +05:30
Subramanian Ananthanarayanan
d898a71fd7 config: sdxlemur: enable Switch driver
Enable Switch driver for pm ops suspend/resume.

Change-Id: I1c4e59f37125d9addc5ab0f5d49e0a32ff413e54
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
2021-10-12 16:15:52 +05:30
Subramanian Ananthanarayanan
f9c8d6dd2b pci:switch: Implement PM ops for QPS615 support
Changes are to save and restore PCI switch config space as part
of system suspend/resume scenario.

Change-Id: I30a1024e1fb7f70e2274d6a6347fdce6e5b019cd
Signed-off-by: Subramanian Ananthanarayanan <skananth@codeaurora.org>
2021-10-12 02:34:56 -07:00
Veerabhadrarao Badiganti
7e1a6d1686 msm: mhi: Handle PCIe events from the common work queue
A couple of instances are observed in which MHI got D3hot and D0 in
a very short span, but the device processed D0 first and D3hot later.
This is resulting s/w state machine going out of sync with h/w
resulting MHI driver to trigger syserr.

Below is the sequence of events:

1) received: EP_PCIE_PM_D3_HOT_EVENT
2) IPA DMA successfully disabled
3) received: EP_PCIE_PM_D0_EVENT
4) Start handling EP_PCIE_PM_D0_EVENT, Current states M-3, D0
   Nothing to do, already in D0 state
5) Start handling EP_PCIE_PM_D3_HOT_EVENT, Current state M-3, D0
6) Start handling MHI_DEV_EVENT_M0_STATE, Current state M-3 & D3_HOT
   MHI_DEV_EVENT_M0_STATE: illegal in current MHI states: M-3 & D3_HOT

Though both works (from the same work queue) are waiting on the same
mutex lock, somehow the work which is processing D0 got the lock first.
The only possibility is priority inversion.

To avoid this scenario use mhi_sm_wq for PCIe event which ensures one
execution at any given time.

commit <37ea867103f2>("msm: ep-pcie: Use threaded irq for PERST
de-assertion handling"), ensures PERST de-assertion events are handled
at max possible priority. So we don't really need high priority system
work queue for handling other PCIe events.

Change-Id: Id147bf8eae7b09999289c70be87dd98b9f68ba3b
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
2021-10-11 20:00:17 +05:30
Srinivasarao P
f60ebed2c6 Merge android11-5.4.134+ (2385b6c) into msm-5.4
* refs/heads/tmp-2385b6c:
  ANDROID: ABI: Update allowed list for QCOM
  FROMGIT: binder: make sure fd closes complete
  FROMLIST: HID: Support Microsoft SPI touch digitizer driver
  ANDROID: ABI: Update allowed list for QCOM

Change-Id: I94142d191889ee5a1ce4e11f618e2d6db0086909
Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
2021-10-11 11:19:02 +05:30
qctecmdr
64ddfd32ef Merge "msm: ipa: Dual NIC IPA offload per-client stats feature" 2021-10-08 17:29:52 -07:00