When LTM is switching on/off, merge_mode bit value gets toggled between
0x1 (dual pipe merge configuration) and 0x0 (single pipe configuration).
It is illegal to reconfigure LTM to/from dual-pipe merge mode before
both LTM instances have completed their current workloads. This change
adds support to disable merge_mode one frame after histogram is disabled
to make sure both hardware instances are completely idle and avoid
corrupted histogram data collection.
Change-Id: I9a6b5cbfb69e8af7936749e57fe7c8f7c2703b95
Signed-off-by: Ping Li <pingli@codeaurora.org>
During one of the DP timeout usecases, flush doesn't take
effect due to vid vblank wait failure. As a result, smmu
faults are observed because of fetching the previously
staged planes. This change adds ctl reset in the same
DP atomic commit context to recover and avoid
smmu faults.
Change-Id: I2f9aceca56e27f140607317f7596d6fe0d908af8
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
In DLKM builds, all the display symbols are included as part
of msm_drm.ko and symbols are dynamically linked while
loading ramdumps. This change removes static specifier for
sde_dbg_base in order to access the variable from ramparser
and extract the required logs with the help of ramparser
tool and also in automation stability runs.
Change-Id: I3eae0bc9db3bd285642bf9f7930a31ab47c446e3
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
In CPHY, packet header and checksum is sent twice and SYNC is
sent in between two headers. So, increase packet overhead used
in clock calculation to 15 bytes. Packet Header: 8 bytes,
CRC: 4 bytes, SYNC: 2 bytes and dcs command: 1 byte.
Change-Id: I7a1160cbb57ba4f1faeb4b36a16c322e6069d58f
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Add changes to fix the null dereference in
drm_atomic_get_property caused by connector->state
being NULL. This change allows the drm_mode_config_reset
operation to happen before drm_dev_register to avoid this.
In current scenario, connector->state->crtc is being
accessed due to call to drm_mode_getconnector ioctl with
the drm_mode_config_reset operation pending.
Change-Id: I374d9485819fad85100d1837f4ae22fc2a3ccc40
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
As per the HW teams guidelines, allow dumping the status of
all the HW blocks blocks at every test point.
This code brings in the following changes
1) Featurize the hw block and test point range per target.
2) Reduce the debug bus entries and decrease the static
memory foot print.
3) Allow analyzers to be integrated into the new format.
Change-Id: Ic3bc2c1b77f5617b0f81a2066b22e50cfd6ff8dd
Signed-off-by: Mahadevan <mahap@codeaurora.org>
Add changes to configure register writes in the event
log dump. The register writes can be enabled in the dump
through the debug_fs command.
Change-Id: I08154e193f670999746fbb30291a866db85c8c8d
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
With WB encoder added in the drm encoder_list before primary
encoder introduced as part of commit d28ebf05f4 ("disp:
msm: sde: populate WB display encoder list before dsi"),
sde_kms_wait_for_commit_done during CWB usecase is causing
crtc_commit thread to wait for two WB frame done irqs causing
janks on primary. Add changes to unblock crtc_commit thread and wait
for only one WB frame done irq.
Change-Id: Ie298302fea9df8ba5a1c2fa04f5f585ae455e0c9
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
This change adds pending ctl recovery mask in sde kms
structure to check if there are any ctl paths pending
for recovery and stages only border fill during such
conditions to avoid device crash. Below is the issue
sequence observed during the crash:
1) On one of the ctl path, flush didn't take effect and
flush bits are still pending.
2) It was a NULL flush and last good flush on that
interface has DMA2 pipe staged along with other pipes.
3) Different ctl path re-uses the DMA2 pipe (attached to
ctl path in #1) causing wr_ptr timeout followed by
ppdone timeout.
Change-Id: I07eb9f2fe41f59963dc27655c551c05abe240392
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Newer Android builds to not have headers_install as an executable
Change-Id: Iab81cd0ed9791e7426719fbc1b43d9ccafc89bb7
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Add changes to allow delayed_off_work scheduling in all cases.
Skip scheduling only in panel_dead cases where delay_kickoff
is enabled. This will fix the issue seen with commit 08d04c2f3b
("disp: msm: sde: avoid rc restart when triggered from panel dead").
Change-Id: I4c9a7cd26af9d99ecd3f58023a6fb6d041d91e92
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Request for display in firmware only if no display enabled form
the UEFI.
In the targets supporting dual DSI display having both displays
DT nodes part of the connector list, if only one display is
enabled from the UEFI, then the driver requests for display
in firmware for the second display. Getting the display panel node
from firmware is time taking process, and it can take up to
ten seconds. This causes a delay in adding the component for the second
display, resulting in a delay in bind calls for components of the
msm drm driver.
Change-Id: Ic0aa5ca890fc874d38d3e7eef745f2942e12f9bc
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
In dual display usecases, during pm suspend/resume,
commit is scheduled only on primary crtc thread. If idle
timeout value is very short such as in LP2 mode, it might
result in race condition due to idle pc off work getting
scheduled on its crtc thread. This change adds kickoff in
progress flag to handle such cases as crtc frame pending
count is only updated after rc kickoff.
Change-Id: Iebb331d914b23cc5eeadfeb2a488891e88b3202a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
When DFPS and dynamic clock switch with constant fps are
enabled, wait for dynamic refresh done only if clock switch
is triggered. In case where only fps changes, clock remains
same. So, wait for dynamic refresh done is not required.
Change-Id: I1a96d8d6756086afe2cd6e5bdc19be27c2ffed92
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
ctrl and phy refcounts get incremented even on deferring probe
for display panels which need backlight through wled.As a
result, while probing, it considers that the device is already
in use. This change decrements the ctrl and phy refcounts for
defer probe.
Change-Id: Ica1f5712dd28ed4c635946f2ac89d5f4f074a4c5
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
The boot_disp_en flag for secondary display is getting enabled
all the time, even if its boot_param string is empty.
Correct the boot display name parsing from boot_param string
to fix this issue.
Change-Id: Ica1465611f592b22518061987571919838914891
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
When doing const fps RFI, dynamic refresh clock was done
in the next frame kick off, so as the orginal RFI work flow,
the clock setting also should be done here.
Change-Id: Ic3e6a35dc7264df028f5d848ac6f1eea04a95126
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Check for pixel1 rcg only for mst supported platforms. On sst only
devices bind gets failed.
Change-Id: I73cc4a572d4d0791205c342f57618b226eb91fef
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Current code does output buffer max_addr calculation based on dsc id.
Made changes to calculate ob_max_addr based on dsc native422 support.
Change-Id: I01922750f1e9d6cb45615acc1c473891fc648e5d
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
This change prevents scheduling of rc_restart in case of
panel dead. This early return is required to avoid the list
add corruption when a race condition happens between event
thread and commit thread. When event thread is handling
display failure notification if the virt_enable arrives in
commit thread it will reinizialize kthread for
delayed_off_work without deactivating the existing list
which leads to linkage corruption.
Change-Id: I41d08cd47ba6f887f0860e52bcddf414085524bb
Signed-off-by: Mahadevan <mahap@codeaurora.org>
Made changes to disable uidle feature in yupik target.
Change-Id: If122a86ed14002399e2dbd0b62385d47c854136f
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
Changes are made to add register write logs to memory dump.
This can be extracted from crash dumps and used for analysis.
Change-Id: If46aaa4ae68f83c79d4b51cbe5dfd22340aa991d
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Due to lock sequence inconsistency between sde_crtc->spin_lock and
sde_kms->hw_intr->irq_lock can cause deadlock, to avoid this possible
deadlock this change uses different spin lock for frame events.
Change-Id: I51b1184dfa1069c87653099b95b992b277721daf
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Handle host_ready failures and try to initialize host if not already.
Sometimes customizations for customers causes NOC error as host_ready
doesn't return early upon failure and the customer customization
tries to access aux register to reconfig upon aux failure while
reading EDID. Adding fix will make driver more robust to handle such
cases.
Change-Id: Ifa5c56daa32c4ef366a0e05718495ffcb40b96b3
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
During dp altmode driver initialization, the dp altmode driver is called
with a null data packet. Even though this callback indicates a disconnect,
the multi function flag is incorrectly set to true. If the DP is enabled
later using simulation mode, the multi function flag is not cleared thereby
limiting the lane count to 2 irrespective of capability applied through
DPCD.
This change checks for the zero pin value while setting the multi function
flag.
Change-Id: I974fbf1630eed26f406ac9e4c99140b27f0cb635
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
Add support for 7nm pll. Only some offsets are different from 5nm
pll while the rest are same.
Change-Id: If61cd604d7f8221c659f1b83761647e86e3b6627
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
