During idle-restart failure the platform driver does not complete
the power_up completion event and it eventually results in the
driver timeout. Add code to handle idle-restart failure and
return the value of the failure to the host driver.
Change-Id: I9d80b844429ecb292a6c7e9d35362fbfd3a24adb
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
Add code to download qdss trace config to FW and qdss trace
data from FW when source=0, i.e etb_soc or etb_wcss.
Change-Id: I18bbd74d1f4460d0232c7b3d099eb8525b406e2e
Signed-off-by: Aasir Rasheed <arasheed@codeaurora.org>
Adaptive Clock Distribution (ACD) is a power saving feature
to mitigate voltage droops.
Change-Id: Ic2517010726caa33f3e9d08ed7bd66466bead730
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Certain GPIOs are reserved for secure world and cannot be accessed by HLOS.
Supply "reserved_gpios" to msm_pinctrl to mark these pins as invalid.
Change-Id: I7ff8444af2819a68c60e66bd4e4e9f5ecf4990fa
Signed-off-by: Naina Mehta <nainmeht@codeaurora.org>
It cannot be guaranteed that certain legacy mode controllers stay
in M0 while a BW request is being processed. Ensure that those
pending BW requests are addressed when M0 entry occurs after a BW
request is processed but not responded to.
Change-Id: I6132116fae76fa10477aa7061c24f3ff5ac60a34
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
While trusted touch is underway, block resume work
to flush touch FIFO since ownership of register space
is with Trusted VM.
Change-Id: Ib87a81aa8f39631ae3f3ea44f4a5dee4563bc514
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Release I2C session lock before releasing IO regions in TVM
during trusted touch scenario.
Change-Id: Ibd3b63e5d084097eb464e3697b8d7d82ea17262e
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Add Trusted touch support to nt36xxx Touchscreen driver.
This feature enables driver to operate in trusted touch
mode in trusted virtual machine(TVM). The primary virtual
machine(PVM) lends resources such as IO memory and touch
irq to TVM prior to trusted touch is initiated and
reclaims those resources back after trusted touch usecase
finishes. The resource requirements of TVM such as clock,
regulators etc are taken care by PVM. Introduce state
machine for various checkpoints in trusted touch usecase.
In error scenarios, this state machine helps driver to
rollback to previous state.
Change-Id: I5000ba016cee21c7b6b6beab8a7bb15a8c23f8d5
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Enable Display and debug clock controllers for YUPIK.
Change-Id: I1d458d091c57011f6e9780956769051b4760eb18
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
Add debug clock controller to support measure functionality for
all clock controllers.
Change-Id: I45d097d077c50efcde3d4a31b3b601deab9c1059
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
Add the display clock controller to support display port
related branches, PLLs and RCGs.
Change-Id: I3b9c15e1eab364250300d1ff9121285a044ced2e
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
When memdesc_sg_virt returns error in kgsl_setup_anon_useraddr function,
the gpu address registered in SVM region will not be deregistered.
This change deregisters the gpu address on memdesc_sg_virt failure.
Change-Id: Ic99167e283a0c6331bb9f5f0b608b6cdb3c918e4
Signed-off-by: Neeraja P <neerp@codeaurora.org>
For DSI byte clock RCG, check if there is a change in existing
settings before updating RCG configuration. This is needed to
avoid glitch on the display panel when there is a change in the
DSI byte clock frequency with display enabled.
Change-Id: I8ef0331cbb466b399cd12199b4d335ed44997dbc
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
Commit 29c41d5c47 ("regulator: rpmh-regulator: support parent
supply specification in subnodes") introduced a memory leak in
the function rpmh_regulator_init_vreg_supply() due to 'buf' not
being freed in the new 'else if' statement. Fix this memory leak
by freeing 'buf' correctly.
Change-Id: If2748b595d8ae3a4564a2956a67aeda476975309
Signed-off-by: David Collins <collinsd@codeaurora.org>
Henceforth, l3 clock is scaled using icc api instead
of the clock api.
Change-Id: I0de3250ed402b940dfb5991ea837edb98734529a
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
For the highest IB vote, enable DDR qos level which increases
performance by disabling certain DDR low power states.
Change-Id: Iaabc99f724ca6f2b8de2a95da00f73608209e97f
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
