Commit graph

893,346 commits

Author SHA1 Message Date
qctecmdr
31d628e3fd Merge "msm: ipa: enable more SIDs" 2021-01-14 06:21:56 -08:00
qctecmdr
fee290643a Merge "msm-cpufreq: fix cpufreq compile error problem" 2021-01-14 06:21:56 -08:00
qctecmdr
3ff8775b55 Merge "net: aquantia: Adding IPA glue layer" 2021-01-14 06:21:55 -08:00
qctecmdr
bba59bd13c Merge "defconfig: sdxlemur: Enable IOSS" 2021-01-14 06:21:55 -08:00
qctecmdr
dbb084194a Merge "clk: qcom: debugcc-yupik: Update all PCIE clocks to measure only" 2021-01-14 06:21:54 -08:00
qctecmdr
fde383ce77 Merge "msm: ipa: IPA offload subsystem for ethernet devices" 2021-01-14 06:21:53 -08:00
qctecmdr
2cf3ec57be Merge "msm: kgsl: Vote for l3 via icc_set_bw" 2021-01-14 06:21:52 -08:00
Bojun Pan
48017f137f msm: ipa: enable more SIDs
Enable SMMU on eth/eth1/wlan1 SIDs.

Change-Id: I3b96e6cf89817f47b6b9fb4501f7e8c6bffcde14
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2021-01-12 11:38:40 -08:00
qctecmdr
1ea05851c7 Merge "cnss2: Prevent PCIE l1 substatus at MHI fast resume" 2021-01-12 08:24:53 -08:00
qctecmdr
ae5cc1426f Merge "msm: kgsl: Deregister gpu address on memdesc_sg_virt failure" 2021-01-12 08:24:53 -08:00
qctecmdr
c72ebc5e35 Merge "icnss2: Add support to load WPSS" 2021-01-12 08:24:53 -08:00
qctecmdr
a1d26c8cae Merge "msm: kgsl: Enable ACD feature support for A660 variant" 2021-01-12 08:24:52 -08:00
qctecmdr
d04631e7de Merge "netfilter: contrack: Null pointer check is added" 2021-01-12 08:24:52 -08:00
Jinesh K. Jayakumar
15c887d01e msm: ipa: IPA offload subsystem for ethernet devices
Update IPA offload sub-system to avoid IPA core API calls to support
new IPA ETH client API calls provided by IPA driver.

Change-Id: I5db3189f7042fa66397a530184c662e65c1e6f0c
Signed-off-by: Jinesh K. Jayakumar <jineshk@codeaurora.org>
Signed-off-by: Lakshit Tyagi <ltyagi@codeaurora.org>
2021-01-11 15:41:35 -08:00
Lakshit Tyagi
6d40652ad7 defconfig: sdxlemur: Enable IOSS
Enable AQC IOSS and its dependencies.

Change-Id: I7ac8c637d1365819fe9e1b8aef6241df4eebad87
Signed-off-by: Lakshit Tyagi <ltyagi@codeaurora.org>
2021-01-11 13:45:42 -08:00
Biao Long
ae32912529 msm-cpufreq: fix cpufreq compile error problem
When enable Qcom-cpufreq driver on 5.4,because some data
struct has been changed, and trace_cpu_frequency has been
removed, this will cause the compile issue, so fix these
problem to pass compile.

Change-Id: I71f76b92a52cfd8a905a5fc7fad6e5a5f4e6b39f
Signed-off-by: Biao Long <blong@codeaurora.org>
2021-01-11 16:11:10 +08:00
Naman Padhiar
510ac340d5 icnss2: Add support to load WPSS
Add sysfs entry to trigger icnss driver to load WPSS
FW.

Change-Id: I6ef47986deb757ec6536256be8797ae06e8cf899
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
2021-01-11 10:41:02 +05:30
qctecmdr
1a5ca59cc3 Merge "Merge android11-5.4.61+ (662e2b3) into msm-5.4" 2021-01-08 23:43:03 -08:00
qctecmdr
a8f2f04662 Merge "arm64: defconfig: Add support for DISPCC and debugCC for YUPIK" 2021-01-08 23:43:02 -08:00
qctecmdr
18336829bf Merge "usb: gsi: Prevent function remote-wakeup without function suspend" 2021-01-08 23:43:02 -08:00
qctecmdr
33a49c58db Merge "mmc: host: sdhci-msm: Don't return error on missing bus voting paths" 2021-01-08 23:43:01 -08:00
qctecmdr
a1fdfb2d1c Merge "iio: qcom-spmi-adc5: Fix HW settle time table naming for ADC5 lite" 2021-01-08 23:43:01 -08:00
qctecmdr
619b238506 Merge "mem-offline: disallow page migration to isolated page blocks" 2021-01-08 23:43:00 -08:00
qctecmdr
1108203dc2 Merge "clk: qcom: check for change in RCG configuration during set_rate" 2021-01-08 17:26:21 -08:00
qctecmdr
1ed47d9eca Merge "bus: mhi: core: Address pending BW requests for legacy mode" 2021-01-08 17:26:21 -08:00
qctecmdr
914a4a1901 Merge "devfreq: memlat: Fix macros to support 32 bit kernels" 2021-01-08 17:26:20 -08:00
qctecmdr
a67c893c8c Merge "msm: pcie-ep: Update AOSS reset name" 2021-01-08 17:26:20 -08:00
qctecmdr
da53fdd298 Merge "cnss2: Add code to handle idle-restart failure gracefully" 2021-01-08 17:26:20 -08:00
qctecmdr
1a91a6be35 Merge "input: touchscreen: nt36xxx: Expose trusted touch event" 2021-01-08 14:20:45 -08:00
qctecmdr
11c7a21486 Merge "regulator: rpmh-regulator: fix rpmh_regulator_init_vreg_supply memory leak" 2021-01-08 14:20:45 -08:00
qctecmdr
3fa38c8e5b Merge "defconfig: sdxlemur: Enable IPA offload on Realtek R8125 driver" 2021-01-08 05:17:41 -08:00
Mohammed Siddiq
aa3f811392 cnss2: Add code to handle idle-restart failure gracefully
During idle-restart failure the platform driver does not complete
the power_up completion event and it eventually results in the
driver timeout. Add code to handle idle-restart failure and
return the value of the failure to the host driver.

Change-Id: I9d80b844429ecb292a6c7e9d35362fbfd3a24adb
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
2021-01-08 11:54:53 +05:30
Aasir Rasheed
d0e7f21fb0 icnss: Add code to send qdss mode and sysfs interface for qdss
Add code to send qdss mode request and sysfs interface for
qdss_start, qdss_stop and qdss_config_download.

Change-Id: Ibd6f582bb121d5fd885c55ebcd8360bc13b6c37a
Signed-off-by: Aasir Rasheed <arasheed@codeaurora.org>
2021-01-08 10:41:20 +05:30
Aasir Rasheed
6401bedb03 icnss: Add code to downdload qdss trace config
Add code to download qdss trace config to FW and qdss trace
data from FW when source=0, i.e etb_soc or etb_wcss.

Change-Id: I18bbd74d1f4460d0232c7b3d099eb8525b406e2e
Signed-off-by: Aasir Rasheed <arasheed@codeaurora.org>
2021-01-08 10:39:41 +05:30
qctecmdr
530d87338f Merge "driver: pinctrl: Add reserved GPIOs for Yupik" 2021-01-07 19:00:56 -08:00
qctecmdr
6c2032cc4f Merge "defconfig: Remove CONFIG_CNSS_QCA6490" 2021-01-07 19:00:56 -08:00
Deepak Kumar
76c5e0784d msm: kgsl: Enable ACD feature support for A660 variant
Adaptive Clock Distribution (ACD) is a power saving feature
to mitigate voltage droops.

Change-Id: Ic2517010726caa33f3e9d08ed7bd66466bead730
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
2021-01-07 20:45:44 +05:30
Jagadeesh Kona
05e05d692f clk: qcom: debugcc-yupik: Update all PCIE clocks to measure only
PCIE clocks are not controlled from HLOS in YUPIK. But in order
to measure them from HLOS, update all PCIE clocks to measure only.

Change-Id: I8749032c187694bb57bf89feccf129fd4c6b7299
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2021-01-07 16:23:19 +05:30
Naina Mehta
67d881e295 driver: pinctrl: Add reserved GPIOs for Yupik
Certain GPIOs are reserved for secure world and cannot be accessed by HLOS.
Supply "reserved_gpios" to msm_pinctrl to mark these pins as invalid.

Change-Id: I7ff8444af2819a68c60e66bd4e4e9f5ecf4990fa
Signed-off-by: Naina Mehta <nainmeht@codeaurora.org>
2021-01-07 00:05:42 -08:00
Bhaumik Bhatt
85a71cb100 bus: mhi: core: Address pending BW requests for legacy mode
It cannot be guaranteed that certain legacy mode controllers stay
in M0 while a BW request is being processed. Ensure that those
pending BW requests are addressed when M0 entry occurs after a BW
request is processed but not responded to.

Change-Id: I6132116fae76fa10477aa7061c24f3ff5ac60a34
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2021-01-06 18:05:33 -08:00
Ritesh Kumar
bd5377681e input: touchscreen: nt36xxx: Expose trusted touch event
Expose trusted touch event through sysfs node for TUI
error handling.

Change-Id: Ib303d36e3b807c770f670abc2a2ee3e3fd2e009d
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-01-06 13:17:18 -08:00
Ritesh Kumar
c30aa8dbe9 input: touchscreen: nt36xxx: Block resume work on PVM
While trusted touch is underway, block resume work
to flush touch FIFO since ownership of register space
is with Trusted VM.

Change-Id: Ib87a81aa8f39631ae3f3ea44f4a5dee4563bc514
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-01-07 02:46:49 +05:30
Ritesh Kumar
96ea71a1c2 input: touchscreen: nt36xxx: release i2c session early
Release I2C session lock before releasing IO regions in TVM
during trusted touch scenario.

Change-Id: Ibd3b63e5d084097eb464e3697b8d7d82ea17262e
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-01-06 12:42:26 -08:00
Ritesh Kumar
27da55afee arm64: defconfig: Enable novatek trusted touch for genericarmv8
Enable Trusted touch config in genericarmv8 defconfig for
novatek touch driver.

Change-Id: Ic96ec1971314479ed809c1d3b403237c258a7e5f
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-01-06 12:42:18 -08:00
Ritesh Kumar
cccc78c256 arm64: defconfig: Enable novatek trusted touch on lahaina
Add trusted touch support to Lahaina GKI defconfig for
novatek touch driver.

Change-Id: I7da16992f20fee569f2b8da583543338ad3175d8
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-01-06 12:42:11 -08:00
Ritesh Kumar
36f6aedb51 input: touchscreen: nt36xxx: Add trusted touch support
Add Trusted touch support to nt36xxx Touchscreen driver.
This feature enables driver to operate in trusted touch
mode in trusted virtual machine(TVM). The primary virtual
machine(PVM) lends resources such as IO memory and touch
irq to TVM prior to trusted touch is initiated and
reclaims those resources back after trusted touch usecase
finishes. The resource requirements of TVM such as clock,
regulators etc are taken care by PVM. Introduce state
machine for various checkpoints in trusted touch usecase.
In error scenarios, this state machine helps driver to
rollback to previous state.

Change-Id: I5000ba016cee21c7b6b6beab8a7bb15a8c23f8d5
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-01-06 12:42:01 -08:00
Jagadeesh Kona
920c63faca arm64: defconfig: Add support for DISPCC and debugCC for YUPIK
Enable Display and debug clock controllers for YUPIK.

Change-Id: I1d458d091c57011f6e9780956769051b4760eb18
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2021-01-07 01:38:45 +05:30
Jagadeesh Kona
f1a099474f clk: qcom: debugcc: Add debug clock controller support for YUPIK
Add debug clock controller to support measure functionality for
all clock controllers.

Change-Id: I45d097d077c50efcde3d4a31b3b601deab9c1059
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2021-01-07 01:38:35 +05:30
Jagadeesh Kona
8b82fcc32c clk: qcom: dispcc: Add display clock controller for YUPIK
Add the display clock controller to support display port
related branches, PLLs and RCGs.

Change-Id: I3b9c15e1eab364250300d1ff9121285a044ced2e
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2021-01-07 01:00:45 +05:30
Neeraja P
9d5f8de63c msm: kgsl: Deregister gpu address on memdesc_sg_virt failure
When memdesc_sg_virt returns error in kgsl_setup_anon_useraddr function,
the gpu address registered in SVM region will not be deregistered.
This change deregisters the gpu address on memdesc_sg_virt failure.

Change-Id: Ic99167e283a0c6331bb9f5f0b608b6cdb3c918e4
Signed-off-by: Neeraja P <neerp@codeaurora.org>
2021-01-06 10:46:19 +05:30