Commit graph

893,823 commits

Author SHA1 Message Date
Pratham Pratap
42a90ced12 usb: dwc3: Issue ENDTRANSFER cmd on ep0 unconditionally
Consider a case where ep0 is not in setup stage and composition
switch happens. Currently DWC3_DEPCMD_ENDTRANSFER command is not
issued on ep0 which means that the transfers are not flushed out
and driver clears the run/stop bit hence stopping the controller.
Now as soon as driver sets the run/stop bit controller tries to
access the trb from the previous session which is already unmapped
resulting in SMMU fault.

Fix this by unconditionally issuing DWC3_DEPCMD_ENDTRANSFER
command on ep0. Although it is not specified in the data book
but if we know for sure that we are anyway going to stop the
controller then we can issue ENDTRANSFER command on ep0.

Change-Id: Ic6ee570acc8926897d3b6042181a501a47438d92
Signed-off-by: Pratham Pratap <prathampratap@codeaurora.org>
2021-02-05 22:31:13 -08:00
qctecmdr
9a855e1c71 Merge "pci: switch: Add snapshot of PCIe switch driver" 2021-02-05 18:01:29 -08:00
qctecmdr
47d8e027d9 Merge "usb: dwc3: core: Select UTMI clock before core_soft_reset" 2021-02-05 18:01:28 -08:00
qctecmdr
64f86ae513 Merge "pci: msm: msm_pcie_iatu_config API clean" 2021-02-05 18:01:28 -08:00
qctecmdr
9d0e285207 Merge "msm: pcie: provide client the ability to control PCIe target_link_speed" 2021-02-05 18:01:28 -08:00
qctecmdr
d8ba3161ed Merge "cnss2: Add support for PCI wake GPIO" 2021-02-05 18:01:27 -08:00
Dennis Cagle
878506879e defconfig: sdxlemur: Remove slub debug config
Remove CONFIG_SLUB_DEBUG_ON from debug variant for performance
reasons. Also remove redundant HARDENED_USERCOPY from debug config
since this gets copied over from the standard config.

Change-Id: I7c6fc8620290cf126ced046f82811e9e39bc2a60
Signed-off-by: Dennis Cagle <dcagle@codeaurora.org>
2021-02-05 14:35:31 -08:00
Tony Truong
d0cb56ec45 msm: pcie: provide client the ability to control PCIe target_link_speed
There are usecases where clients want to change the maximum GEN
speed that PCIe can link up with. Provide clients the ability to
control the maximum PCIe GEN speed to for such usecases.

Change-Id: I834bee2063133546c9b0ebac2d5328ffbc5ceac6
Signed-off-by: Tony Truong <truong@codeaurora.org>
2021-02-05 12:54:14 -08:00
Elson Roy Serrao
eabbb7f853 usb: dwc3: core: Select UTMI clock before core_soft_reset
In HS Only mode of dwc3 controller version 1.9A, UTMI clock needs
to be selected before core soft reset as per the HPG sequence.
Or else the core soft reset fails, leading to enumeration
failure. Hence select UTMI clock before performing
SOFT_RESET operation.

Change-Id: I12d4a992872eecbfc38825282559cd4d592c3896
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
2021-02-05 11:12:16 -08:00
qctecmdr
47f285b88f Merge "cfg80211: Indicate support for configuring PMKSA timer params" 2021-02-04 23:09:29 -08:00
qctecmdr
40fb7865c8 Merge "defconfig: Configure MaxPower to 900mA on sdxnightjar" 2021-02-04 23:09:28 -08:00
qctecmdr
a38ac852dc Merge "Revert "cnss2: Dump mhi debug regs on receiving mhi WAKE event cb"" 2021-02-04 23:09:28 -08:00
qctecmdr
c390f8a32f Merge "regulator: qpnp-lcdb: remove workaround for LCDB regulation issue" 2021-02-04 23:09:28 -08:00
qctecmdr
9a5704feb8 Merge "ANDROID: GKI: Enable DRM_GEM_SHMEM_HELPER" 2021-02-04 23:09:27 -08:00
qctecmdr
5a47f69464 Merge "clk: qcom: clk-rpmh: Fix overflow in BCM vote" 2021-02-04 23:09:27 -08:00
Yue Ma
ea814047ba cnss2: Add support for PCI wake GPIO
For non-MSM platforms, PCI wake GPIO may not be handled by PCI root
complex driver so add support to handle it in device driver.

Change-Id: Ief6bc6b25bdc5b93887af1cc626acc721f9fa85a
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-02-04 22:28:28 -08:00
Yue Ma
112dc33583 cnss2: Use CONFIG_INTERCONNECT to protect icc related APIs
This makes sure CNSS2 driver is able to work in the platforms and
kernels which do not have on-chip interconnect management feature.

Change-Id: I282ef1a282fab9ce4910e7ab914f26789b34ba64
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-02-04 22:02:30 -08:00
Yue Ma
872b48bc98 cnss2: Use CONFIG_QCOM_COMMAND_DB to protect MSM command DB APIs
This makes sure CNSS2 driver is able to work in non-MSM platforms
which do not have command DB feature.

Change-Id: I9551bfc639e6db0256e475a27db5dec87bce74ed
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-02-04 22:02:18 -08:00
Yue Ma
a7ae359deb cnss2: Use CONFIG_IPC_LOGGING to protect MSM IPC logging APIs
This makes sure CNSS2 driver is able to work in non-MSM platforms
which do not have IPC logging feature.

Change-Id: I4c8fe3eb45e38fd106f47c28f0e4da82b0bdf76f
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-02-04 22:02:07 -08:00
Yue Ma
9c8b92051d cnss2: Use proper flags to protect MSM memory dump APIs
This makes sure CNSS2 driver is able to work in non-MSM platforms
which do not have memory dump and mini dump features.

Change-Id: I5193deed941ff8e2e2ca2693150396a53eb3db7d
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-02-04 22:01:57 -08:00
Yue Ma
e0af665bc1 cnss2: Abstract of_reserved_mem_device_init() API
Currently in MSM platform reserved memory is attached to PCI
device of_node which may not apply to other non-MSM platforms.
Hence abstract the API using CONFIG_ARCH_QCOM flag.

Change-Id: Ic02b087c188b8dcb0959e17c80e72bb4021a725c
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-02-04 22:01:25 -08:00
Yue Ma
7e108a73af cnss2: Use empty tables for default regulators and clocks
Current default regulator and clock tables are for MSM platform
only. Use empty tables for non-MSM platforms by default so that
proper regulators and clocks can be added later based on platforms.

Change-Id: I2705d8ca2a0fde636f346f01e677a762b4cf92b7
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-02-04 22:01:10 -08:00
qctecmdr
c63440cb49 Merge "crypto: Fix possible stack out of bound error" 2021-02-04 18:51:58 -08:00
qctecmdr
4122d2c4b1 Merge "usb: composite: Don't override -EAGAIN return value" 2021-02-04 18:51:58 -08:00
qctecmdr
430f613771 Merge "dwc3: gadget: Resume USB bus unconditionally for USB super speed and above" 2021-02-04 18:51:57 -08:00
qctecmdr
f48bee06f2 Merge "arm: defconfig: Add GCC support for MONACO" 2021-02-04 18:51:57 -08:00
qctecmdr
473c6dd997 Merge "msm: cvp: Add snapshot of fastcvpd driver" 2021-02-04 18:51:57 -08:00
qctecmdr
b55dd29b8c Merge "pinctrl: qcom: disable MPM_WAKEUP_INT_EN bits for gpio" 2021-02-04 18:51:56 -08:00
qctecmdr
4bf30d61d6 Merge "defconfig: quinvm: Enable RENAME_BLOCK_DEVICE for quinvm" 2021-02-04 18:51:55 -08:00
Veerendranath Jakkam
0eca6b834d cfg80211: Indicate support for configuring PMKSA timer params
This commit adds backport flag to indicate support for configuring PMKSA
timer params such as pmk_lifetime and pmk_reauth_threshold.

Change-Id: Icda969d1f53caf642e21d9ec1b1f21f8be419e5c
CRs-Fixed: 2871040
Signed-off-by: Veerendranath Jakkam <vjakkam@codeaurora.org>
2021-02-04 20:04:34 +05:30
qctecmdr
7141e265d8 Merge "ARM64: defconfig: enable kgsl driver" 2021-02-04 04:20:35 -08:00
qctecmdr
9d2aa50e8c Merge "icnss2: Add support to enable IO Coherency" 2021-02-04 04:20:35 -08:00
qctecmdr
72571c4baf Merge "usb: gadget: f_gsi: Handle IPA remote wakeup notification properly" 2021-02-04 04:20:34 -08:00
qctecmdr
00dcbc2cbe Merge "defconfig: Disable upstream SOUNDWIRE driver for sdxnightjar" 2021-02-04 04:20:34 -08:00
qctecmdr
3c7b7b5379 Merge "neighbour: Prevent a dead entry from updating gc_list" 2021-02-04 04:20:34 -08:00
qctecmdr
07afb6af62 Merge "interconnect: qcom: Add OSM L3 support on SM6150" 2021-02-04 04:20:33 -08:00
qctecmdr
92ca465653 Merge "mm: skip speculative path for non-anonymous COW faults" 2021-02-04 04:20:33 -08:00
Venkata Rao Kakani
e0d73ac10e defconfig: quinvm: Enable RENAME_BLOCK_DEVICE for quinvm
Enable RENAME_BLOCK_DEVICE in quinvm to support renaming of
partitions for AVB 2.0 support.

Change-Id: Ia283eb8217ea019dd66680480487cfefdffcfb02
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-02-04 14:38:14 +05:30
Rohith Kollalsi
62aecc3734 defconfig: Configure MaxPower to 900mA on sdxnightjar
Add the config entry to set the MaxPower to 900mA to accommodate
Super Speed and above on sdxnightjar.

Change-Id: I6a0766d825b992eaf22c87200cc4d68baaa91df7
Signed-off-by: Rohith Kollalsi <rkollals@codeaurora.org>
2021-02-03 22:11:43 -08:00
Rohith Kollalsi
de534b00b3 defconfig: Add support for usb function wakeup on sdxnightjar
Enable CONFIG_USB_FUNC_WAKEUP_SUPPORTED defconfig inorder to
support usb function wakeup on sdxnightjar.

Change-Id: I9437a7f39f167ec81486062e0de7dac58e493aac
Signed-off-by: Rohith Kollalsi <rkollals@codeaurora.org>
2021-02-04 11:38:45 +05:30
qctecmdr
d6a42214ab Merge "usb: phy: snps: Enable autoresume for FS/HS peripherals only" 2021-02-03 19:56:16 -08:00
qctecmdr
0fd88e79e4 Merge "defconfig: sdmsteppeauto: Enable SPMI PMIC drivers" 2021-02-03 19:56:15 -08:00
qctecmdr
2fd8b50117 Merge "icnss2: Use correct pointer to access icnss_priv state" 2021-02-03 19:56:15 -08:00
Hemant Kumar
b9b4ade986 pci: msm: msm_pcie_iatu_config API clean
Get rid of access to pciedev_table. Update data type
for bdf from unsigned long to u32. Remove support for
viewport.

Change-Id: I2bb27eab2b37a640c468377f5d4993d67b5979d0
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-02-03 15:30:43 -08:00
qctecmdr
7bdfe17c46 Merge "defconfig: sdxlemur: Enable serial on sdxlemur perf" 2021-02-03 12:03:01 -08:00
qctecmdr
8ca355864f Merge "interconnect: qcom: Add qos configuration for scshrike" 2021-02-03 12:03:01 -08:00
qctecmdr
3c93f5a7d9 Merge "backlight: qcom-spmi-wled: Change the SYNC toggle sequence" 2021-02-03 12:03:00 -08:00
qctecmdr
5190cfa369 Merge "defconfig: Add CNSS_UTILS config for monaco" 2021-02-03 12:03:00 -08:00
qctecmdr
86b4635874 Merge "power: smb5-lib: Add additional check to exit charge-termination WA" 2021-02-03 12:03:00 -08:00
qctecmdr
4e99832122 Merge "qcom: step-chg-jeita: Add support for jeita fcc scaling" 2021-02-03 12:02:59 -08:00