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879,303 commits

Author SHA1 Message Date
Jordan Crouse
565c37064c msm: kgsl: Move context aware scaling to the scaling code
Context aware (CA) scaling is excluisvely a pwrscale concept so move all
the probing there.  This is mostly just a cut-and-paste except that the
speed_bin needs to move from Adreno to the kgsl_device so it can be
accessed from the pwrscale code.

Change-Id: Ic0dedbad54983ecf8b59b9a62991be6b4f26b242
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-16 09:51:53 -06:00
Jordan Crouse
9f1c0af630 msm: kgsl: Use the GPU platform device when it is appropriate
Throughout the history of the driver the GPU platform device and the
KGSL pseudo device have been used somewhat interchangeably which is
bad. The platform device should be used whenever dealing with hardware
or kernel resources so that we can get proper cleanup during probe.

While it is still okay to use the pseudo device for log messages,
using the platform device for log messages having to do with
resources is better since you can make a more direct correlation
between the log message and the device tree entry.

Change-Id: Ic0dedbad1fe2fd4d75ff738fc3942c7b20125683
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-16 09:51:53 -06:00
Jordan Crouse
ed253b59c0 msm: kgsl: Use booleans for power control features
Currently we use a bitmask for the power control features (SPTP, ACD, LM,
etc).  Move to individual booleans for each feature instead. Booleans
are less unweidly to use and require less if () statements.

Additionally if we properly use the Adreno feature flags when setting
and/or modifying the booleans we can get rid of the feature flag checks in
the rest of the code and use the control booleans as they are intended.

And finally, move some of the target specific control features to the
target specific code. This ensures that the target specific code can
control the feature and the other targets don't accidentally specify
the wrong state through sysfs. For example, if SPTP power collapse is
only available for a5xx then the sysfs file should only ever return
false for the other targets.

Change-Id: Ic0dedbad1828ae9163a1a1357828156cb3281914
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-16 09:51:52 -06:00
Jordan Crouse
8152ccc95e msm: kgsl: Fixup the GMU probe
Clean up the GMU probe to use standard functions and proper reference to
make it more defer tolerant.

Change-Id: Ic0dedbad7c561e24c07053ea3b19ef62e34621cb
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-16 09:51:52 -06:00
Jordan Crouse
76f54bf67f msm: kgsl: Fixup the RGMU probe
Fix the RGMU probe to use standard helper functions and do proper
reference counting.

Change-Id: Ic0dedbadf5af14338de83cd9041674cc6f1ea304
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-16 09:51:51 -06:00
Jordan Crouse
05fb678662 msm: kgsl: Move hw_isidle to target specific code
Currently, there is a custom hw_isidle function defined for a6xx but the
function pointer is removed in a6xx_start for non GMU/RGMU a6xx targets
which has the effect of falling back to the generic adreno_hw_isidle
function which confused at least two of us before we figured out what
was happening.

Instead of having a generic adreno_hw_isidle function except for a6xx, add
a hw_isidle function hook for all targets and do the GMU check in the
a6xx specific function. This also has the advantage of moving a a540
specific hack into the a5xx code and removes one of two usages of the
gpucore specific busy mask and the other is in soft fault detect.
Arguably we should get rid that too but for now we can just hardcode
the mask in there and remove the busy mask from the gpucore struct.

And finally it looks like adreno_isidle isn't used as a function hook,
so remove it from the device function tables and mark it static.

Change-Id: Ic0dedbad47fa5dee0e5d903a8f9dd9bf7230b759
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-16 09:51:51 -06:00
Jordan Crouse
c744ab5d9c msm: kgsl: Clean up the reset and soft reset paths
a6xx added a new function hook and path for doing a GPU reset that fell
back to the default reset path for a610 but a610 purposely skipped
soft reset and the hard reset path is very similar to that used by
GMU/RGMU enabled devices except for one little bit.

Furthermore, if a610 skipped soft reset then there are no a6xx targets
that do soft reset so there is no reason to have an a6xx specific
soft reset path. And further to that, there isn't any reason to have
any a6xx specific functions (like oob) in the generic soft reset path.

Make the a6xx reset support all a6xx targets, remove unused infrastructure
from the rest of the generic code and cleanup the generic functions
to be a little bit easier to understand.

Change-Id: Ic0dedbadd3570fe148a464ff0dc647d91099ae09
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-16 09:51:50 -06:00
Jishnu Prakash
108427ae28 leds: qpnp: Add snapshot of vibrator LDO driver
This is a snapshot of the vibrator LDO driver as of msm-4.19
'commit c527cd5c987ac (Merge "mhi: cntrl: qcom: allow printing
large strings to IPC logs")' with the following modifications:
	- Replace snprintf with scnprintf.

Change-Id: Id58fbcc33607c309366104fe72282c09c86a3227
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2020-03-15 08:19:03 -07:00
qctecmdr
058b861752 Merge "usb: dwc3: gadget: update the return value of pullup function" 2020-03-15 03:11:03 -07:00
qctecmdr
baa8778afd Merge "cnss_nl: Add new attributes for cld80211 attr list" 2020-03-15 03:11:03 -07:00
qctecmdr
d9918c71df Merge "NFC: Add timeout when waiting for responses in probe" 2020-03-15 03:11:03 -07:00
qctecmdr
99a3ac3183 Merge "msm: ipa3: Updating SRAM locations for lito" 2020-03-15 03:11:02 -07:00
qctecmdr
f8c0f9b08b Merge "msm: kgsl: Move event groups to the KGSL device" 2020-03-15 00:41:45 -07:00
qctecmdr
2da77626ea Merge "platform: msm: Add snapshot of msm_11ad driver" 2020-03-15 00:41:45 -07:00
qctecmdr
b5db7e5fa0 Merge "msm: ipa: Update source and dest resource group config values" 2020-03-15 00:41:45 -07:00
qctecmdr
ea6490aa33 Merge "arm64: defconfig: select CONFIG_USB_CONFIGFS_NCM on Lahaina" 2020-03-15 00:41:44 -07:00
qctecmdr
5f7d6431db Merge "usb: phy: qmp: Perform DP_COM_SW_RESET during portselect" 2020-03-15 00:41:44 -07:00
qctecmdr
543d28f8d8 Merge "USB: f_accessory: Check dev pointer before decoding ctrl request" 2020-03-15 00:41:43 -07:00
qctecmdr
95130fde9d Merge "dt-bindings: thermal_qti: Add thermal devicetree Macro" 2020-03-14 21:42:38 -07:00
qctecmdr
644e2c8cb3 Merge "usb: gsi: Dont mask read api for dpl_ctl node" 2020-03-14 21:42:38 -07:00
qctecmdr
501bac76d0 Merge "clk: qcom: clk-debug: Add mc_cc_debug_mux in gcc debug parent list" 2020-03-14 21:42:37 -07:00
qctecmdr
87da78b5f9 Merge "msm: pcie: lower event callback print prority" 2020-03-14 21:42:37 -07:00
qctecmdr
70bc75e1bd Merge "msm: kgsl: Add the list of protected registers for A660" 2020-03-14 21:42:36 -07:00
qctecmdr
5ae8b16b99 Merge "defconfig: Enable LMH DCVS driver for lahaina" 2020-03-14 21:42:36 -07:00
qctecmdr
0b61299a0d Merge "msm: kgsl: Refactor IOMMU register macros" 2020-03-14 21:42:36 -07:00
qctecmdr
4d500eb9cd Merge "defconfig: arm64: Enable hyp core control driver for Lahaiana" 2020-03-14 18:51:01 -07:00
qctecmdr
8e40478163 Merge "iommu: arm-smmu: Fix domain logger use-after-free" 2020-03-14 18:51:01 -07:00
qctecmdr
33e77071eb Merge "sched: remove weak keyword from function declarations" 2020-03-14 18:51:00 -07:00
qctecmdr
02d60c3dfd Merge "defconfig: arm64: Enable dummy netdevice" 2020-03-14 18:51:00 -07:00
qctecmdr
2b18e7c324 Merge "msm: kgsl: Update the GMU AO clockgating value" 2020-03-14 18:50:59 -07:00
qctecmdr
c4ef1f1c8a Merge "msm: pcie: replace all memory barriers with readbacks" 2020-03-14 18:50:58 -07:00
qctecmdr
f4931237b2 Merge "power_supply: Register cooling device outside of probe" 2020-03-14 18:50:58 -07:00
qctecmdr
f0696b23b4 Merge "msm: kgsl: Program GPU SCID for UCHE traffic" 2020-03-14 18:50:57 -07:00
qctecmdr
dfc05db44e Merge "drivers: thermal: bcl_soc: Read charge depletion percentage" 2020-03-14 18:50:57 -07:00
qctecmdr
8f601d73bc Merge "radio: RTC6226: post tune success event when scan done" 2020-03-14 18:50:56 -07:00
qctecmdr
11fda450fe Merge "memshare: Use QMI request structure size as decode buffer size" 2020-03-14 18:50:56 -07:00
qctecmdr
cda7bea699 Merge "msm: kgsl: Fix GPU UBWC setting for DDR 5" 2020-03-14 18:50:56 -07:00
qctecmdr
2692f80e8b Merge "usb: gadget: Prevent use after free in qdss connect & close" 2020-03-14 18:50:55 -07:00
qctecmdr
462ccc5bb6 Merge "rtc-pm8xxx: Clear Alarm register on resume" 2020-03-14 15:40:40 -07:00
qctecmdr
d602f36bdf Merge "arm: defconfig: Enable STM_PROTO_BASIC for lahaina" 2020-03-14 15:40:39 -07:00
qctecmdr
fbaf44464c Merge "interconnect: qcom: Ignore -EBUSY for AMC requests" 2020-03-14 15:40:39 -07:00
qctecmdr
45dde2641b Merge "msm: cvp: Restructure CVP buffer management" 2020-03-14 15:40:39 -07:00
qctecmdr
64a732e881 Merge "iommu: arm-smmu: fix check for need for preallocate memory" 2020-03-14 15:40:38 -07:00
qctecmdr
4d3d7cf067 Merge "iommu/arm-smmu: replicate faulty transaction" 2020-03-14 15:40:38 -07:00
qctecmdr
942f8d2ce6 Merge "iommu: arm-smmu: fix compile error if CONFIG_PCI disabled" 2020-03-14 15:40:37 -07:00
qctecmdr
d9c7bd08f5 Merge "msm: pcie: add proper PCIe link state for linkdown" 2020-03-14 15:40:37 -07:00
qctecmdr
e9c4f4cb2a Merge "msm: pcie: add logs for link bandwidth switching" 2020-03-14 15:40:36 -07:00
qctecmdr
be52fff03d Merge "power: supply: qti_battery_charger: add thermal mitigation support" 2020-03-14 15:40:36 -07:00
qctecmdr
517174e6d2 Merge "ion: Relax CONFIG_ION_MSM_HEAPS dependencies" 2020-03-14 15:40:36 -07:00
qctecmdr
4e9c4afc83 Merge "dwc3-msm: Increment req->num_trbs on queueing TRB" 2020-03-14 15:40:35 -07:00