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Author SHA1 Message Date
qctecmdr
576fa1e8eb Merge "ARM: dts: msm: Update DLL_CONFIG_3 and USR_CTL as per HSR" 2020-08-26 20:58:46 -07:00
qctecmdr
1f4f2149e7 Merge "ARM: dts: msm: Add utility factor for Holi" 2020-08-26 20:58:46 -07:00
qctecmdr
26517a70d8 Merge "ARM: dts: msm: fix to indetify proper adsp variant" 2020-08-26 20:58:46 -07:00
qctecmdr
1b9209211b Merge "ARM: dts: msm: Add alias for uart nodes for shima" 2020-08-26 20:58:46 -07:00
qctecmdr
724fb77709 Merge "ARM: dts: msm: Change vcpu sched priority for trustedvm" 2020-08-26 17:22:49 -07:00
qctecmdr
a57545674b Merge "ARM: dts: msm: Increase the size for scandump on shima" 2020-08-26 17:22:49 -07:00
qctecmdr
eacd775a4d Merge "ARM: dts: msm: Add llcc_1_dcache dump node for lahaina" 2020-08-26 17:22:49 -07:00
qctecmdr
857f7a64c2 Merge "ARM: dts: msm: Add interrupts for Limits for HOLI" 2020-08-26 17:22:49 -07:00
qctecmdr
03c7240bde Merge "ARM: dts: msm: Add Touch support on shima" 2020-08-26 13:02:15 -07:00
qctecmdr
6bdec6b464 Merge "ARM: dts: msm: Update frequency of xo_board and div of xo_board" 2020-08-26 13:02:15 -07:00
qctecmdr
e1c1d31bbd Merge "dt-bindings: interconnect: add CPUCP L3 bindings" 2020-08-26 13:02:15 -07:00
qctecmdr
806bc88b67 Merge "ARM: dts: msm: Enable smmu s1 from wlan side" 2020-08-26 04:59:22 -07:00
qctecmdr
82a034500a Merge "ARM: dts: msm: Modify the "init-voltage" of PON rails for holi" 2020-08-26 04:59:22 -07:00
qctecmdr
4dc27c775f Merge "ARM: dts: msm: Modify the "init-voltage" of PON rails for shima" 2020-08-26 04:59:22 -07:00
qctecmdr
5f75f1ec8a Merge "dt-bindings: Document the "qcom,qpnp-pdphy" binding" 2020-08-26 04:59:22 -07:00
qctecmdr
0a4f05c6c7 Merge "ARM: dts: msm: Add trustedvm enablement nodes for Shima" 2020-08-26 00:27:05 -07:00
qctecmdr
6f78d11111 Merge "ARM: dts: qcom: Add clocks to access KGSL SMMU register space" 2020-08-26 00:27:05 -07:00
qctecmdr
e86965385d Merge "dt-bindings: power: Update QPNP SMB5 documentation" 2020-08-26 00:27:05 -07:00
qctecmdr
7365594d14 Merge "dt-bindings: power: Update QG compatible strings and add IIO channels" 2020-08-26 00:27:05 -07:00
qctecmdr
e62e211f2f Merge "ARM: dts: msm: update cpuidle state definitions" 2020-08-25 20:50:03 -07:00
qctecmdr
67d837769b Merge "ARM: dts: msm: Update PCIe0 PHY settings to v1.00 for lahaina v1" 2020-08-25 20:50:03 -07:00
qctecmdr
db4b1b4b2e Merge "ARM: dts: msm: Add PMIC overlay to sdxlemur platforms" 2020-08-25 20:50:03 -07:00
qctecmdr
eccd321579 Merge "ARM: dts: msm: Swap interconnect masters" 2020-08-25 20:50:03 -07:00
Sarthak Garg
3d7a8360e6 ARM: dts: msm: Update DLL_CONFIG_3 and USR_CTL as per HSR 
Update DLL_CONFIG_3 and DLL_USR_CTL as per HSR.

Change-Id: I2ffca3c79f161f15e35895b67dc791af52d65500
 2020-08-25 20:38:50 +05:30
Odelu Kukatla
2948966094 ARM: dts: msm: Add utility factor for Holi 
Utility factor needs to be applied for aggregated bandwidth
so as to run the bus clock at required frequency.

Change-Id: Ia7c4369203b1ebb1db4f3ee3d5ce7a01bada45ce
 2020-08-24 22:17:17 -07:00
Odelu Kukatla
3fd626f927 dt-bindings: interconnect: update interconnect bindings 
Update the interconnect device bindings. These devices can be
used to describe any RPM and NoC based interconnect devices.

Change-Id: Icbeefc5dcbe0b1f8d0db8d429c7db3a4da20b71c
 2020-08-24 22:16:42 -07:00
Taniya Das
27aef351c9 ARM: dts: msm: Add interrupts for Limits for HOLI 
Add the LMH interrupt which are required to be registered to receive the
interrupts.

Change-Id: I2d1ebb9adc89fffcb5d7786eaf9f8750334d02fb
 2020-08-25 00:38:29 +05:30
Prudhvi Yarlagadda
4160d16d25 ARM: dts: msm: Add alias for uart nodes for shima 
Add alias for uart nodes in shima. This is needed to get the
hsuart bluetooth usecase node as ttyHS0. And alias is added
for console uart node also.

Change-Id: I194c40f5ce15824c2460b5f282fb06051db416f5
 2020-08-24 17:33:19 +05:30
Tao,Zhang
2985bc061b ARM: dts: msm: Increase the size for scandump on shima 
Increase the size for scandump ids from 0x1a4c0 to 0x40000 on
shima.

Change-Id: Ia522487d7eec3a94a636137681df8650f25c1c94
 2020-08-24 14:41:53 +08:00
Kiran Gunda
c79682e5e9 ARM: dts: msm: Modify the "init-voltage" of PON rails for shima 
Setting the "init-voltage" of the PON rails less than the default
voltage leads to momentary voltage dip on the regulator output.
To avoid this behaviour, set the "init-voltage" to a default
recommended value. Also add ACTIVE_ONLY and SLEEP_ONLY nodes for
LDO1C and LDO10C as per the clients requirement to vote for
ACTIVE and SLEEP votes.

Change-Id: I1e83e47a97cc013bbc1d5bc8c48cbe253b5932eb
 2020-08-24 12:08:20 +05:30
qctecmdr
8c41e5b755 Merge "ARM: dts: msm: enable dcc on holi" 2020-08-23 08:38:11 -07:00
qctecmdr
0e0a1e2c77 Merge "ARM: dts: msm: dtsi changes for holi" 2020-08-23 08:38:11 -07:00
qctecmdr
4c587de969 Merge "ARM: dts: msm: Update wlan configuration for holi" 2020-08-23 08:38:11 -07:00
qctecmdr
8148e596cd Merge "ARM: dts: msm: Add touchscreen device node for QRD holi" 2020-08-23 08:38:11 -07:00
qctecmdr
313208bb23 Merge "ARM: dts: msm: Enable SMMU S1 for USB on Holi" 2020-08-23 08:38:11 -07:00
qctecmdr
52ef11c98a Merge "ARM: dts: msm: Add gpu speed bin property for holi" 2020-08-23 08:38:11 -07:00
Vangala, Amarnath
a6af28860b ARM: dts: msm: fix to indetify proper adsp variant 
correct the fuse value read to identify the adsp SKU.

Change-Id: Ib100712ece632d09d43f9047a7e3ddd474170f29
 2020-08-23 11:31:48 +05:30
Shyam Kumar Thella
aff0ffb179 dt-bindings: power: Update QG compatible strings and add IIO channels 
Update QPNP QG compatible strings to distinguish between QG on different
PMICs.

Change-Id: I0eb19769b02143bef67fa934921e2dc420367003
 2020-08-22 15:17:54 +05:30
Mao Jinlong
f631221f2e ARM: dts: msm: Add llcc_1_dcache dump node for lahaina 
Add llcc_1_dcache dump node to support llcc_1_dcache register dump.

Change-Id: Ie34bbce73ac2db8a25599c9035dc48d79a9d149a
 2020-08-22 17:44:14 +08:00
Odelu Kukatla
19e6ce4fa2 dt-bindings: interconnect: add CPUCP L3 bindings 
Add bindings for the new interconnect CPUCP L3 driver.

Change-Id: I12ee7e6509fe18aef859ff36d17a8b40941d83dd
 2020-08-22 01:08:09 -07:00
Jishnu Prakash
473b7d8010 dt-bindings: power: Update QPNP SMB5 documentation 
Update QPNP SMB5 compatible strings to distinguish between
different charger PMICs. Also add documentation for usage of
io-channel-cells property.

Change-Id: Ice1f380ddc6f93652a92f8f596c6827710cbe1c5
 2020-08-22 10:50:53 +05:30
qctecmdr
7b58ffb39e Merge "ARM: dts: msm: Remove unused bite irq from msm watchdog for Shima" 2020-08-21 18:26:13 -07:00
Neeraj Upadhyay
41fd46db99 ARM: dts: msm: Remove unused bite irq from msm watchdog for Shima 
The bite irq is no longer used in the msm watchdog, so
the removal of this property is needed.

Change-Id: I586297e11dcd18504264c5e0c3831b7bcbf89880
 2020-08-21 09:11:52 -07:00
Neeraj Upadhyay
84003867e6 ARM: dts: msm: Remove msm watchdog node properties for Shima 
Due to the creation of a watchdog framework the bark time,
pet time, wakeup-enable, ipi-ping and userspace pet enable
properties have moved to configs in the kernel instead of
as properties of the device. This enables the ability to
to set these without the need to change them in the device
tree.

Change-Id: I65b24de8003bca72113ce5abdd18ebbaff9c1152
 2020-08-21 09:11:50 -07:00
Naveen Yadav
d3af7f07e0 ARM: dts: msm: Update frequency of xo_board and div of xo_board 
Update frequency of xo_board and accordingly update the div for bi_tcxo
clk. Also, add support for fixed pipe and usb3 clk.

Change-Id: Icea142d6fb20acebe128010f1b1efe6d73ab52f0
 2020-08-21 19:28:30 +05:30
qctecmdr
7874661508 Merge "ARM: dts: msm: Modify reset cti to cti6 for lahaina" 2020-08-21 06:50:21 -07:00
Pankaj Gupta
25feee4daa ARM: dts: msm: Add gpu speed bin property for holi 
Add gpu_speed_bin property in qfprom device node for holi.

Change-Id: Ia7e2ba73ebcd1b5a17da786f5394769e6e907833
 2020-08-21 17:54:03 +05:30
Yuanfang Zhang
c1a838847d ARM: dts: msm: Modify reset cti to cti6 for lahaina 
Modify reset cti of tmc to cti6 for lahaina.

Change-Id: I027e8295be6e56d6d31549b216f79fff76cce804
 2020-08-21 18:39:35 +08:00
Neeraj Upadhyay
6619b4aa4f ARM: dts: msm: Add trustedvm enablement nodes for Shima 
Add trusted VM configuration for Shima SoC.

Change-Id: Ib952633b425fd14f8d5279f246cd92c1243eab30
 2020-08-21 12:26:51 +05:30
Chris Lew
33a1a259b2 ARM: dts: msm: Change vcpu sched priority for trustedvm 
Change the vcpu scheduling priority to 0 in the trustedvm vmconfig.

Change-Id: I014d59ae156aeae699316d726dac55c9c2a93ade
 2020-08-20 19:35:54 -07:00