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875,492 commits

Author SHA1 Message Date
Can Guo
5935b509da phy: qcom-ufs: don't error out if vddp-ref-clk-supply is absent
vddp-ref-clk-supply is controlled by UFS host, so it can be absent in UFS
PHY's DT and shouldn't be considered as error.

Change-Id: I7f8af258c59851ccd8adceb73f9a6da62472e915
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:27 -08:00
Can Guo
a686b527a3 phy: qcom-ufs: make ref_clk as optional
Per newer UFS PHY design, some platforms may not have the ON/OFF control
for reference clock, hence this clock may be optional.

Change-Id: I26edd35970e88a8d17edded399b63c5d3cc7f5d9
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:24 -08:00
Can Guo
427b10e68e phy: qcom-ufs: separate out 2 lanes configuration
Some platforms have 2 UFS PHY instances, one instance supports 2-lane while
other instance supports only 1-lane. This change separates out the 2nd lane
configuration from 1-lane configuration so that we can apply the 2nd lane
configuration only if needed.

Change-Id: Idcf8aaa8ed7a9662c0f4186e5a28d2405f8fd5fc
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
[cang@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:21 -08:00
Can Guo
fee035811d phy: qcom-ufs: set no runtime PM callbacks flag
UFS PHY power management is managed by its parent (UFS host controller)
hence set the no runtime PM callbacks flag on UFS PHY device to
avoid any accidental attempt to call the PM callbacks for PHY device.

Change-Id: I06e6b140a98233e30d406754f0cdcdd27c834357
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:18 -08:00
Can Guo
d44fa17860 phy: qcom-ufs: parse ref-clk details prior to resource request
Do not request a resource if the ref clk regulator details are
not defined in ufs phy node.

Change-Id: I10eb426d4407388681340cb71fe9e761794dc298
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
[cang@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:15 -08:00
Can Guo
9542a206ae phy: qcom-ufs: remove warnings for optional clocks
tx_iface_clk and rx_iface_clk does not exist in newer version
of ufs-phy HW, hence remove the missing clk warnings for them.

Change-Id: Ic8dd3e9521159ce8da064da38cfa12e75f07209f
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[cang@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:12 -08:00
Can Guo
ce32edf88c phy: qcom-ufs: add optional ref aux clk
Newer platforms need an additional ref aux clk to be enabled, add support
for the new ref aux clk and make it optional as its not needed by other phy
versions.

Change-Id: I5e04980eb451b193e9c024bfe35383d10d17feff
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[cang@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:09 -08:00
Can Guo
9e33a5d6ae phy: qcom-ufs: don't probe for "dev_ref_clk_ctrl_mem"
This is handled in the ufs platform init. Drop the upstream
change that was missed in the ufs driver port to 4.4 kernel.

Change-Id: Ia3305f2b4f6c6eeafe3866833f2c98e186ad6632
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[cang@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:06 -08:00
Can Guo
73597f6e60 phy: qcom-ufs: remove failure when rx/tx_iface_clk are absent
Since in future UFS Phy's the tx_iface_clk and rx_iface_clk
are no longer exist, we should not fail when their initialization
fail, but rather just report with debug message.

Change-Id: I87e4deca632d4d4ee9e35a03f2fc9c22987255b3
Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
[cang@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: Can Guo <cang@codeaurora.org>
2019-12-17 18:37:03 -08:00
Asutosh Das
a27ae1c711 phy: phy-qcom-ufs: add receive line configuration
This is a snapshot of UFS phy driver taken as of commit
<Iece7757565b>
("ufs: Porting UFS driver's changes from kernel msm-4.14
to msm-kona")

Exposes a receive line configuration function.
This is to make sure that the RX LineCfg is enabled
before link-startup.

Change-Id: I73eb0caf65f14d7444c1c90228d2384e028ddbdc
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
2019-12-12 19:07:34 -08:00
Vipin Deep Kaur
e3225c64c9 dmaengine: gpi: Capture GPI hardware status during GSI General interrupt
Debug patch to capture GPI hardware status when a GSI General interrupt
is triggered.

Change-Id: I81a5d3858bd295383cd1079394fb161930d63913
Signed-off-by: Vipin Deep Kaur <vkaur@codeaurora.org>
2019-12-05 04:33:45 -08:00
qctecmdr
f97b25d749 Merge "arm64: defconfig: Enable CONFIG_I2C_RTC6226_QCA on Lahaina" 2019-12-05 02:36:07 -08:00
qctecmdr
75bffc503f Merge "arm64: defconfig: Enable RPMh clock driver for Lahaina" 2019-12-05 02:36:06 -08:00
qctecmdr
ad0c7ffd79 Merge "arm64: defconfig: Disable hvc console for lahaina SoC" 2019-12-04 16:37:28 -08:00
qctecmdr
f41050307f Merge "firmware: qcom-scm: Fix formatting errors in the trace string" 2019-12-04 14:57:36 -08:00
David Dai
3151b6e98d arm64: defconfig: Enable RPMh clock driver for Lahaina
Enable the RPMh clock driver so that consumers can vote
for real RPMh clocks.

Change-Id: I274f9035b93766473a15731814f16da9f80f4070
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-04 09:31:42 -08:00
qctecmdr
f7ef9d9893 Merge "msm: ipa: Add PIL driver as soft dependency for IPA" 2019-12-04 02:35:00 -08:00
qctecmdr
d4cf41dc2e Merge "media: v4l2-core: guard code against ABI breakage" 2019-12-04 02:34:59 -08:00
qctecmdr
5f14f07b0b Merge "defconfig: enable fastrpc driver on Lahaina" 2019-12-04 01:54:28 -08:00
qctecmdr
bf2389a109 Merge "clk: qcom: add clk rpmh support for Lahaina" 2019-12-04 01:22:17 -08:00
qctecmdr
4d3767fbbb Merge "msm: cvp: Disabe sys cache and dsp initialization" 2019-12-04 01:22:15 -08:00
qctecmdr
de44503b2e Merge "mm: cma: Reduce dmesg spam" 2019-12-04 00:47:31 -08:00
qctecmdr
f07284b38a Merge "mm: cma: restrict base_pfn exposure" 2019-12-04 00:47:30 -08:00
qctecmdr
99049a00e4 Merge "soc: qcom: Add spss transport for Glink Probe driver" 2019-12-04 00:06:54 -08:00
qctecmdr
106819260e Merge "arm64: defconfig: Enable GLINK Packet driver for Lahaina" 2019-12-04 00:06:53 -08:00
qctecmdr
2f61ee8554 Merge "checkpatch: check symlinks while searching compatible strings" 2019-12-04 00:06:52 -08:00
himta ram
4fbd0a6541 arm64: defconfig: Enable CONFIG_I2C_RTC6226_QCA on Lahaina
Enable FM driver as module in defconfig on Lahaina.

CRs-Fixed: 2578335
Change-Id: Ifdffd9591e5769aa881646eb523eb7f44c08ae75
Signed-off-by: himta ram <hram@codeaurora.org>
2019-12-03 22:44:31 -08:00
Edgar Flores
f745eaca11 defconfig: enable fastrpc driver on Lahaina
Enable compilation of the fastrpc driver on Lahaina, which
provides a communication mechanism that allows clients to
make remote method invocations across processor boundary
to applications, compute and sensors DSP processors.

Change-Id: I2a43104e260b3e129e3447840f3180843c10ce3a
Signed-off-by: Edgar Flores <edgarf@codeaurora.org>
2019-12-03 22:14:29 -08:00
himta ram
b6f9c071a2 media: v4l2-core: guard code against ABI breakage
Guard the code against ABI breakage using IS_ENABLED Helper macro.
Guarded code will be compiled when config is set to m or y.

CRs-Fixed: 2579332
Change-Id: Ic1a5ab22c8ced2c7b527bf5086c2c7b14fe24919
Signed-off-by: himta ram <hram@codeaurora.org>
2019-12-03 21:41:18 -08:00
George Shen
b12de3763b msm: cvp: Disabe sys cache and dsp initialization
System cache and DSP CVP driver not ready for Lahaina
bring up. Disable them until they are ready.

Change-Id: I70acfe8d53e527f7456084d72d93116a047f919a
Signed-off-by: George Shen <sqiao@codeaurora.org>
2019-12-03 18:16:39 -08:00
qctecmdr
3da863f0f8 Merge "ABI: aarch64: Update ABI snapshot based on v5.4" 2019-12-03 18:00:47 -08:00
qctecmdr
f8008953da Merge "dt-bindings: sound: Add GPR device tree bindings" 2019-12-03 18:00:47 -08:00
Murali Nalajala
4b52ed4ea1 checkpatch: check symlinks while searching compatible strings
"grep -r" option excludes symlinks. This breaks if there are symlinks
present in the bindings and actual source resides outside of the kernel.
To consider symlinks invoke grep with "-R" option.

Change-Id: Ie43876a0caee8f7f5a217391213cbb12efd52ff9
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
2019-12-03 17:09:16 -08:00
qctecmdr
aed6dbfc5b Merge "arm64: defconfig: Enable IPC IRQ bridge for Lahaina" 2019-12-03 16:27:01 -08:00
qctecmdr
f6ddaecb4f Merge "ion: msm: Move msm_ion probe to subsys_initcall_sync" 2019-12-03 16:27:00 -08:00
qctecmdr
9745a9b4af Merge "clk: qcom: dispcc: Fix stuck on warning for disp_cc_mdss_mdp_lut_clk" 2019-12-03 16:27:00 -08:00
qctecmdr
1e0cee8ff8 Merge "clk: qcom: dispcc: Voltage voting support for Lahaina" 2019-12-03 16:26:59 -08:00
qctecmdr
1768daa512 Merge "msm: ipa3: Fix to hold the clock until replenish the descriptors" 2019-12-03 15:33:49 -08:00
qctecmdr
5939f51cb4 Merge "msm: ipa3: Fix to increase timeout value for send command" 2019-12-03 15:33:49 -08:00
qctecmdr
0100b2ce16 Merge "mm: usercopy: skip stack page span check" 2019-12-03 15:33:49 -08:00
qctecmdr
eac37ae56c Merge "soc: qcom: secure_buffer: Move to subsys_initcall" 2019-12-03 15:33:48 -08:00
qctecmdr
acfac220ec Merge "arm64: defconfig: Enable the MSM ION heaps on Lahaina GKI" 2019-12-03 15:33:48 -08:00
Patrick Daly
9848b4d838 mm: cma: Reduce dmesg spam
CONFIG_CMA_DEBUG was #defining DEBUG, which has the side effect of
changing the behavior of pr_debug statements to always print into
the dmesg log, as opposed to printing only if they are enabled via
dynamic debug.

Log etiquette indicates that messages should only be printed for
error conditions.

Change-Id: I5eebc1060618a3abc87a7f85ae770505c991c017
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-03 14:01:37 -08:00
Prakash Gupta
01151d5fcf mm: cma: restrict base_pfn exposure
We are exposing cma region's base_pfn without any restriction. Make this
dependent on kptr_restrict configuration.

Change-Id: If454194cc5e7639f33b2e1dd29f5d925a17340c1
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-12-03 13:55:10 -08:00
David Dai
c957e677cf clk: qcom: add clk rpmh support for Lahaina
Add clock rpmh data to communicate with RPMH clocks for Lahaina.

Change-Id: I1291fbd77bd5412036023c3cad82f49d1ad3f0e5
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-03 13:51:59 -08:00
David Dai
5fb81a39ca dt-bindings: clock: Add rpmh header for Lahaina
Add new RPMH clocks for Lahaina.

Change-Id: Ie599365550887854a18549416ebb875135caab96
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-03 13:50:49 -08:00
Vignesh Kulothungan
1957106371 dt-bindings: sound: Add GPR device tree bindings
Add definitions for GPR domain id's and ADSP service
id's in device tree bindings.

Change-Id: I1d7d81893643287c5720a339b1eedbb6be92b4c4
Signed-off-by: Vignesh Kulothungan <vigneshk@codeaurora.org>
2019-12-03 13:35:45 -08:00
Jordan Crouse
ae4a818923 firmware: qcom-scm: Fix formatting errors in the trace string
Fix a handful of format errors in the trace string. Use a %llx for
u64 values.

Fixes: 873f25f ("firmware: qcom_scm: Add trace points to scm driver")
Change-Id: Ic0dedbad69ffdb044e094bfcb4e95f848338edd0
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2019-12-03 13:47:24 -07:00
Ghanim Fodi
2fe74a2fa4 msm: ipa: Add PIL driver as soft dependency for IPA
IPA driver uses PIL driver to load IPA firmware.
PIL driver need to be loaded before IPA driver for
GKI configuration.

Change-Id: Ib910bb7429bc739a95e47973332578806c5e5ca4
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
2019-12-03 08:49:48 -08:00
Ashok Vuyyuru
5dfa9644c3 msm: ipa3: Fix to hold the clock until replenish the descriptors
When CPU load is high IPA buffer replenish WQ scheduling got delayed
because of that not able to replenish the descriptors. Add changes to
hold the clock until replenish the minimum number of descriptors.

Change-Id: Iea79dcaa90d12fc4324522ba2c63dfcdfded2f90
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2019-12-03 04:19:16 -08:00