With support to move between LLCC TCM and DDR memory for USB RMNET
IN endpoint related data buffer, it is required to reset RMNET IN
endpoint related num_buf and buf_len while going from LLCC TCM memory
usage to DDR memory otherwise number of buffer and length remains same
as LLCC TCM based configuration.
Change-Id: Idc0aab865bd26a9824c116762be4a2a1ec89e919
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Ethernet VLAN frames are now encapsulated in IP/GRE on uplink,
while IP/GRE headers are stripped on downlink.
Change-Id: I8f8820abf390815ed1f4a3a81bf1943a1fecf310
Signed-off-by: Perry Randise <prandise@codeaurora.org>
Device power on and bus init should happen when all platform related
init are done since it means all platform configs are ready and it is
good to bring up device. Hence move them to the end of platform probe
call.
Change-Id: I22a69be4a25de6f8c45994dca23f6f631fd1474f
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Define a vdd_levels enum and vdd_corner[] mapping table which
can be used by clock controller drivers to configure the
vdd_class associated with their clocks.
Change-Id: Ie2ea878c10335a5d30ad4519bc3e85d10a8bd8e4
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
Commit 6076cdc395 ("usb: host: Disable system wakeup if remote
wakeup is not required")has introduced a check in xhci_plat_probe
where if device_may_wakeup is set for the parent device, then
device_wakeup_enable is called on xhci-plat, but calling
device_wakeup_enable without device_set_wakeup_capable is useless.
Now when xhci_plat_suspend is called the xhci_suspend will check
for device_may_wakeup and here the result will be FALSE.
In xhci suspend the do_wakeup is checked, if FALSE then it will
try to call xhci_disable_port_wake_on_bits where it will try
to do a readl operation. This will lead the core to hang since
xhci is already suspended and we tried to do a readl.
Fix this by replacing device_wakeup_enable with device_init_wakeup.
This will set the do_wakeup to be true and therefore avoid calling
xhci_disable_port_wake_on_bits and bail out when checked for
HCD_HW_ACCESSIBLE.
Change-Id: Id3fad841ebe07b777dc229ced36364ad31e6d81d
Signed-off-by: Udipto Goswami <ugoswami@codeaurora.org>
Update host capability message to inform host capability,
FW uses this information to decode host enabled feature list.
Enable clock selection feature when xo_clk_gpio is set in DTS.
Change-Id: Iea7e5863c67a29cfc9ff1fa7c654aeef6da48524
Signed-off-by: Kai Liu <kaliu@codeaurora.org>
Updated the QMI host capability message to inform about the
MLO host capabilities. FW uses information to initialize the
MLO related data structures.
Change-Id: Ib1d4d2adbd664907e6abd13d4370dc7b33d41b0d
Signed-off-by: Kai Liu <kaliu@codeaurora.org>
This bit should only be set when CM3_CGC clock gating is enabled,
Otherwise always live CM3 clock will make dead loop in CM3 clock
control FSM, No Effect If this bit is set to 0, this is the default
behavior.
Change-Id: I9052182bd05e38433e11bbfdfa1f1c48c980fc9b
Signed-off-by: Hui Li <hul@codeaurora.org>
