Commit graph

1,923 commits

Author SHA1 Message Date
Venkata Prahlad Valluru
6acbb2dea4 disp: msm: typecast variables as long long for 64 bit operations
Define 64 bit variables as unsigned long long to ensure
8 bytes in 32 bit builds.

Change-Id: I723ae0c4ba6a0de07c92d14eeef95bde095c8e3d
Signed-off-by: Venkata Prahlad Valluru <vvalluru@codeaurora.org>
2021-05-21 01:28:59 -07:00
Venkata Prahlad Valluru
6eab43458e techpack: display: fix div64 error for 32 bit build
use div_u64 instead of /, for 64 bit division.

Change-Id: I791e027beb6817810d63a6a2d0a1a29f88bdb5d5
Signed-off-by: Venkata Prahlad Valluru <vvalluru@codeaurora.org>
2021-05-21 01:28:43 -07:00
qctecmdr
41c8fc3cfe Merge "disp: msm: sde: modify in_clone_mode after wb_reset is done" 2021-05-20 05:52:33 -07:00
qctecmdr
8e46f0888f Merge "disp: msm: sde: correct num_datapath during PM resume with CWB" 2021-05-20 05:52:33 -07:00
Jayaprakash Madisetty
04f4d4028d disp: msm: sde: modify in_clone_mode after wb_reset is done
Add changes to modify the phys_enc->in_clone_mode variable
post wb_reset_state since this is a shared variable used
during atomic_check and atomic_commit. In current issue case,
wb_atomic_check has set in_clone_mode to true in commit N,
and in commit N-1 CWB is being disabled and re-sets the
in_clone_mode variable to false causing pp_done timeouts in
primary in commit N.

Change-Id: I8159bbdb5622a351d76bdc4dba75d48df20f4365
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-05-19 20:15:33 +05:30
Jayaprakash Madisetty
a799d5f7b6 disp: msm: sde: avoid seamless crtc transition when CWB is enabled
Add changes to avoid primary crtc seamless transition when CWB is
enabled in bootup first commit. This ensures atomic_enable gets called
for primary crtc in splash handoff commit and software states get updated.

Change-Id: I7faab3e4839ab6a69023790ee2874250091f32f0
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-05-18 17:41:33 +05:30
Jayaprakash Madisetty
6701a6127e disp: msm: sde: correct num_datapath during PM resume with CWB
In PM resume with CWB concurrency usecase, crtc pointer in
conn->state is NULL since drm_mode_config_reset operation is
performed on pm_resume. This change relies on conn_mask in
new_crtc_state for primary connector retrieval and also adds
get_num_lm_from_mode callback to DSI for LM count retrieval
from dsi panel topology. Existing get_mode_info api cannot
retrieve the topology info because mode->priv_info is NULL.
This occurs as WB encoder is added in the drm encoder_list
before primary encoder, introduced as part of commit d28ebf05f4
("disp: msm: sde: populate WB display encoder list before dsi").

Change-Id: I55358fd88ab778bd81475cf3628be13335de1cb5
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-05-18 13:08:57 +05:30
Anjaneya Prasad Musunuri
c93cae7d78 disp: msm: sde: remove feature from dirty list on validate failure
Remove feature from dirty list when feature validation fails.
This fixes recovery failure when feature validation fails in
atomic check operation.

Change-Id: I9a884520544c85d0f8ca6a954657f76b37856ad3
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
2021-05-06 11:23:01 +05:30
Yashwanth
bb6f15ba11 disp: msm: sde: flush commit thread queue during pm suspend
Following is the sequence during which issue is observed:

1) After suspend, resume commit is with doze suspend mode
(LP2) but kickoff didn't begin.
2) At the same time, runtime pm suspend is triggered which
makes idle request on pm suspend/resume thread.
3) Since the kickoff has not yet started on commit thread,
pending kickoff count is not updated and idle power
collapse sequence is started from pm suspend.
4) As part of idle, irqs are turned off from pm suspend
thread which are turned on commit thread after kickoff
before pp tx irq arrives.

In such cases, during pm suspend, commit thread workqueue
is flushed before encoder idle request to prevent irq's
from getting turned off before the transfer is complete to
avoid inconsistent state.

Change-Id: I417ece0ae7021b0fc5005e262a0d87e43ac729be
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-03 10:43:52 +05:30
qctecmdr
fbe759f998 Merge "disp: msm: sde: allow input fence status show only when kickoff in progress" 2021-04-28 09:25:50 -07:00
qctecmdr
132e98b1a5 Merge "disp: msm: avoid deadlock by prepending connection_mutex" 2021-04-28 09:25:49 -07:00
Andhavarapu Karthik
81b58ee731 disp: msm: sde: allow input fence status show only when kickoff in progress
Allow input fence status read only when crtc kickoff is in
progress to avoid race between status read and fence destroy.

Change-Id: I3402bfcb38940628f09f645a3cee31f821daeae9
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-04-28 16:10:19 +05:30
qctecmdr
ba930012ea Merge "disp: msm: sde: add reg log minidump partition" 2021-04-27 11:11:50 -07:00
Mahadevan
94f831f4cf disp: msm: avoid deadlock by prepending connection_mutex
Commit caused by dpms on may use extra  modeset lock on
connection_mutex before msm_atomic_commit, so to avoid
deadlock, make the modeset lock within msm_atomic_commit
to be used before the waiting for pending_crtcs_event.

Change-Id: Ic43af0f775d87ccc1d145ead9cb2e1b65018c86f
Signed-off-by: Mahadevan <mahap@codeaurora.org>
2021-04-23 12:29:51 +05:30
Jayaprakash Madisetty
061744ebb0 disp: msm: sde: increase kickoff timeout for doze usecase
This change increases the kickoff timeout in doze and
doze suspend usecases. This avoids false timeouts seen
in doze due to rscc static wakeup configured at a different
fps from actual panel TE.

Change-Id: I11c94eb40d4dbbc3d95b8268b007580599ee90fd
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-04-23 12:10:27 +05:30
Andhavarapu Karthik
ae9f6d8dce disp: msm: sde: add reg log minidump partition
Changes are made to add reg log to minidump.

Change-Id: I703075ae22cfa0d987e4bb51ebc28dcdf13baa46
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-04-23 02:04:45 +05:30
Andhavarapu Karthik
361a8e3351 disp: msm: sde: add sde and vbif debug bus to minidump
Changes are made to add sde and vbif debug bus to minidump.

Change-Id: I8fc615c57e14bf2aa0b814ebda2270cd3124c794
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-04-22 22:31:34 +05:30
Andhavarapu Karthik
7ad0876fa7 disp: msm: sde: add evt log minidump partition
Changes are made to add wrapper function to add a minidump
partition. Also, to add evt log to minidump.

Change-Id: I1204a965bab9db72cb3d381a2817dbe8ef723c66
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-04-22 22:29:43 +05:30
qctecmdr
7c7bd0d4f9 Merge "disp: msm: sde: avoid using spinlock for register log" 2021-04-16 23:00:16 -07:00
qctecmdr
aa52bf2dbd Merge "disp: msm: sde: fix tracking of pending rsvps" 2021-04-16 23:00:16 -07:00
qctecmdr
cc95761e56 Merge "disp: msm: dp: inform multi-func support to usb driver" 2021-04-16 23:00:15 -07:00
qctecmdr
c27837e496 Merge "disp: msm: sde: perform only soft reset during timeout scenarios" 2021-04-06 07:15:27 -07:00
qctecmdr
caa4b966e5 Merge "display: get unifdef explicitly" 2021-04-06 07:15:27 -07:00
qctecmdr
93e1437390 Merge "disp: msm: sde: add support for CWB ROI cropping feature" 2021-04-06 07:15:26 -07:00
Sankeerth Billakanti
e3f86bb93a disp: msm: dp: inform multi-func support to usb driver
The usb controller driver does not know if DP is
supported / connected and whether it is operating in
concurrent mode. So, whenever there is a ucsi role switch
call to the usb controller driver, it will reset the usb
phy irrespective of DP connection.

The phy reset while DP driver is still processing cable
connect or disconnect will cause aux timeout or NOC errors.
This change will inform the usb controller driver about the
multi_func mode support to convey how many lanes DP will
be using.

Change-Id: I9e96ed399e879820ddd238cf0fbed7069f1de60d
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
2021-04-03 00:08:08 -07:00
Naseer Ahmed
7f14a08b68 display: get unifdef explicitly
get unifdef explicitly when enabled with argument

Change-Id: I9f12da913c7058279f14ecceedde3bfe64be9086
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Signed-off-by: Abhijith Desai <abdesai@codeaurora.org>
2021-04-02 12:26:40 +05:30
Yashwanth
f77088a040 disp: msm: sde: perform only soft reset during timeout scenarios
During wait for commit done failure cases in the current
code in video mode and command mode(posted start), global
atomic state for current crtc state will be assigned NULL
during state swap which will lead to crash while using
drm_atomic_crtc_state_for_each_plane API. Also in such
timeout cases, border color staging and kickoff being
done without any vblank wait might lead to inconsistent
state because of configuration overriding from the next
commit. Since the timeout is observed at the end of commit
cycle, only soft reset should be done here and remaining
in the next commit cycle.

Change-Id: I0d42dc27035f4f79394aeec347d797c99ed76e5f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-04-01 12:48:44 +05:30
qctecmdr
025b38d4f8 Merge "disp: msm: sde: flush event thread workqueue before vm release" 2021-03-31 05:31:54 -07:00
Steve Cohen
d5c892e850 disp: msm: sde: fix tracking of pending rsvps
Previous logic expected rsvp_nxt to always be the 2nd rsvp for
a given encoder. This does not work for releasing back-to-back
test-only reservations (with no current rsvp). If new
resources become available between the 2 test-only commits we
may end up reserving more resources than necessary. Change the
logic by adding a pending flag to the rsvp to simplify lookup
of both current and pending/next resource reservations.

Change-Id: Iefa8085f1b4c0cf49bb744dcc2deb7fb92608454
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-03-31 12:11:00 +05:30
Yashwanth
d847273f71 disp: msm: sde: flush event thread workqueue before vm release
In some cases while transitioning between vm, vblank
work might be get executed on event thread after handoff is
completed on commit thread leading to crash. This change
flush the event thread queue during vm pre-release before
lending the io resources to the other vm.

Change-Id: I6a504fc2cec1c4985f7674bbca7fc5869bd8ad07
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-31 11:22:32 +05:30
qctecmdr
1794d92be3 Merge "disp: msm: sde: add check for unsupported writeback output formats" 2021-03-30 06:20:38 -07:00
Andhavarapu Karthik
72707666f2 disp: msm: sde: add check for unsupported writeback output formats
Chroma sample types H1V2 and H2V1 are not supported in write back output.
Made changes to add atomic check for such unsupported output formats in
writeback.

Change-Id: Ic37865e0b0c64016df728cc753ad66c3b9e9d138
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-03-30 13:15:38 +05:30
Yashwanth
6b4a148d58 disp: msm: sde: avoid using spinlock for register log
Add support to use atomic variable instead of spinlock
for register logs during register write. This change
helps in reducing the run-time and is safe to use as
most of the register writes happen in commit context.

Change-Id: Ib7e377f80cbf437e391792b0b424cbd1eefdf497
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-24 12:58:15 +05:30
qctecmdr
0ed04a31a3 Merge "disp: msm: dp: fix mode filtering for 4K120" 2021-03-23 02:09:25 -07:00
qctecmdr
1a538bf4a5 Merge "disp: msm: sde: re-sechedule idle pc event in esd failure case" 2021-03-23 02:09:25 -07:00
Amine Najahi
2da07fd73d disp: msm: dp: fix mode filtering for 4K120
Currently, 4K120 mode is being filtered by DP driver
due to invalid topology assignation. When 4 LMs are
needed, the number of DSCs must match the number of
LMs since only DSCMERGE based topologies are supported
for driving DSC capable panels.

This change fixes the topology validation logic and
aggregates LM and DSC validation functions in the topology
one since the number of LMs and DSCs must now be considered
in calculating the topology requirement.

Change-Id: I95577eabb34068cd490d23e70ffbb899d1c2d03a
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-03-22 11:34:40 -04:00
Samantha Tran
dfae404347 disp: msm: sde: add support for CWB ROI cropping feature
This change exposes capabilities for CWB ROI to userspace
as well as implements the cropping feature which is now supported.

Change-Id: Idf76727175bf7c183367be715eaa45f3a432640c
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-19 17:29:01 +05:30
Mahadevan
8343bb90a0 disp: msm: sde: re-sechedule idle pc event in esd failure case
1. When panel esd check fails, rc_state request to ON will occur
   in event thread.
2. This ON state is not guaranteed since idle pc event can occur
   in parallel on commit thread if frame pending count reaches 0.
3. ESD thread is trying to switch vsync at this point to avoid RSC
   hang, but idle pc event has disabled clocks causing NOC error.
To avoid such condition this patch re-schedules idle work which
allows completion of display failure notification before the device
enters idle state. This re-scheduling is achieved by modifying early
return in rc_restart_delayed introduced as part of commit 63107e09b3
("disp: msm: sde: allow delayed_off_work scheduling always").

Change-Id: Ie1a1964b92fe1c681cdf0fc5e10591ef14b2d4c3
Signed-off-by: Mahadevan <mahap@codeaurora.org>
2021-03-19 12:41:08 +05:30
qctecmdr
5bbd5f8e7a Merge "disp: msm: sde: copyright fix for hw dsc file" 2021-03-18 02:20:38 -07:00
qctecmdr
6187bc9792 Merge "disp: msm: sde: handle LTM switch in and out of dual pipe merge mode" 2021-03-18 02:20:38 -07:00
qctecmdr
345b9593c8 Merge "disp: msm: sde: add cached lut flag in sde plane" 2021-03-18 02:20:37 -07:00
Andhavarapu Karthik
82f6c103e8 disp: msm: sde: copyright fix for hw dsc file
Fix copyright with appropriate year in hw dsc file.

Change-Id: I77031951e980e622630869c9df2cf9c673da1454
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-03-16 19:22:44 +05:30
qctecmdr
95736aa470 Merge "disp: msm: sde: avoid ctl_reset during display disable sequence" 2021-03-15 23:30:34 -07:00
Ping Li
288ccc1fb7 disp: msm: sde: handle LTM switch in and out of dual pipe merge mode
When LTM is switching on/off, merge_mode bit value gets toggled between
0x1 (dual pipe merge configuration) and 0x0 (single pipe configuration).
It is illegal to reconfigure LTM to/from dual-pipe merge mode before
both LTM instances have completed their current workloads. This change
adds support to disable merge_mode one frame after histogram is disabled
to make sure both hardware instances are completely idle and avoid
corrupted histogram data collection.

Change-Id: I9a6b5cbfb69e8af7936749e57fe7c8f7c2703b95
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-03-15 10:21:42 -07:00
qctecmdr
b08debdf29 Merge "disp: msm: sde: remove static access specifier for sde_dbg_base" 2021-03-10 20:50:21 -08:00
qctecmdr
1e2af48fc4 Merge "disp: msm: sde: add ctl reset during wait for commit done timeout" 2021-03-10 20:50:21 -08:00
Jayaprakash Madisetty
a36b7424ff disp: msm: sde: avoid ctl_reset during display disable sequence
When SW writes to the CTL_SW_RESET register, the hardware
enters a sequence to stop pending OTs and once that’s done
it asserts sw_reset to that CTL path for exactly 100 mdp_clks.
This is hardcoded in the HW design for many generations. The
sw_reset propagates to all the MDP hardware blocks on mdp_clk
and pixel_clk. When the mdpclk : pclk ratio is greater than 100
mdp_clk pulse isn’t long enough to reset the read side. So,
the async FIFO (i.e. the hardware responsible to transfer pixels
from mdp_clk to pixel_clk) only gets partially reset. The mdp_clk
side is reset but the pixel_clk side does NOT. The async FIFO is
in a bad state and believes there’s data in the FIFO. At this
point, the "valid" sent to DSI controller gets flatlined high
and DSI believes transfers are initiated eventually leading
to underflow once panel commands are initiated.

Add changes in software sequence to avoid triggering ctl_reset
to due to above HW limitation.

Change-Id: Iae44dba6ef59cbd5869a7f336af5dd38f93eafdd
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-03-10 16:10:34 +05:30
Yashwanth
fc9b0e31fb disp: msm: sde: add cached lut flag in sde plane
Below is the sequence during which issue is observed
while using stale lut values:

1) Scaler block is enabled in the VIG pipe along with the
valid lut configuration.

2) Idle work gets scheduled and GDSC is turned off erasing
the saved lut values.

3) At the same time, userspace sends a commit assuming lut
values are still valid resulting in artifacts on the
screen.

In the plane state scaler config, only lut flag will be
reset for subsequent commits and remaining properties such
as filter cfgs, lut_idx etc. remains same. This change
caches the lut flag in sde plane whenever the lut is being
set and reuses this flag to handle above issue.

Change-Id: Ice22f811ecc8094834f66e2020d33b01bb951bb0
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-10 15:51:28 +05:30
Yashwanth
e603c2e5a0 disp: msm: sde: add ctl reset during wait for commit done timeout
During one of the DP timeout usecases, flush doesn't take
effect due to vid vblank wait failure. As a result, smmu
faults are observed because of fetching the previously
staged planes. This change adds ctl reset in the same
DP atomic commit context to recover and avoid
smmu faults.

Change-Id: I2f9aceca56e27f140607317f7596d6fe0d908af8
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-09 14:49:19 +05:30
Yashwanth
473f90a236 disp: msm: sde: remove static access specifier for sde_dbg_base
In DLKM builds, all the display symbols are included as part
of msm_drm.ko and symbols are dynamically linked while
loading ramdumps. This change removes static specifier for
sde_dbg_base in order to access the variable from ramparser
and extract the required logs with the help of ramparser
tool and also in automation stability runs.

Change-Id: I3eae0bc9db3bd285642bf9f7930a31ab47c446e3
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-09 10:45:21 +05:30