Commit graph

898,703 commits

Author SHA1 Message Date
Vinay Sudra
7a5cc733fe defconfig: sdmsteppeauto: Enable kenel debug flags
Enable debug flags for various kernel subsystem

Change-Id: I3e61d072a935811ecece09e45870e0e200a45bb0
Signed-off-by: Vinay Sudra <vsudra@codeaurora.org>
2021-05-09 23:48:06 -07:00
qctecmdr
45a1229071 Merge "msm: adsprpc: return fastrpc ioctl call if process exit sequence start" 2021-05-08 09:42:59 -07:00
qctecmdr
899be810b4 Merge "msm: kgsl: Print the process id for the context on a pagefault" 2021-05-08 07:00:06 -07:00
qctecmdr
37c10a988e Merge "pci: msm: Use framework API to enable AER for endpoints" 2021-05-08 04:17:20 -07:00
qctecmdr
aefbccb56c Merge "slatecom-events-bridge: Add driver for events from Slate" 2021-05-08 01:30:21 -07:00
Hemant Kumar
9ecf13f417 pci: msm: Use framework API to enable AER for endpoints
Currently advanced error reporting is enabled by pci msm
controller driver using custom API. Since AER root port
service driver provides exported API
pci_enable_pcie_error_reporting() use this API to enable
support for AER and get rid of custom API. Framework API
needs to be wrapped under QGKI kernel config to prevent
GKI ABI breakage.

Change-Id: I3856fdc958a6234fe5e0a888733ce9f57fa5a48e
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-07 10:39:47 -07:00
qctecmdr
e9d55dd9b8 Merge "iommu/arm-smmu: sign extend iova for fault handler" 2021-05-07 10:25:17 -07:00
qctecmdr
460f85c07a Merge "defconfig: steepauto: Enable INCFS" 2021-05-07 10:25:17 -07:00
qctecmdr
9e8437a8e5 Merge "defconfig: autogvm: Enable INCFS" 2021-05-07 10:25:16 -07:00
qctecmdr
83157d9075 Merge "defconfig: gen3auto: Enable INCFS" 2021-05-07 10:25:16 -07:00
qctecmdr
34c54ac16d Merge "arm: defconfig: Enable PCI Express AER driver" 2021-05-07 10:25:16 -07:00
qctecmdr
b382f222c2 Merge "serial: msm_geni_serial: Allow clock_on/off ioctl to be optional" 2021-05-07 10:25:15 -07:00
Jeya R
2a98c1c02d msm: adsprpc: return fastrpc ioctl call if process exit sequence start
Added check to return fastrpc ioctl call when process exit sequence is
in progress.

Change-Id: I83915cb3fb75cc69d245a56800dcf42b492e01ea
Acked-by: Nishant Chaubey <chaubey@qti.qualcomm.com>
Signed-off-by: Jeya R <jeyr@codeaurora.org>
2021-05-07 12:18:40 +05:30
qctecmdr
dcb612382b Merge "scsi: ufs: Narrow down fast pass in system suspend path" 2021-05-06 22:23:00 -07:00
qctecmdr
ede504cedc Merge "defconfig: autogvm: Enable boot marker for KPI measurement" 2021-05-06 22:23:00 -07:00
qctecmdr
39d09dfcce Merge "usb: f_fs: Fix use-after-free for epfile" 2021-05-06 22:23:00 -07:00
qctecmdr
a5af1843ad Merge "mtd: msm_qpic_nand: Enable Pagescope read feature and reset status_desc" 2021-05-06 22:22:59 -07:00
qctecmdr
36d9ba8f4c Merge "sched/walt: consider average max_nr when compare max_nr" 2021-05-06 22:22:59 -07:00
qctecmdr
54a9c89962 Merge "icnss2: Add support for MHI state info" 2021-05-06 22:22:59 -07:00
qctecmdr
5ab7307c8a Merge "adsprpc: Map dynamic loading memory persistent" 2021-05-06 22:22:58 -07:00
qctecmdr
e3e00bfbe0 Merge "power: qcom: Add QTI QBG(Qualcomm Battery Gauging) driver" 2021-05-06 22:22:58 -07:00
qctecmdr
7b79fdc03f Merge "defconfig: Add initial defconfig fragments for scuba" 2021-05-06 22:22:58 -07:00
qctecmdr
5aeb2f7dfe Merge "PCIe: ASPM: Save/restore ASPM-L1SS controls in reverse order" 2021-05-06 22:22:57 -07:00
Ashish Kori
790ab2f4d7 serial: msm_geni_serial: Allow clock_on/off ioctl to be optional
Add support in the driver to manage power without enabling pm runtime.
UART driver gives control to user space client to vote for clock on/off
by exposing ioctls. These vote clock on/off APIs depend on PM runtime
framework for power related operations.

This change relaxes driver from depending on userspace ioctls to invoke
runtime resume/suspend for basic uart functionality which will now be
done by system suspend/resume. This will block PM framework API's and
use system suspend/resume API for UART on/off.

Change-Id: Idf0632c0e2d40907f7a226cd7e3e814d1c1f6751
Signed-off-by: Ashish Kori <akori@codeaurora.org>
2021-05-06 21:53:14 -07:00
Ajit Kumar
3f8d1181b9 slatecom-events-bridge: Add driver for events from Slate
Add driver to send and receive events from Slate
co-processor. The driver uses Glink channel to communicate
with Slate.

Change-Id: I2b7cf9a47e8947f79c7e9cd8b1311ff8c04bf848
Signed-off-by: Ajit Kumar <kajit@codeaurora.org>
2021-05-07 10:22:16 +05:30
qctecmdr
b794964c98 Merge "cnss2: Restore PCIe config space before enable PCIe device" 2021-05-06 19:07:09 -07:00
qctecmdr
ef335b8083 Merge "msm: ep-pcie: Give BAR0 and BAR2 the right size" 2021-05-06 19:07:08 -07:00
qctecmdr
03fb5fd7c5 Merge "mtd: msm_qpic_nand: Remove the SW workaround on sdxlemur" 2021-05-06 19:07:08 -07:00
qctecmdr
752f6f5a25 Merge "msm: kgsl: Update A660 variant GPU revision number" 2021-05-06 19:07:07 -07:00
qctecmdr
1d9b786a0b Merge "arm64: kexec_file: add crash dump support" 2021-05-06 19:07:07 -07:00
qctecmdr
7659c1bb0f Merge "defconfig: gen3auto: enable BPFtrace userland tools" 2021-05-06 19:07:07 -07:00
qctecmdr
824637b721 Merge "defconfig: Enable support for cpuidle for monaco" 2021-05-06 19:07:06 -07:00
qctecmdr
c8ef6a8b1c Merge "msm: veth_ipa: page fault during VETH0 bring up fix" 2021-05-06 19:07:06 -07:00
qctecmdr
a6761c3916 Merge "drivers: pinctrl: Add gpio to mpm mapping for Monaco" 2021-05-06 19:07:06 -07:00
Hemant Kumar
bb5ba33eb5 arm: defconfig: Enable PCI Express AER driver
Enable this driver to allow using standard APIs
to enable and disable AER support in endpoint
driver. In order to enable this driver
CONFIG_PCI_QTI needs to be enabled to prevent
GKI ABI breakage for GKI enabled configuration.

Change-Id: Icec7e6b10a7449d7dcf011afd73e1c573c16c8c5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-06 09:40:36 -07:00
Venkata Rao Kakani
66a40d0955 defconfig: autogvm: Enable INCFS
Enable CONFIG_INCREMENTAL_FS in LA guest to support APK
updates.

Change-Id: I0c202ba7d28b7393dcb47544728f8c042137ea28
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-06 21:17:19 +05:30
Venkata Rao Kakani
9d079292f3 defconfig: gen3auto: Enable INCFS
Enable CONFIG_INCREMENTAL_FS in LA to support APK
updates.

Change-Id: I3dda81703af139c3554993c725189215c28f386c
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-06 07:07:58 -07:00
Venkata Rao Kakani
ce507db597 defconfig: steepauto: Enable INCFS
Enable CONFIG_INCREMENTAL_FS in LA to support APK
updates.

Change-Id: Idf3c93412d5a87c9df7ac5e88ccdc0bae114621f
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-06 07:07:20 -07:00
Vinay Sudra
c211b368e2 defconfig: autogvm: Enable boot marker for KPI measurement
Enable boot time marker config options for Linux GVM targets.

Change-Id: I928ddfcac740a6f3b7bb9e5cffbd8e81daca73d6
Signed-off-by: Vinay Sudra <vsudra@codeaurora.org>
2021-05-05 21:48:40 -07:00
Hongwei Ren
e842eb0771 defconfig: Add initial defconfig fragments for scuba
Add initial defconfig fragments bengal_GKI.config,
bengal_QGKI.config, and bengal_debug.config for scuba.

Change-Id: I548eab2b6fe62247fe2a413eba173072cd54ec22
Signed-off-by: Hongwei Ren <hongren@codeaurora.org>
2021-05-05 21:36:16 -07:00
Hemant Kumar
787d287d9e PCIe: ASPM: Save/restore ASPM-L1SS controls in reverse order
Commit 54fdb1e448 ("PCIe: ASPM: Save/restore ASPM-L1SS
controls for suspend/resume") restores PCI_L1SS_CTL1, then
PCI_L1SS_CTL2. It should do those in the reverse order, since
the Enable bits are in PCI_L1SS_CTL1.  It also restores L1SS
state before we restore the PCIe Capability potentially enabling
ASPM as a whole. Fix the issue by changing order for both save
and restore.

Change-Id: I84e3db25b651b93dd4c037fa287f58edde90407a
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-05 13:52:20 -07:00
AKASHI Takahiro
cc61becf8f arm64: kexec_file: add crash dump support
Enabling crash dump (kdump) includes
* prepare contents of ELF header of a core dump file, /proc/vmcore,
  using crash_prepare_elf64_headers(), and
* add two device tree properties, "linux,usable-memory-range" and
  "linux,elfcorehdr", which represent respectively a memory range
  to be used by crash dump kernel and the header's location

Change-Id: I0dd87adc9e9c958467ed6a7e822f826635b77504
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Tested-and-reviewed-by: Bhupesh Sharma <bhsharma@redhat.com>
Git-commit: 3751e728cef2908c15974a5ae44627fd41ef3362
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Akshay Adiga <aadiga@codeaurora.org>
2021-05-05 13:48:03 -07:00
Anthony Mah
e11de4eab7 defconfig: gen3auto: enable BPFtrace userland tools
FR for K5.4 on automotive to enable bpftrace for simplified
debugging.  bug: b/172247134.

Change-Id: I1a98d83de0c15c6268304c4b3e69ef97395b1a75
Signed-off-by: Anthony Mah <amah@codeaurora.org>
2021-05-05 09:51:22 -07:00
qctecmdr
a9eb6ca4c9 Merge "spi: spi-msm-geni: Keep device to suspend if PM call fails" 2021-05-05 07:04:00 -07:00
qctecmdr
2940ea5d3d Merge "power: smb5-lib: Improve the charge-termination WA handling" 2021-05-05 07:04:00 -07:00
qctecmdr
c5a53f9a92 Merge "usb: gadget: f_gsi: Add support to enable/disable using TCM MEM" 2021-05-05 07:03:59 -07:00
qctecmdr
e4c91ca621 Merge "defconfig: sdmsteppeauto: Enable boot marker and rpmh master stats driver" 2021-05-05 07:03:59 -07:00
Srinivas Rao L
598e0e2ea2 drivers: pinctrl: Add gpio to mpm mapping for Monaco
Add gpio to mpm  mapping for the wakeup capable gpio interrupts

Change-Id: If366a57efdb33b68b3283a7d81760ab62eb634d3
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
2021-05-05 05:49:07 -07:00
Srinivas Rao L
618e2b8131 drivers: irqchip: Add Monaco MPM wake interrupt mapping
Add wakeup capable interrupts mapping for MPM.

Change-Id: Ia2e02bf22ea32cafdb7a5327470aafd01cf05ad4
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
2021-05-05 05:48:55 -07:00
qctecmdr
b2d000088e Merge "cnss2: Print address range for minidump region" 2021-05-05 04:13:03 -07:00