Clean up the GMU probe to use standard functions and proper reference to
make it more defer tolerant.
Change-Id: Ic0dedbad7c561e24c07053ea3b19ef62e34621cb
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Fix the RGMU probe to use standard helper functions and do proper
reference counting.
Change-Id: Ic0dedbadf5af14338de83cd9041674cc6f1ea304
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Currently, there is a custom hw_isidle function defined for a6xx but the
function pointer is removed in a6xx_start for non GMU/RGMU a6xx targets
which has the effect of falling back to the generic adreno_hw_isidle
function which confused at least two of us before we figured out what
was happening.
Instead of having a generic adreno_hw_isidle function except for a6xx, add
a hw_isidle function hook for all targets and do the GMU check in the
a6xx specific function. This also has the advantage of moving a a540
specific hack into the a5xx code and removes one of two usages of the
gpucore specific busy mask and the other is in soft fault detect.
Arguably we should get rid that too but for now we can just hardcode
the mask in there and remove the busy mask from the gpucore struct.
And finally it looks like adreno_isidle isn't used as a function hook,
so remove it from the device function tables and mark it static.
Change-Id: Ic0dedbad47fa5dee0e5d903a8f9dd9bf7230b759
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
a6xx added a new function hook and path for doing a GPU reset that fell
back to the default reset path for a610 but a610 purposely skipped
soft reset and the hard reset path is very similar to that used by
GMU/RGMU enabled devices except for one little bit.
Furthermore, if a610 skipped soft reset then there are no a6xx targets
that do soft reset so there is no reason to have an a6xx specific
soft reset path. And further to that, there isn't any reason to have
any a6xx specific functions (like oob) in the generic soft reset path.
Make the a6xx reset support all a6xx targets, remove unused infrastructure
from the rest of the generic code and cleanup the generic functions
to be a little bit easier to understand.
Change-Id: Ic0dedbadd3570fe148a464ff0dc647d91099ae09
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
This is a snapshot of the vibrator LDO driver as of msm-4.19
'commit c527cd5c987ac (Merge "mhi: cntrl: qcom: allow printing
large strings to IPC logs")' with the following modifications:
- Replace snprintf with scnprintf.
Change-Id: Id58fbcc33607c309366104fe72282c09c86a3227
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
smmu_domain logger is freed as part of error handling in
arm_smmu_init_domain_context. But smmu_domain->logger is still non null.
This cause smmu_domain->logger to be accessed during domain free. Fix
this.
Fixes: f1746fc8a009 ("iommu: qti: Track iommu domains")
Change-Id: I82a7f9121b78ca9338d202694dbc0a98150f0c92
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
BAM endpoint TRB ring has usage of 2 TRBs (normal and LINK), and
completion API (dwc3_msm_req_complete_func()) currently only
increments dequeue pointer by 1 assuming that dwc3_gadget_giveback()
does increment dequeue pointer for normal TRB. With newer changes
in dwc3 gadget framework, it moves requests to cancelled list with
usb_ep_dequeue() and reclaim those TRBs on end transfer command
completion. Reclaiming TRB back to trb pool is done only when
req->num_trbs is non zero. dwc3_msm_ep_queue() API checks for
enqueue and dequeue pointers, and on mismatch of it error out.
This results into no BAM2BAM communication after trying to use USB
as sink with QDSS usecase. Fix this issue by incrementing req->num_trbs
with dwc3_msm_ep_queue() API for normal TRB so dequeue pointer is
incremented with dwc3_gadget_ep_cleanup_cancelled_requests() API.
Change-Id: I0777aea7c6add7fb6fea7ea74056786e33435427
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
