Diag client uses asynchronous writes for data transfer.
Adding write_iter API in mhi to support the same.
Change-Id: If14ebdd4aa848046abd15ea93d939691c6962fcd
Signed-off-by: Gauri Joshi <gaurjosh@codeaurora.org>
Remove IPA offload config as IOSSv1 glue driver has also been
removed for Realtek.
Change-Id: I3007c300a27cac1eda114109a6f085efb4b4abb3
Signed-off-by: Akshaya Damodaran <adamodar@codeaurora.org>
Changed logic to find Lower Band Limit from Search Up from current
channel with Wrap enable to tuning to Lower Band Limit + chan space
and Search Down with Wrap disable.
Change-Id: I79a686238d96db5dd5df9436b346b465435ae4f5
Signed-off-by: Prateek Raj Singh <pratsing@codeaurora.org>
Collect the ram dumps when process is
initialized and process is not cleaned
on DSP to fix UAF on init memory.
Change-Id: I3ddae176039efa57e057eca730e7ed1cec706484
Acked-by: Krishnaiah Tadakamalla <ktadakam@qti.qualcomm.com>
Signed-off-by: Jeya R <jeyr@codeaurora.org>
This change will add support to vote for SMPS node if
regulator handle is provided in DTS source.
Change-Id: I7519b6c2b93c85a4f4bf7e26ca0b72ef03df094b
Signed-off-by: Sandeep Singh <sandsing@codeaurora.org>
Move the logging of CPUFreq HW debug registers from debugfs to
sysfs under /sys/kernel/qcom-cpufreq-hw.
Change-Id: I2d23052d013125ee69de852dcec621c104f0d50a
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
Some PMICs such as PM5100 does not have the HBOOST peripheral
for haptics input supply. Add a new compatible string to avoid
accessing the non-existent HBOOST peripheral and also make the
necessary configurations required for hpwr supply.
Change-Id: I84301115706ee59984f7b051bc467d1537bbad29
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Sysmon subsystem driver exposes API to query various
SoC level Q6 load, power statistics from the shared
memory exported by the remote processor.
Change-Id: I84da55d0f72a0c9d0c4a90a78d8589079aa9b93e
Signed-off-by: Bavyasritha Alahari <alahari@codeaurora.org>
Add geni_ios changes to log RFR line status in GENI_IOS register.
Also set GENI FORCE_DEFAULT after performing TX/RX Abort Sequence.
Change-Id: I995e5cd864cd1f54dd295b82d887c8df3452e706
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
During system suspend/resume testing, when console is in suspended
state and clocks are OFF. Seems UART console used to dump some info on
console and leading to NOC fault.
To fix this issue add defensive check in msm_geni_serial_start_tx() api.
Change-Id: I27edd7814e28946449afe256f72f7cb1c868822e
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
PCI RC driver is removing EP shadow support to restore EP's config space.
So update cnss driver accordingly.
Change-Id: I562de4b338dcf2204d73b9d5fafebf9e597c7b42
Signed-off-by: Paul Zhang <paulz@codeaurora.org>
The SDXLEMUR CPU PLL uses a non-standard sequence for latching new
configurations. Using the standard lucid_5lpe ops for this PLL means the
latch won't be asserted and the PLL will run at the original frequency
from before the update.
Change-Id: Ia1cb8b7fd116e17a937b961e5907082097e27bfd
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
The lucid_5lpe PLL used for the CPU on SDX targets uses a custom
mechanism to assert the latch. Add ops that can be used for this.
Change-Id: I24f8e3db2b908e34e4d0560841f1f5fdcfd215af
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
The lucid_5lpe PLL has multiple registers past 0x3C, including the
ALPHA_VAL and SSC registers. Since we currently set max_register to
0x3C, this causes read failures on ALPHA_VAL in in
alpha_pll_lucid_recalc_rate(). This function ignores the regmap_read()
return codes, which results in the frac variable being uninitialized.
The CPU PLL doesn't currently use fractional operation, so it should
always be zero in HW. But the uninitialized frac variable causes random,
small increases to the calculated frequency.
Specifying max_register is optional, so just remove it and allow the
full range we define in devicetree.
Change-Id: I3549c249f2dfbad5c056de584864b0e1a3eeb912
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Add APIs which provide per GPU freq active and total time,
number of GPU frequency corners and number of frames
processed by GPU.
Change-Id: If42e76a435a4766a3de0b9b028d48b6c1759e466
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
This change is for general scheduler improvements.
Change-Id: Ia2854ae8701151761fe0780b6451133ab09a050b
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
Avoid sending MODE_OFF QMI request to FW if MODE_ON is
not send previously.
Change-Id: I143baac9de884773b1f3c376030d5252bae5fa15
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
Add remote debugger device configuration. The Remote Debugger driver
allows a debugger running on a host PC to communicate with a remote
stub running on peripheral subsystems.
Change-Id: I4a96cd5ee354d9be0b2f77eaf3330b6529154aa6
Acked-by: Devender Kaushik <dkaushik@qti.qualcomm.com>
Signed-off-by: Jeya R <jeyr@codeaurora.org>
Update the vm_stat counter NR_UNRECLAIMABLE_PAGES to account for
the total memory allocated. Update the rss_stat counter MM_UNRECLAIMABLE
to account for the memory allocated and memory imported per process.
Change-Id: I0a40bf215fedbe421cce8d5fc41e2580fefb6523
Signed-off-by: Puranam V G Tejaswi <pvgtejas@codeaurora.org>
Add CNSS_HAS_DRV_SUPPORT to platform capability to indicate if PCIe
DRV is supported or not.
Change-Id: Id114467d060946dda43bb00fe8856cea2c18e738
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
Enable BFQ IO-Scheduler as a default scheduler
for systems adapting to block multiqueue design.
Change-Id: I12ff8c0495a53f1fc1f1a95c39ed03d927c1821b
Signed-off-by: Pradeep P V K <pragalla@codeaurora.org>
Add code to assert if FW requested memory allocation fails.
This helps to collect logs at the time of failure.
Change-Id: I8d3ff82eee545510318e0a9a2a128a71dc8a9fb3
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
