Commit graph

884,342 commits

Author SHA1 Message Date
Taniya Das
dcedf3c538 trace: Add new trace event for DCVSH
Add trace to capture DCVSH updates to sched.

Change-Id: I57201ab0e41931cffe121c6ab18c46b1f26f250e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-04-16 18:40:18 +05:30
Taniya Das
2b4eabbaff cpufreq: qcom: Add support to register for Limits Management interrupt
Update the scheduler with the frequency cap due to limits management
interrupt and update back when limits throttling is removed.

Change-Id: Iebf4033757853bedbd60f83e21176ff29389aff8
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-04-16 18:40:18 +05:30
Nitin Rawat
eb68ce5d76 pinctrl: qcom: Expose ufs_reset as gpio on shima
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pin.
Reorder the pins and expose it as gpio 204, so that the UFS driver can
toggle it.

Change-Id: Id35739a32bf05eaf310857fa07d9c7fbdb3abf86
Signed-off-by: Nitin Rawat <nitirawa@codeaurora.org>
2020-04-16 15:22:10 +05:30
qctecmdr
64091379ee Merge "msm: kgsl: Don't populate the OPP table if it already exists" 2020-04-16 01:40:57 -07:00
qctecmdr
c11b140de7 Merge "ASoC: compress: Avoid race condition in compress drain" 2020-04-16 01:40:57 -07:00
qctecmdr
232c301b54 Merge "usb: f_fs: Clear OS Extended descriptor counts to zero in ffs_data_reset()" 2020-04-16 01:40:57 -07:00
qctecmdr
69c989254f Merge "dt-bindings: clock: Update clock ids of GCC for SHIMA" 2020-04-16 01:40:56 -07:00
qctecmdr
b9651440c2 Merge "usb: dwc3-msm: Revert back to power_supply_by_name() lookup" 2020-04-16 01:40:56 -07:00
qctecmdr
6f2e87c346 Merge "sched: Improve the scheduler" 2020-04-16 01:40:54 -07:00
Trilok Soni
9e64a38cb9 scripts: headers_install: Add sigcontext.h into the bypass list
sigcontext.h is having the CONFIG_64BIT addition due to the way
we are exporting the headers to userspace and use of the sigcontext.h
by the 32-bit userspace applications. Since we export only the single
set of headers we need to carry this file in the bypass list.

Change-Id: Iaaf2ecd5d46994ca0901d31e40104c800acd5d20
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
2020-04-16 00:02:42 -07:00
Prasad Sodagudi
c7034ffa74 soc: qcom: spcom: Provide retry mechanism for spss
On some SoCs, spss may be brought out of reset during
bootloader stage. Sometimes spss might be cashed during
the device boot due to some faults in spss firmware. When
spcom tried to boot the spss first time in the kernel stage,
it might be already crashed. So provide the retry
mechanism to load the firmwares and to bring out of reset.

Also, remove sending interrupt on link up to SPSS, since it
was workaround.

Change-Id: I81c1932527c02bfecdfd1cf0c126d18df0e57e57
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
2020-04-15 23:58:09 -07:00
Bao D. Nguyen
accb1dbb52 mmc: sdhci-msm: Avoid enable SD power if card is not present
Properly avoid turn on the SD card power when SD card is removed.
In some multi card tray designs, removing the SD card may cause
the SD card power supply pin to come in contact with the SIM card.
This change is to ensure the SD card power is not active when
the SD card is removed. As a result, avoid possible damage to
the SIM card in case the SD card power makes contact with
the SIM card.

Change-Id: I45a2bb434bd2bc76957ae382eecd5cce9e743918
Signed-off-by: Bao D. Nguyen <nguyenb@codeaurora.org>
2020-04-15 23:39:38 -07:00
Bao D. Nguyen
3b29ed3227 Revert "mmc: sdhci-msm: Avoid enable SD card power if card is removed"
This reverts commit 82fc401559.
When there is no SD card inserted, this change causes the SD
card driver to wait for the mmc power IRQ that never comes.
As a result, the boot up time may be longer.
Revert this change and fix the original issue properly.

Change-Id: I22b53109c10c3f533ebe1f19f9bed9301810fb77
Signed-off-by: Bao D. Nguyen <nguyenb@codeaurora.org>
2020-04-15 23:38:08 -07:00
qctecmdr
37d0a368db Merge "clk: qcom: clk-alpha-pll: Add support for Fabia print registers" 2020-04-15 20:35:59 -07:00
qctecmdr
b448ce7bd1 Merge "arm64: defconfig: Enable LLCC driver" 2020-04-15 20:35:59 -07:00
qctecmdr
6e44585f72 Merge "defconfig: Add initial defconfig fragments for Holi" 2020-04-15 20:35:58 -07:00
qctecmdr
13aa3f4764 Merge "msm: sps: Fix the SPS_DBG macro definitions" 2020-04-15 20:35:58 -07:00
qctecmdr
f4464ff43e Merge "ANDROID: serdev: restrict claim of platform devices" 2020-04-15 20:35:58 -07:00
qctecmdr
5d44961440 Merge "memshare: Rectify sourcing memshare driver for compiling" 2020-04-15 20:35:57 -07:00
Bojun Pan
a85378d25d msm: ipa4: capture the unclock gsi IPA register access
Add more protect on the unclock gsi IPA register access.
In case this is a valid access, assert before disabling
the IPA clock.

Change-Id: If2cc5a9942a5e457bbd8badaabde78138f676176
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2020-04-15 20:06:37 -07:00
Fenglin Wu
d9c3ff4174 input: qcom-hv-haptics: store closed-loop brake settings into SDAM
Read the closed-loop brake calibration settings from status register
and store them into a SDAM register for hardware to re-use them after
system reboot.

Change-Id: I9068559fffba58927eefc140ed58afc054257b22
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
2020-04-16 08:52:49 +08:00
Fenglin Wu
87b61856db input: qcom-hv-haptics: limit play rate for PM8350B v1 hardware
Due to a hardware limitation, PM8350B v1 cannot play more than 8 KHz as
it has a FIFO size of 104 bytes. Hence limit the play rate for PM8350B
v1 to 8 KHz.

Change-Id: Ibeabd4c0229a54e2d99023c8fbc5970b1a7a1e64
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
2020-04-16 08:52:31 +08:00
Fenglin Wu
d79818afa6 input: qcom-hv-haptics: update FIFO samples in IRQ thread
Instead of sending a completion from the IRQ thread to notify a
worker thread to update the FIFO samples, update the samples in
the IRQ thread directly. This should help achieve lower latency
which is good for FIFO playing.

Meanwhile, following changes are made for FIFO playing:
 1) Defer stopping command into erase() function if it's coming
    before all FIFO samples are played. This gives the hardware
    a little more time to play before stopping.
 2) Restore FIFO play rate to T_LRA after playing is done according
    to hardware recommendation.

Change-Id: I7b21589641d753d45b1261ce0e342373c249f4e5
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
2020-04-16 08:49:34 +08:00
Isaac J. Manjarres
90e8284897 ion: Forbid multi-VMID allocation requests for the secure system heap
The secure system heap does not support multi-VMID allocations,
so do not allow them. Also, fortify the secure allocation check
for the system heap allocation path.

Change-Id: I51d53274c2374632db778461ba7505de4d723439
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-04-15 17:27:40 -07:00
Isaac J. Manjarres
dcdd5691d9 ion: Improve ION allocation paths
Clean up some of the ION heap interfaces so that they are
more inline/uniform with respect to each other.

Change-Id: I4edabc2c8ccb533898540ceda1fd6aacc2e2e56a
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-04-15 17:27:40 -07:00
Yu SI
27b17819b2 msm: cvp: fixed cache operation func param issue
param offset and size were switched in the function signature

Change-Id: Ice7b9b6c2651940648a95bdf8fa331b62c577378
Signed-off-by: Yu SI <ysi@codeaurora.org>
2020-04-15 17:13:40 -07:00
Raghu Ananya Arabolu
ce6b530fc1 msm: kgsl: Add a terminating empty entry to a660_protected_regs array
The last entry of the a660_protected_regs array must be an empty
entry. The empty entry serves as a terminating placeholder value
indicating the end of the array.

Change-Id: Ie5dd6afcd65dca3ea1fa885d3aa675c23bdf5ca0
Signed-off-by: Raghu Ananya Arabolu <rarabolu@codeaurora.org>
2020-04-15 17:00:22 -07:00
qctecmdr
6dfa423a35 Merge "phy: ufs: Add set_mode callback for RUMI UFS PHY driver" 2020-04-15 15:21:57 -07:00
qctecmdr
1abff4a10a Merge "cnss2: Add SRAM mem dump for debug" 2020-04-15 15:21:57 -07:00
qctecmdr
2b861979ae Merge "msm: adsprpc: retrieve table index directly from context ID" 2020-04-15 15:21:56 -07:00
qctecmdr
1ab68dd612 Merge "dt-bindings: iio: Update PMIC5 ADC support" 2020-04-15 15:21:56 -07:00
qctecmdr
c4687c841e Merge "trace: Make ion.h work with KERNEL_HEADER_TEST" 2020-04-15 15:21:56 -07:00
qctecmdr
7bafe03443 Merge "cnss2: Avoid blocking target to reboot or shutdown" 2020-04-15 15:21:55 -07:00
Raghavendra Rao Ananta
3929ea2ade defconfig: arm64: Enable msm_show_resume_irq for Lahaina
Enable msm_show_resume_irq driver on Lahaina platform for
power analysis.

Change-Id: I7785b1ae0b9b0e9e77ce46060f2b608ce184a887
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-04-15 14:18:51 -07:00
Raghavendra Rao Ananta
03dbd6813c irqchip: Declare the msm_show_resume_irq_mask in a header
msm_show_resume_irq_mask is currently being declared by individual
drivers as needed. However, it creates scalability issues and looks
ugly. Hence, place the variable in a common header file so that the
drivers can just include it.

Change-Id: I35348a6a280c15a5ad4744097f1075f165af1bc8
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-04-15 14:18:51 -07:00
Raghavendra Rao Ananta
ada5825087 defconfig: arm64: Enable of_devlink proxy consumer for Lahaina
Enable the proxy consumer drivre for Lahaina platform to satisfy
the sync-state requirements in the abcense of real drivers.

Change-Id: I255aee9c1cf2995ab7038f7c95e45afdd94ef42b
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-04-15 10:14:38 -07:00
Raghavendra Rao Ananta
7a02db5182 soc: qcom: Add support for proxy consumers on of_devlink
A target may contain multiple defconfigs, but only one device-tree
configuration. Such a target may have device-drivers that are
only enabled in a particular defconfig, while disabled in the
others. For the kernel that boots up with disabled configuration,
since the device-tree node exists, the of_devlink logic expects
the driver to be probed, which is not possible. As a result, the
sync-state remains incomplete.

Hence, add support for a proxy consumer driver that shows a
proxy-presence of the main driver to satisfy the sync-state.

Change-Id: Ica8c2599fb66420c67e6a72e9b35e7afc0ae3220
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-04-15 10:14:30 -07:00
Jordan Crouse
789e044344 msm: kgsl: Don't populate the OPP table if it already exists
If we query the OPP table when it doesn't exist we get an error. If
we populate it again with the same operating points we get an error.
So just skip the table create if it already exists and go with
whatever we have.

Change-Id: Ic0dedbad3d5bd24b35867a82873a6ece555d8314
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-04-15 08:58:40 -06:00
qctecmdr
7e5cfaa6da Merge "net: Indicate whether a socket is a transparent socket" 2020-04-15 04:57:01 -07:00
qctecmdr
172d9b116d Merge "msm: cvp: Re-classification of traces for CVP_DBG" 2020-04-15 04:57:00 -07:00
qctecmdr
fc6304ea75 Merge "defconfig: Enable voltage cooling device for lahaina" 2020-04-15 04:56:59 -07:00
qctecmdr
df03fe156f Merge "um: x86_64: Remove the FRAME_WARN config option" 2020-04-15 04:56:59 -07:00
qctecmdr
2cb2471819 Merge "irqchip: add snapshot of msm_show_resume_irq" 2020-04-15 04:56:58 -07:00
qctecmdr
7367818d85 Merge "usb: dwc3-msm: Use PROP_INPUT_CURRENT_LIMIT to for vbus_draw" 2020-04-15 04:56:57 -07:00
Jagadeesh Kona
c948dc3cd1 dt-bindings: clock: Update clock IDs and BCRs of GCC for SHIMA
Update the clock IDs and BCRs of Global Clock Controller for SHIMA.

Change-Id: Iec2722e6edc1d454a29d084062b8356af08b17b7
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-04-15 10:27:54 +05:30
Alistair Delva
09f64ec442 ANDROID: serdev: restrict claim of platform devices
Make the fallback path for claiming platform devices trigger only if a
new module parameter is specified:

  serdev_ttyport.pdev_tty_port=ttyS2

Bug: 146517987
Change-Id: Ibf331ad6e6d8712a405921530f217f7122428b13
Signed-off-by: Alistair Delva <adelva@google.com>
Git-commit: 3a97aabe4f
Git-repo: https://android.googlesource.com/kernel/common/
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
2020-04-15 09:59:14 +05:30
Can Guo
4ebbe15e53 phy: ufs: Add set_mode callback for RUMI UFS PHY driver
This change adds the missing set_mode callback for RUMI UFS PHY driver.

Change-Id: Ib67ebf63690a1d01172d4e9c9a0c253a8595f5fb
Signed-off-by: Can Guo <cang@codeaurora.org>
2020-04-14 18:44:45 -07:00
Bhaumik Bhatt
0179be9121 mhi: core: add prints for votes and a debugfs vote entry
Add a debugfs entry to print out votes from all the MHI client
devices.

Change-Id: I6391aee59a4a4e560cfb0bd16e83bf146c19c081
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2020-04-14 18:01:15 -07:00
Bhaumik Bhatt
1801232974 mhi: core: assign controller name to own device
Controller name can be assigned to the mhi device under the
chan_name field which can be read in certain use cases.

Change-Id: I4bd8050b3ba485f3cf27a2f355e0ce2bacc66ccc
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2020-04-14 18:01:02 -07:00
Bhaumik Bhatt
067a14395f mhi: core: provide an API to retrieve device failure reason
When device asserts, the subsystem failure reason from device
can be read via an external API using the name of the MHI
controller.

Change-Id: Ic0bcba77e0a7e4c4a7570df3eda21e1f38b80277
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2020-04-14 18:00:56 -07:00