Commit graph

884,342 commits

Author SHA1 Message Date
qctecmdr
504c5428c7 Merge "arm64: kconfig: Add initial platform for Holi" 2020-04-13 06:01:26 -07:00
qctecmdr
b2342e4e46 Merge "clk: qcom: clk-alpha-pll: Add support for Huayra print registers" 2020-04-13 06:01:26 -07:00
Jagadeesh Kona
a08051bcb6 dt-bindings: clock: Update clock ids of GCC for SHIMA
Add clock id for GCC PCIE throttle core clock and remove clock ids of few
dummy clocks on SHIMA.

Change-Id: I71d41fc078c1b9d9d89dbc6b44e1296fe6b3c9ed
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-04-13 16:11:02 +05:30
Taniya Das
15c48e61d3 clk: qcom: clk-alpha-pll: Add support for Fabia print registers
Fabia PLL print registers are required to get the PLL values
from the debugfs, thus add support for the same.

Change-Id: I24587bdba0445639ebee86c7efee543d3c37ba42
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-04-12 20:48:47 -07:00
Taniya Das
5c7c89b661 clk: qcom: clk-alpha-pll: Misc cleanup and fixes for PLLs
Cleanups for Trion PLL and fixes in the Fabia configuration of PLL.

Change-Id: I18f430ebca651c65f210c2ced741303e8751abad
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-04-12 20:48:43 -07:00
Rishabh Bhatnagar
3adda57403 um: x86_64: Remove the FRAME_WARN config option
Compilation for x86_64_defconfig gives the following warning:

net/core/rtnetlink.c:3099:1: warning: the frame size of 1280 bytes is
larger than 1024 bytes [-Wframe-larger-than=].
It is introduced by the commit:
rtnetlink: Remove VLA usage (ccf8dbcd06).
As suggested by this email thread:
https://www.mail-archive.com/netdev@vger.kernel.org/msg239148.html

arch/um/configs/x86_64_defconfig:CONFIG_FRAME_WARN=1024
lib/Kconfig.debug:
config FRAME_WARN
        int "Warn for stack frames larger than (needs gcc 4.4)"
        range 0 8192
        default 3072 if KASAN_EXTRA
        default 2048 if GCC_PLUGIN_LATENT_ENTROPY
        default 1280 if (!64BIT && PARISC)
        default 1024 if (!64BIT && !PARISC)
        default 2048 if 64BIT

Just dropping the defconfig there should fix it.

Change-Id: Ie5374721152dd888d6ea18bfc05538d454efe249
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2020-04-12 20:18:30 -07:00
qctecmdr
521e5186f1 Merge "sched/fair: Improve the scheduler" 2020-04-12 19:05:43 -07:00
qctecmdr
dd98d97d8d Merge "soc: qcom: rpmh_master_stat: Add island stats support" 2020-04-12 19:05:43 -07:00
qctecmdr
e815c948a3 Merge "defconfig: arm64:Enable CDSPRM driver for Lahaina" 2020-04-12 08:11:30 -07:00
Bavyasritha Alahari
7ddfe69e25 defconfig: arm64:Enable CDSPRM driver for Lahaina
CDSPRM module implements a RPMSG interface to communicate with CDSP
while providing a way for CDSP to vote for CPU L3 clock, CPU QoS to
benefit CDSP applications performance.

Change-Id: I46c6407a6f4d531f3a9ec84d5ec4e506db5ca120
Acked-by: Sreekanth Gande <sgande@qti.qualcomm.com>
Signed-off-by: Bavyasritha Alahari <alahari@codeaurora.org>
2020-04-12 11:04:14 +05:30
qctecmdr
06e5250832 Merge "scsi: ufs-qcom: dump phy registers on error" 2020-04-11 21:33:11 -07:00
qctecmdr
6726b022eb Merge "Bluetooth: Add support to get chipset version from device tree" 2020-04-11 21:33:10 -07:00
qctecmdr
f68e833a32 Merge "usb: xhci: Increase xhci halt timeout" 2020-04-11 21:33:10 -07:00
qctecmdr
5a69e5bb3e Merge "interconnect: qcom: Fix the commit bit not getting set" 2020-04-11 21:33:10 -07:00
qctecmdr
a0cf010626 Merge "msm: adsprpc: register wake-source clients during driver init" 2020-04-11 21:33:09 -07:00
qctecmdr
447a5ff2c1 Merge "defconfig: lahaina: Disable qbt_handler from QGKI config" 2020-04-11 21:33:09 -07:00
qctecmdr
c96bbdd153 Merge "arm64: defconfig: Enable boot_stats driver for Lahaina" 2020-04-11 21:33:09 -07:00
qctecmdr
6c32e17330 Merge "drivers: soc: qti: Fix data type for uapi header" 2020-04-11 21:33:09 -07:00
qctecmdr
f4913de490 Merge "msm: kgsl: Check the return value of regulator_enable" 2020-04-11 21:33:08 -07:00
qctecmdr
5490b09d03 Merge "dt-bindings: clk: Remove unused cpuss clocks for Lahaina" 2020-04-11 21:33:08 -07:00
qctecmdr
d7c669fea5 Merge "net: qrtr: Check for exisiting waiters" 2020-04-11 21:14:46 -07:00
qctecmdr
916331668a Merge "cnss2: Check driver link state before prevent/allow PCIe L1" 2020-04-11 21:14:46 -07:00
qctecmdr
21aa3d3230 Merge "iommu/arm-smmu: Add support to disable page-table coherency" 2020-04-11 21:14:46 -07:00
qctecmdr
886c117ec6 Merge "msm: ipa4: flow control changes for rmnet pipe" 2020-04-11 21:14:45 -07:00
qctecmdr
6c1dddc89d Merge "usb: gadget: qdss: Add NULL check against priv_usb with usb_qdss_close()" 2020-04-11 21:14:45 -07:00
qctecmdr
53486a4848 Merge "drivers: of-thermal: Handle krealloc failure correctly" 2020-04-11 21:14:45 -07:00
qctecmdr
f04392300d Merge "arm64: defconfig: define ARCH_LAHAINA for VM image to compile" 2020-04-11 21:14:45 -07:00
qctecmdr
34ce354498 Merge "msm: pcie: update suppressible clock info" 2020-04-11 21:14:44 -07:00
qctecmdr
6e0b43924a Merge "ANDROID: selinux: modify RTM_GETLINK permission" 2020-04-11 21:14:44 -07:00
qctecmdr
c22737e769 Merge "firmware: qcom_scm: Fix the __qcom_scm_is_call_available" 2020-04-11 21:14:43 -07:00
qctecmdr
a4fa30e6a6 Merge "msm: pcie: add PCIe GDSC disable/enable for DRV suspend/resume" 2020-04-11 21:14:43 -07:00
qctecmdr
43d3a8b012 Merge "msm: cvp: add cache operation control flag" 2020-04-11 13:28:34 -07:00
qctecmdr
e3355ff92a Merge "cnss2: Handle race between register driver and reboot properly" 2020-04-11 13:28:34 -07:00
qctecmdr
44abeafb57 Merge "soc: qcom: pmic_glink: Verify the message length" 2020-04-11 13:28:34 -07:00
qctecmdr
61ade967b7 Merge "power: supply: qti-battery-charger: Handle incorrect thermal levels" 2020-04-11 13:28:33 -07:00
qctecmdr
e814c38deb Merge "mm: correct ALLOC_WMARK_MIN flag check for atomic allocations" 2020-04-11 13:28:33 -07:00
qctecmdr
8be639b1d4 Merge "mm: reap tasks only killed by low memory killer" 2020-04-11 13:28:33 -07:00
qctecmdr
000cfc1ef2 Merge "power: supply: qti_battery_charger: add support to set fake SOC for battery" 2020-04-11 13:28:33 -07:00
qctecmdr
2087769c27 Merge "interconnect: qcom: Fix BW requests to L3_SHARED returning -EINVAL" 2020-04-11 13:28:32 -07:00
qctecmdr
ee26b2fc8a Merge "soc: qcom: add CDSP request manager" 2020-04-11 13:28:32 -07:00
qctecmdr
eef803ab52 Merge "msm: cvp: Avoid releasing buffers during boot" 2020-04-11 13:28:32 -07:00
Chandra Sai Chidipudi
232471d6d0 arm64: defconfig: Enable LLCC driver
Enable the Last Level Cache Controller (LLCC) driver for
Shima platform.

Change-Id: I5bcc51d0b662ccee6ccd68227b911f924e6b852b
Signed-off-by: Chandra Sai Chidipudi <cchidipu@codeaurora.org>
2020-04-11 01:55:28 -07:00
Chris Lew
cdb150a515 net: qrtr: Check for exisiting waiters
Some non-blocking clients may not wait for the OUT event from select or
poll before resending to a flow controlled port. Check for exisiting
waiters before allocating a new one so these clients do not exhaust the
memory pool.

Change-Id: I5fc40d5b1d1819ea5bf94438c04ee42b42639ebc
Signed-off-by: Chris Lew <clew@codeaurora.org>
2020-04-10 17:58:55 -07:00
qctecmdr
31ef58ab90 Merge "haven: add stubs to haven client exposed APIs" 2020-04-10 15:56:33 -07:00
Satish kumar sugasi
79610859b3 Bluetooth: Add support to get chipset version from device tree
parse compatible flag from BT Device tree to get Bluetooth
chipset version and send to userspace via ioctl call.

Change-Id: Iddcae25df2e854a55a745bc127277552a799e3e4
Signed-off-by: Satish kumar sugasi <ssugas@codeaurora.org>
2020-04-10 12:13:32 -07:00
Manoj Prabhu B
89688744f4 memshare: Rectify sourcing memshare driver for compiling
Modify the sourcing of memshare driver folder properly.

Change-Id: Ibbf8f968a412fcefce9ec71de5aac055682d2a74
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
2020-04-10 15:26:11 +05:30
Bavyasritha Alahari
07b0a87f34 soc: qcom: add CDSP request manager
CDSPRM module implements a RPMSG interface to communicate with CDSP
while providing a way for CDSP to vote for CPU L3 clock, CPU QoS to
benefit CDSP applications performance. The module also implements
an interface with NPU for Cx i-peak limit management and registers
cooling devices for CDSP and HVX thermal mitigation.

Change-Id: I5aa592cb8de19367f7361e1f31d1077ceba386df
Acked-by: Sreekanth Gande <sgande@qti.qualcomm.com>
Signed-off-by: Bavyasritha Alahari <alahari@codeaurora.org>
2020-04-09 22:16:58 -07:00
David Collins
6c366b93fa regulator: qcom_pm8008: use private API for en_supply management
Replace regulator_enable() and regulator_disable() calls with
private functions.  This helps to eliminate a source of mutex
deadlock introduced by commit f8702f9e4a ("regulator: core:
Use ww_mutex for regulators locking").

Change-Id: I6d1b9c2989939d7021fc88ead3d71654efe15eca
Signed-off-by: David Collins <collinsd@codeaurora.org>
2020-04-09 18:05:52 -07:00
Subbaraman Narayanamurthy
2a9286f089 power: supply: qti_battery_charger: add support to set fake SOC for battery
Setting a fake battery SOC (state of charge) is useful to test
different mitigation levels. Add support for it by exposing
fake_soc under qcom-battery class which can be set only when
CONFIG_QTI_PMIC_GLINK_CLIENT_DEBUG is enabled.

To set fake_soc of 50%,

 echo 50 > /sys/class/qcom-battery/fake_soc

To clear fake_soc so that actual battery SOC can be displayed,
any value other than 0-100 can be set to fake_soc.

 echo -1 > /sys/class/qcom-battery/fake_soc

Change-Id: Ibff337fb4da9d4e9aadbe148f3eecca9e2d69604
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2020-04-09 17:10:48 -07:00
Subbaraman Narayanamurthy
a91100b971 soc: qcom: pmic_glink: Verify the message length
Currently, data received from the remote subsystem is delivered
to the clients as-is if they've registered for receiving it. This
can cause unintended extraneous buffer reads if the length of the
received message is too small. Verify that the message length is
at least the PMIC Glink header size.

Change-Id: I3774d9d5331794c509bda89f40f4ead2e0ed3843
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2020-04-09 15:26:20 -07:00