Commit graph

886,663 commits

Author SHA1 Message Date
Raghavendra Rao Ananta
9bc1eafdcb input: event_notify: Remove the support
Remove the support for sending event notifications via
event_notify as there are no users of it. Update the
ABI snapshot accordingly.

Change-Id: I22f28339ed1e834ae0dbd762562a52a158c12406
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-07-15 08:37:37 -07:00
qctecmdr
9e1aed8fb7 Merge "cnss2: Notify WLAN host driver when SMMU fault is detected" 2020-07-15 04:17:46 -07:00
qctecmdr
8839bc19d4 Merge "mmc: sdhci-msm: Remove unneeded device tree entries" 2020-07-15 01:30:24 -07:00
qctecmdr
c20b61c403 Merge "mhi: core: Prevent extra votes for multiple timesync requests" 2020-07-15 01:30:24 -07:00
qctecmdr
b17dbdef44 Merge "msm: cvp: Fix linked list corruption in CVP driver" 2020-07-15 01:30:23 -07:00
qctecmdr
6e3cbcb471 Merge "coresight: Delete path from active paths when exception happens" 2020-07-15 01:30:23 -07:00
qctecmdr
7ee9a802f5 Merge "power: reset: Remove flush_cache_all usage" 2020-07-15 01:30:22 -07:00
qctecmdr
98a04974dd Merge "clk: qcom: gcc: use the holi specific vdd file" 2020-07-15 01:30:22 -07:00
qctecmdr
b63d8bd9ac Merge "mm: remove the speculative page fault traces" 2020-07-15 01:30:21 -07:00
Yue Ma
e9ffae75af cnss2: Notify WLAN host driver when SMMU fault is detected
Notify WLAN host drive FW down as soon as SMMU fault happens so
that it can do necessary cleanup as earlier as possible.

Change-Id: Ie34243de296d35ced3f2c1a1e4d50a6c551ae88d
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2020-07-14 23:34:22 -07:00
Bhaumik Bhatt
033184aaa4 mhi: core: Prevent extra votes for multiple timesync requests
An extra vote is held and not released during cases of multiple
or back to back time synchronization requests where the response
is still pending and the doorbell is not rung. As only one
response is expected, we can safely remove the latest vote
placed.

Change-Id: I551ac2721af79162959ca301a61657cdf17cf135
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2020-07-14 16:21:56 -07:00
Prasad Sodagudi
7f96fbc3f4 power: reset: Remove flush_cache_all usage
Remove the flush_cache_all usage from power off driver.
For the crash reset flow, this api is not needed on
latest SoCs and secure world can flush cpu caches.

Change-Id: If50364810e63c72c09ada026f7f295112414c413
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
2020-07-14 13:51:18 -07:00
qctecmdr
2f9b2b4199 Merge "drivers: thermal: Change parameters in thermal zone configuration" 2020-07-14 12:50:28 -07:00
qctecmdr
394fa5f5ae Merge "soc: qcom: hyp_core_ctl: Fix conditional statement boundries" 2020-07-14 12:50:28 -07:00
qctecmdr
193610b45b Merge "mhi: core: move PM state to SYS_ERROR if the event arrives before RDDM" 2020-07-14 12:50:27 -07:00
qctecmdr
b0b1dd81f0 Merge "msm: kgsl: Add snapshot size and highest bank bit for a619" 2020-07-14 12:50:27 -07:00
qctecmdr
f4e5de9ef8 Merge "build.config.aarch64: s/COMPAT/ARM32" 2020-07-14 10:26:44 -07:00
qctecmdr
5a9508b27d Merge "arm64: defconfig: enable DRM display driver configs" 2020-07-14 10:26:44 -07:00
Ram Chandrasekar
fe5065ca0a drivers: thermal: Change parameters in thermal zone configuration
Change trip threshold, trip clear, passive polling delay and algorithm
type parameter name in the thermal zone configuration output to
set_temp, clr_temp, passive_delay and algo_type from trip_threshold,
trip_threshold_clr, passive_polling_delay and policy.

Change-Id: I5d531eaf0990202b7a0537e1d3a2ed3b145543ab
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2020-07-14 09:39:06 -07:00
Mao Jinlong
8467c72f2f coresight: Delete path from active paths when exception happens
The path will be released when fail to enable any sink or link. The
path must be deleted from active paths before release it. Otherwise
it will get invalid address of path when enable or disable the paths.

Change-Id: Id37fdbc3854bae414f043bd049bc6af2e90af5fa
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
2020-07-14 07:31:05 -07:00
qctecmdr
4ba31fbd60 Merge "input: qcom-hv-haptics: set effect to NULL in constant playing" 2020-07-14 04:57:32 -07:00
qctecmdr
1088a025d9 Merge "clk: qcom: gpucc-lahaina: Fix gpu_cc_cx_gmu_clk stuck off warning" 2020-07-14 04:57:31 -07:00
qctecmdr
d91cfbaf24 Merge "tmc-etr: Call usb_qdss_open after all etr settings are done" 2020-07-14 04:57:31 -07:00
qctecmdr
0c1f865571 Merge "power: supply: qti_battery_charger: Enable Ship mode shutdown" 2020-07-14 04:57:30 -07:00
qctecmdr
b271780bfd Merge "f2fs: fix use-after-free when accessing bio->bi_crypt_context" 2020-07-14 04:57:30 -07:00
qctecmdr
327630a533 Merge "sound: usb: Use IOMMU_CACHE mapping if USB controller is dma-coherent" 2020-07-14 04:57:30 -07:00
qctecmdr
75d3651842 Merge "msm:ipa3: removed duplicate entries in defconfig" 2020-07-14 04:57:29 -07:00
Veerabhadrarao Badiganti
60ba92dddf mmc: sdhci-msm: Remove unneeded device tree entries
Remove unnecessary device tree properties from the code.

Change-Id: Id6f59c6874acda03c3f2aa93626eb20a9dc2ac00
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-07-14 16:07:58 +05:30
qctecmdr
ba6dd9aa87 Merge "cnss2: set rddm support boolean for MHI" 2020-07-14 02:04:24 -07:00
qctecmdr
ff34294560 Merge "defconfig: Enable USB related config flags on sdxlemur" 2020-07-14 02:04:24 -07:00
qctecmdr
59912b8be9 Merge "defconfig: Enable CPUFREQ HW module for cpu scaling" 2020-07-14 02:04:23 -07:00
qctecmdr
18f67937ca Merge "mhi: core: Use high priority workqueue for all MHI work" 2020-07-14 02:04:23 -07:00
qctecmdr
e9f0121b67 Merge "input: qcom-hv-haptics: clear HW faults before enabling play" 2020-07-14 02:04:22 -07:00
qctecmdr
09c5e37d74 Merge "drivers: pinctrl: Add gpio to mpm mapping for holi" 2020-07-13 22:34:39 -07:00
qctecmdr
c74230b2f8 Merge "soc: qcom: add VTCM debug test support" 2020-07-13 22:34:39 -07:00
qctecmdr
4575c8b1b9 Merge "mhi: core: Move to error state as soon as RDDM is detected" 2020-07-13 22:34:38 -07:00
qctecmdr
b71e7e2a4e Merge "usb: f_qdss: Fix race between qdss_alloc_req & qdss_close" 2020-07-13 22:34:37 -07:00
qctecmdr
096ce85950 Merge "usb: f_qdss: Setting channel to NULL in qdss_close" 2020-07-13 22:34:37 -07:00
Jack Pham
1071143571 sound: usb: Use IOMMU_CACHE mapping if USB controller is dma-coherent
If IO coherency for the USB controller is enabled, the shared buffers
need to be remapped with the cached attribute set so that the
controller HW can properly access the memory coherently. Otherwise,
the HW could end up reading stale data from cache.

While at it, remove the dma_sync_* calls, as they were previously
added with the misunderstanding that the APPS needs to force an
invalidation before passing it to the ADSP. This is not required
as long as the coherency settings are matched as there is no need
to manually perform cache maintenance when handing off the buffers.

Change-Id: I3a7ecbd7b7f1c264c64e9f5f82c9d4ec27848dc0
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2020-07-13 18:00:10 -07:00
Fenglin Wu
1625d8d142 input: qcom-hv-haptics: set effect to NULL in constant playing
In constant waveform playing, there is no need to use an effect data
structure to capture the current playing effect, hence set it to NULL.
This also helps the set_gain() callback to use the correct Vmax when
it's called in constant playing case. Also add a debug message to show
the Vmax setting.

Change-Id: I763ec7407b8696300dbe93f5e6935900544e75a8
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
2020-07-14 07:22:51 +08:00
Shaleen Agrawal
01811812f1 soc: qcom: hyp_core_ctl: Fix conditional statement boundries
Ensure conditional uses entire computation.

Change-Id: If508adcdb6d53bba0da7fb979ea4b530686b223a
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2020-07-13 15:42:28 -07:00
Elson Roy Serrao
4688452232 defconfig: Enable USB related config flags on sdxlemur
This change enables the controller driver, phy and function
drivers on sdxlemur.

Change-Id: Ief79a286ee4a624b32c0e4fc2aff5c091657c54c
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
2020-07-13 12:31:07 -07:00
Elliot Berman
cd358f0f64 build.config.aarch64: s/COMPAT/ARM32
Use LINUX_GCC_CROSS_COMPILE_ARM32_PREBUILTS_BIN instead of
LINUX_GCC_CROSS_COMPILE_COMPAT_PREBUILTS_BIN since that is
backwards-compatible with older kernel/build revisions.

Change-Id: I10b60db33ffdde3d8147b983121367e5ec6566db
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2020-07-13 10:53:22 -07:00
Udipto Goswami
b7e68b67a0 usb: f_qdss: Fix race between qdss_alloc_req & qdss_close
While performing very fast etr enable/disable from coresight
there is a chance that when alloc_req is trying to allocate
the request qdss_close got called due to etr disable
invoking it, and before alloc_req could complete it's
execution driver is trying to free the request. This leads
to poison error.

Fix this by securing alloc_req under spinlock to avoid this
scenario. qdss_close is already under spinlock protection.

Change-Id: Ia2c629911c9044536a1eca5d72b6f6b3a91ef806
Signed-off-by: Udipto Goswami <ugoswami@codeaurora.org>
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-07-13 10:28:03 -07:00
qctecmdr
613aaf12ff Merge "kernel_headers: Disable headers matching" 2020-07-13 10:22:23 -07:00
Sivakanth vaka
b059223ab7 msm:ipa3: removed duplicate entries in defconfig
Removed flags which are already part of techpack
defconfig.

Change-Id: I4f3f535413f397a0785ee4a774b6d7082a499b05
Signed-off-by: sivakanth vaka <svaka@codeaurora.org>
2020-07-13 22:28:23 +05:30
Guru Das Srinagesh
1df95fc509 power: supply: qti_battery_charger: Enable Ship mode shutdown
This feature is to enable the disconnection of the battery from the
device as the final step in the assembly of a phone on the factory floor
to prevent battery rundown while in transit to the hands of the final
consumer.

Usage:
  # echo 1 > /sys/class/qcom-battery/ship_mode_en
  Following this, either manually shut down using power key, or:
  # reboot -p

Change-Id: Ifef053c6ebb3b86c10f9dbe3c9c47d7c3548d95b
Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org>
2020-07-13 09:55:01 -07:00
Pankaj Gupta
88b04acc6e msm: kgsl: Add snapshot size and highest bank bit for a619
Add GPU core configuration of snapshot_size and highest_bank_bit
for A619 GPU.

Change-Id: I1df21e8f32b6a2e120bf80697fc40a0a6ff65775
Signed-off-by: Pankaj Gupta <gpankaj@codeaurora.org>
2020-07-13 21:03:53 +05:30
Vinayak Menon
f96d3d9c9e mm: remove the speculative page fault traces
The speculative page fault trace header inclusion
breaks GKI. Remove the header inclusion and traces,
but keep the trace header for any debug use.

Change-Id: I5f32343c07cf00bce705f7bee45434ff624c1458
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
2020-07-13 18:02:46 +05:30
Taniya Das
c8f4f2ec53 clk: qcom: gcc: use the holi specific vdd file
Update to use the holi specific voltage corner file for GCC clock
driver. Also add the ufs/pcie ref clocks and the cdiv clock for disp
gpll0 clock.

Change-Id: I9dfe60e301a1678574f238a36edfebaa8e4bfe5c
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-07-13 01:33:55 -07:00