Commit graph

876,324 commits

Author SHA1 Message Date
qctecmdr
a347cbb376 Merge "usb: typec: ucsi: Store the notification mask" 2020-01-09 12:37:39 -08:00
qctecmdr
12712c665b Merge "usb: typec: ucsi: Fix the notification bit offsets" 2020-01-09 11:57:13 -08:00
qctecmdr
18ed6679f0 Merge "dt-bindings: clock: add MDSS clock names for Lahaina" 2020-01-09 08:55:51 -08:00
qctecmdr
f878ff116d Merge "coresight: csr: update programming sequence of enabling etr to bam" 2020-01-09 07:14:51 -08:00
qctecmdr
2aa3d32fe7 Merge "coresight: fix tmc flush timeout issue" 2020-01-09 06:44:47 -08:00
qctecmdr
8d7ec1b3ac Merge "coresight: tmc: leverage etr disable/enable when switching mode" 2020-01-09 06:14:58 -08:00
qctecmdr
bbb08a9d27 Merge "coresight: tmc: add usb support to etr" 2020-01-09 05:41:06 -08:00
qctecmdr
34d581cbff Merge "platform: msm: add support for external display module" 2020-01-09 04:09:02 -08:00
qctecmdr
07bf3d2c9e Merge "arm64: defconfig: Enable USB QDSS and USB BAM drivers on Lahaina" 2020-01-09 03:26:49 -08:00
qctecmdr
7ed98cdb71 Merge "iommu: Fixup selftests" 2020-01-09 02:51:55 -08:00
Yuanfang Zhang
5bbfb312c6 coresight: csr: update programming sequence of enabling etr to bam
There is a new programming sequence on Kona, the register of
QDSS_QDSS_CS_QDSSCSR_USBFLSHCTRL should be configured after
programming TMC ETR registers. This changes use new programming
sequence to enable etr to bam. Add sysfs interface in CSR to let
user space change usb flush period.

Change-Id: I0cee7db746106fd0318d01a92682f185cb31ad97
Signed-off-by: Yuanfang Zhang <zhangyuanfang@codeaurora.org>
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
2020-01-09 00:00:43 -08:00
Yuanfang Zhang
0726d3a73c coresight: fix tmc flush timeout issue
cpu will hang when FlushMan bit, StopOnFl bit don't be reset
to 0 and etm0 was enabled. This change disable source and link
for all activated path to workaround this issue when read tmc
from dev interface and switch etr out_mode.

Change-Id: Idf6d8cffcef0bedaeed91f28366f9c33e22bc0cb
Signed-off-by: Yuanfang Zhang <zhangyuanfang@codeaurora.org>
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
2020-01-09 00:00:35 -08:00
Tingwei Zhang
f37e82faf4 coresight: tmc: leverage etr disable/enable when switching mode
Disable ETR first and enable it again with new mode to switch
out_mode. In this way, we can leverage etr_disable and etr_enable
function and avoid doing same thing.

Change-Id: I5dcae31b657568c751e9b4a209cc7a85d13f83f0
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
2020-01-09 00:00:14 -08:00
Tingwei Zhang
32ce34b1c4 coresight: tmc: add usb support to etr
Coresight ETR can support USB mode. Trace data is streamed
out through USB to host machine.

Change-Id: If6ab122f5bbfc247210c4450ab1ec846a32ce2cd
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
2020-01-09 00:00:05 -08:00
qctecmdr
b57852c6b0 Merge "arm64: defconfig: Enable SPS driver for lahaina" 2020-01-08 21:03:11 -08:00
qctecmdr
7c46c88c7b Merge "iommu/arm-smmu: avoid possible deadlock during map_sg" 2020-01-08 20:10:12 -08:00
Tatenda Chipeperekwa
bed7a261e1 platform: msm: add support for external display module
Add support for the external display module, which is a utility
to manage display interface and audio codec interactions
associated with the cable connect/disconnect events of the
display interfaces. The helper class is responsible for
routing operations called by the audio codec to a particular
display, and for creating and updating the audio switch nodes.

This implementation is based on a snapshot of the external
display module as of this commit 104eef6e1fe8d4d2 ("platform:
msm: Remove unused local count variable") on kernel-4.19.

Change-Id: I919adf3fda110ecba8d7054a1385e2cbdaca2467
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-01-08 17:37:50 -08:00
Heikki Krogerus
9ab8436baa usb: typec: ucsi: Store the notification mask
The driver needs to ignore any Connector Change Events
before the Connector Change Indication notifications have
actually been enabled. This adds a check to
ucsi_connector_change() function to make sure the function
does not try to process the event unless the Connector
Change notifications have been enabled.

It is quite common that the firmware representing the "PPM"
(Platform Policy Manager) starts generating Connector Change
notifications even when only the Command Completion
notifications are enabled.

Change-Id: I465c91247e70c34b74ede51bb89b103ed9f083c6
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20191230133431.63445-2-heikki.krogerus@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Git-commit: 71a1fa0df2a3728b8ccb97394be420d1f03df40e
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2020-01-08 17:26:38 -08:00
Heikki Krogerus
fbefff560a usb: typec: ucsi: Fix the notification bit offsets
The bit offsets for the Set Notification Enable command were
not considering the reserved bits in the middle.

Change-Id: I50247ffce31f3d7613823231485b7f693ce1f216
Fixes: 470ce43a1a81 ("usb: typec: ucsi: Remove struct ucsi_control")
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20200108131347.43217-2-heikki.krogerus@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Git-commit: 33786a2801163a5888679ae064b99927fa849a9e
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2020-01-08 17:26:33 -08:00
qctecmdr
dda0be3d74 Merge "ion: Fix API changes in dma-buf-ref.c" 2020-01-08 16:41:06 -08:00
Mayank Rana
a643bb5f75 arm64: defconfig: Enable USB QDSS and USB BAM drivers on Lahaina
QDSS over USB functionality needs USB QDSS function driver and USB BAM
driver. Hence enable those drivers on Lahaina.

Change-Id: Ic4196b6aac1b40c671db2f1abba1994ffb473112
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-01-08 16:08:45 -08:00
qctecmdr
3512d1a673 Merge "msm: ipa3: Fix to ignore frag status packet in lan consumer pipe" 2020-01-08 16:06:58 -08:00
Satya Rama Aditya Pinapala
4d2ead1122 dt-bindings: clock: add MDSS clock names for Lahaina
This change adds names for the clocks and dividers used
by DP and DSI PLL on 5nm architecture.

Change-Id: Ia6a49b765cbfbc517e4f2bc06c357c5f3109f912
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2020-01-08 14:21:30 -08:00
qctecmdr
d1fe4aac61 Merge "sched/fair: Don't place wakee on waker cpu if colocate enabled" 2020-01-08 14:10:37 -08:00
Sudarshan Rajagopalan
92b97fee78 iommu/arm-smmu: avoid possible deadlock during map_sg
A possible deadlock could occur with the following flow:

    arm_smmu_map_sg()
    -->arm_smmu_secure_domain_lock()
    -->ops->map_sg() //this returns an error with ret = 0
    -->size_to_unmap = iova + size - __saved_iova_start;
    -->goto out;
    -->arm_smmu_assign_table()
    -->arm_smmu_unmap()
    ---->arm_smmu_secure_domain_lock() //DEADLOCKed!!!!!
    -------->mutex_lock()

The secure domain lock is needed to protect hyp assign and unassign.
Hence, its safe to call arm_smmu_secure_domain_unlock() after the
map and assign is done. Do this to avoid any runtime deadlocks.

Change-Id: I35effc170d8432d32c0cab3081be4897830d9212
Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-01-08 13:41:57 -08:00
qctecmdr
a5c335f749 Merge "msm: adsprpc: HMX,Async-FastRPC capability" 2020-01-08 13:34:18 -08:00
qctecmdr
89f8099d56 Merge "arm64: defconfig: Enable qseecom driver for Lahaina" 2020-01-08 12:50:46 -08:00
Jordan Crouse
3a2abcbc85 iommu: Fixup selftests
Commit fb3f251037 ("iommu/arm-smmu: Merge all IOMMU changes from msm-4.19
to msm-lahaina") added some enhanced selftest functions for io-pgtable-arm
and io-pgtable-fast but they still had older APIs for the IOMMU
operations.

Change-Id: Ic0dedbad3ce8339bc471afb83113b47cd169d5cc
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-01-08 13:25:40 -07:00
Jordan Crouse
2b6002f8df ion: Fix API changes in dma-buf-ref.c
Commit fe5698e796 ("ion: Merge all ION related changes from msm-4.19 to
msm-lahaina") added the file dma-buf-ref.c but it was using an older
kernel API for the stack trace management. Fix up the API to work
with 5.4.

Change-Id: Ic0dedbad6f0603ace4c8dc92e6789e043e7fdfa9
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-01-08 13:25:40 -07:00
qctecmdr
b399a72c3f Merge "msm:ipa: Race condition observed during client disconnect" 2020-01-08 11:01:36 -08:00
Biao Long
e24b1df8d9 sched/fair: Don't place wakee on waker cpu if colocate enabled
If both wakee and waker are in top-app,don't place wakee on waker
cpu, because most of this case waker is not going to sleep,this
will cause waker preempted and lead high runnable time,so let
scheduler to select the best cpu in this case.

Change-Id: If6eb3c0acb202197e9dd90205c581398ac049649
Signed-off-by: Biao Long <blong@codeaurora.org>
2020-01-08 09:31:47 -08:00
qctecmdr
c9a80de967 Merge "sched/walt: Avoid walt irq work in offlined cpu" 2020-01-08 08:47:27 -08:00
Zhen Kong
3cbbb8a5bc arm64: defconfig: Enable qseecom driver for Lahaina
Enable qseecom driver to provide secure communication from HLOS
to TZ.

Change-Id: If27300c985536dbdad15afee74b007bf01cb87ae
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
2020-01-08 08:31:42 -08:00
qctecmdr
f71c15bb63 Merge "sched/fair: Improve the scheduler" 2020-01-08 08:11:29 -08:00
qctecmdr
2d6312a106 Merge "msm: kgsl: Don't error out if dst size is not equal to src in copy_prop" 2020-01-08 07:31:54 -08:00
qctecmdr
b60524e9c2 Merge "msm: ipa: Add SMMU driver as soft dependency for IPA" 2020-01-08 04:58:57 -08:00
qctecmdr
2483f85924 Merge "qseecom: Add qseecom driver snapshot for Lahaina" 2020-01-08 03:23:03 -08:00
Deepak Kumar
32eea8bf28 msm: kgsl: Don't error out if dst size is not equal to src in copy_prop
Update copy_prop to allow copy to a destination buffer of size greater
than or less the source buffer size. This is needed to correctly pass
gaming bin fuse value to user mode.

Change-Id: I1b651c79b9286c1259fbace815d58892462a7931
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
2020-01-08 16:17:41 +05:30
qctecmdr
588d9a8be4 Merge "include: sound: add stub function for wcd dsp manager" 2020-01-08 02:40:25 -08:00
Ajay Prathi
18c9d42bb7 arm64: defconfig: Enable SPS driver for lahaina
Enable SPS driver for Lahaina. SPS (Smart Peripheral System)
enables the support of all BAMs in the system which provide DMA
functionality to various peripherals.

Change-Id: Icd393576a6c96240414c432e08b2bf2ae083dac9
Signed-off-by: Ajay Prathi <aprathi@codeaurora.org>
2020-01-08 15:43:30 +05:30
qctecmdr
c4754c3e48 Merge "dt-bindings: Add new port types for SWR 1.6 feature" 2020-01-08 02:00:58 -08:00
qctecmdr
160be75a7c Merge "defconfig: lahaina-gki: enable ufs 7nm phy for lahaina" 2020-01-08 01:22:29 -08:00
qctecmdr
605e1eb14c Merge "phy: qcom-ufs: add 7nm UFS QMP PHY support on Lahaina" 2020-01-08 00:37:28 -08:00
Mohammed Javid
216ce5870c msm:ipa: Race condition observed during client disconnect
Client ep[i] entries are memset to 0 as a part of tearing down
uc offload pipes which results in a race condition, if there are already
some packets which have been sent to IPA, when the client notify callback
is called.

Change-Id: I998e5d1c09d82e72b80ff00d1dd96398a92adc75
Acked-By : Abhishek Choubey <abchoube@qti.qualcomm.com>
Signed-off-by: Mohammed Javid <mjavid@codeaurora.org>
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2020-01-08 10:58:11 +05:30
qctecmdr
d750b39007 Merge "interconnect: qcom: Fix MACRO fields for Lahaina" 2020-01-07 20:37:31 -08:00
qctecmdr
2c5445837e Merge "iinterconnect: qcom: Hold high bandwidth vote for keepalive BCMs" 2020-01-07 19:58:26 -08:00
qctecmdr
7da699bec8 Merge "scsi: ufshcd-qti: Port the new crypto framework to QTI ufs" 2020-01-07 18:47:16 -08:00
Aditya Bavanari
701f0e8aed dt-bindings: Add new port types for SWR 1.6 feature
Add new port types for SWR 1.6 feature to accommodate
unified SWR Tx port mapping.

Change-Id: Ib3ac905c12628ea90b24ca26d29fde24e8ba0309
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>
2020-01-07 16:51:57 -08:00
qctecmdr
4495d8274f Merge "msm: kgsl: Refactor IOMMU contexts" 2020-01-07 16:32:22 -08:00
Anirudh Raghavendra
9175d25a5f msm: adsprpc: HMX,Async-FastRPC capability
Added two extra capabilities - HMX and Async FastRPC.
Async FastRPC checks the DSP for capability and
ANDs it with its own capability
which is then returned to the userspace.

Change-Id: I3310b76ccdafad664eff5f12493c9d3fc45cc4ca
Signed-off-by: Anirudh Raghavendra <araghave@codeaurora.org>
2020-01-07 15:35:02 -08:00