Commit graph

891,880 commits

Author SHA1 Message Date
qctecmdr
b20ec664b6 Merge "defconfig: sdxlemur: Enable CONFIG_QPNP_SMB5" 2020-10-29 10:12:28 -07:00
qctecmdr
365f0b4c06 Merge "input: qcom-hv-haptics: correct register values when toggling RC_CLK_CAL" 2020-10-29 10:12:28 -07:00
qctecmdr
489010dce7 Merge "mmc: cqhci: Port two trivial fixes in cqhci from earlier kernels" 2020-10-29 10:12:28 -07:00
qctecmdr
ab12fbd666 Merge "rtc: Disable alarm irq if alarm time is in the past" 2020-10-29 10:12:27 -07:00
qctecmdr
a7c4fa6f46 Merge "soc: qcom: Conditional compile page/slub minidumps" 2020-10-29 10:12:27 -07:00
qctecmdr
79e5a6f4c3 Merge "msm: ipa3: Enable dynamic switch between WDI2 and WDI3" 2020-10-29 10:12:27 -07:00
qctecmdr
fa744a0fbd Merge "iommu: arm-smmu: Fail device attach when SMR write fails" 2020-10-29 10:12:27 -07:00
qctecmdr
71c6027501 Merge "cpuidle: lpm-levels: Store per core next hrtimer wakeup" 2020-10-29 10:12:26 -07:00
Sarthak Garg
d3028e1ef5 mmc: cqhci: Port two trivial fixes in cqhci from earlier kernels
This is a squash of below two minor fixes:

8fec754f57a8 mmc: cmdq: trigger get queue status after dcmd
327fd3225911 mmc: cqhci: CQ Register changes for v5.0 onwards.

Change-Id: I1bb6cae5a647c4ea189a992d5ace7b6c1e3a1c87
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-10-28 18:48:24 +05:30
Guixiong Wei
381424fcbb rtc: Disable alarm irq if alarm time is in the past
If device is boot up by rtc alarm, the alarm irq will still be
enabled and the alarm time is smaller than current rtc time before
any alarm is set or canceled. If device is powered off now, it will
boot up automatically as the alarm irq is enabled.

So disable alarm irq if alarm is enabled and alarm time is in the
past.

Change-Id: I53dc7cdb1fa7c56eea07ed01d1f6cb63f0bb8a8d
Signed-off-by: Guixiong Wei <guixiong@codeaurora.org>
2020-10-27 20:43:15 -07:00
qctecmdr
5b47848843 Merge "msm: ipa4: Add changes to support PCIe addr for WDI2 over GSI" 2020-10-27 18:33:27 -07:00
qctecmdr
e988a4dce1 Merge "trace: f2fs: Fix kasan slab-out-of-bounds" 2020-10-27 18:33:27 -07:00
qctecmdr
804651c838 Merge "usb: phy: Add snapshot of USB QUSB PHY driver" 2020-10-27 18:33:27 -07:00
qctecmdr
116de19c62 Merge "arm64: defconfig: Add initial defconfig fragments for gen3auto" 2020-10-27 18:33:27 -07:00
qctecmdr
7f4ee4ba8b Merge "dt-bindings: clock: Update clock ids of GCC for YUPIK" 2020-10-27 18:33:26 -07:00
qctecmdr
10adaac106 Merge "haven: irq_lend: handle irq accept failure case" 2020-10-27 18:33:26 -07:00
qctecmdr
69f2bb9251 Merge "msm: pcie: update with link power on check for user PCIe resume" 2020-10-27 18:33:26 -07:00
qctecmdr
13851368ba Merge "ANDROID: scs: use vmapped shadow stacks by default" 2020-10-27 18:33:25 -07:00
Guru Das Srinagesh
8d707dbbb2 defconfig: sdxlemur: Enable CONFIG_QPNP_SMB5
Enable CONFIG_QPNP_SMB5 to enable the charger peripheral present in
PM7250B.

Change-Id: I7e60a792e298a208e4361ac65d9ae995008aec49
Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org>
2020-10-27 11:00:30 -07:00
Sami Tolvanen
bd3954f0a7 ANDROID: scs: use vmapped shadow stacks by default
Enable CONFIG_SHADOW_CALL_STACK_VMAP by default, and as we allocate
a full page for the stack, allow the kernel use all of it.

Bug: 169781940
Change-Id: Ie8eaa7f24e9bf10ff28a302ac98ad843b71c9c2a
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Git-commit: 1eb128820e
Git-repo: https://android.googlesource.com/kernel/common/+/refs/heads/android11-5.4
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
2020-10-27 13:23:45 +05:30
Sayali Lokhande
047fdb727d trace: f2fs: Fix kasan slab-out-of-bounds
This patch fixes the following KASAN report:

KASAN: slab-out-of-bounds in string+0xb4/0x120
Read of size 1 at addr fffffffbf2f3b510 by task atrace/9219

Call trace:
dump_backtrace+0x0/0x3e8
show_stack+0x20/0x30
dump_stack+0x13c/0x198
print_address_description+0x80/0x2e0
kasan_report_error+0x1ac/0x210
__asan_report_load2_noabort+0x0/0xb8
string+0xb4/0x120
vsnprintf+0x5f4/0x1658
seq_buf_vprintf+0x11c/0x200
trace_seq_printf+0x1a8/0x320
trace_raw_output_f2fs_lookup_start+0xe8/0x158
print_trace_line+0x3cc/0xeb0
s_show+0x154/0x248
seq_read+0x8a8/0x1378
__vfs_read+0xfc/0x550
vfs_read+0x108/0x268
ksys_read+0x124/0x2b0

Correctly assign name string for f2fs trace.

Change-Id: I8ed0cf7c542ead06479fb4fde65b01b5e739e6db
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
2020-10-27 00:06:59 -07:00
Pooja Kumari
759bd95c83 msm: ipa3: Enable dynamic switch between WDI2 and WDI3
Enable WDI2 and dynamic switching between WDI3
and WDI2 based on wlan input.

Change-Id: Iaa23c78d8852fe12d9f9bc1133ee7c53f6755779
Signed-off-by: Pooja Kumari <kumarip@codeaurora.org>
2020-10-26 23:42:02 -07:00
qctecmdr
7bac0bc013 Merge "soc: qcom: proxy_consumer: Add support for amba_driver" 2020-10-26 20:50:59 -07:00
Murali Nalajala
eb84f8329c haven: irq_lend: handle irq accept failure case
When PVM lend an IRQ, a notification is given to SVM. Later SVM can
accept the IRQ that is lend by PVM. If the SVM do not accept an IRQ,
PVM can reclaim it back and lend again to SVM. This scenario is not
handled correctly and notification for lend from PVM to SVM is not
happening. Do an extra check in the callback handler whether previous
lend succeeded or not.

Change-Id: I9a6d335b6c11c8aea956fa1535b093c385e4cde1
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
2020-10-26 14:28:26 -07:00
Raghavendra Rao Ananta
74672e6b27 soc: qcom: proxy_consumer: Add support for amba_driver
The proxy consumer driver currently only supports proxy
probing for platform bus. However, there's a need to
proxy-probe coresight devices, which falls under ABMA bus.
Hence, extend the driver to support proxy probing for
"struct amba_driver" and add coresight-etm ids to the list.

Change-Id: I48da20ea18f61b5cc82ae0616a75c23af32481a2
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-10-26 11:01:10 -07:00
Raghavendra Rao Ananta
873068025a ANDROID: ABI: Update allowed list for QCOM
Add the following symbols to QCOM allowed-list:
-- amba_driver_register
-- amba_driver_unregister

Bug: 171409550
Change-Id: Iab997df4f8ebb2c39b993b60ee4eb0fa3100fbcd
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
Git-commit: 95bd9e26f2
Git-repo: https://android.googlesource.com/kernel/common/+/refs/heads/android11-5.4
[rananta@codeaurora.org: Generate and add an internal ABI snapshot]
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-10-26 11:01:10 -07:00
Raghavendra Rao Ananta
f908c1019e soc: qcom: of_proxy_consumer: Add "qcom,jtagv8-mm"
Add "qcom,jtagv8-mm" to the list of proxy consumers, such that
the sync-state logic need not wait for the probe from the actual
driver if it's disabled.

Change-Id: I580a865ba3c4c298d76e29552eec854b33faea24
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-10-26 11:01:09 -07:00
qctecmdr
f4e98f0cf5 Merge "mmc: sdhci-msm: Update to enhanced SDCC5 DLL power up sequence" 2020-10-26 09:53:31 -07:00
qctecmdr
4b196d63cf Merge "Merge android11-5.4.61+ (8540985) into msm-5.4" 2020-10-26 07:17:41 -07:00
qctecmdr
a2e07b7fb8 Merge "msm: kgsl: Make clear_pending_transactions target specific" 2020-10-26 07:17:40 -07:00
Jun Li
5a50bc191e mmc: sdhci-msm: Update to enhanced SDCC5 DLL power up sequence
Update the DLL power up sequence according to the latest enhanced SDCC
DLL HSR document and SDCDC initialization sequence in HPG.

Final sequence:
Step 1 - Set PWRSAVE bit in MCI_CLK to '0' during reset
Step 2 - Disable CK_OUT
Setp 3 - Set CORE_DLL_CLOCK_DISABLE to '1'
Step 4 - Set RST & PDN to '1'
Step 5 - Set DLL_CONFIG_3
Step 6 - Set SDC4_USER_CTRL
Step 7 - Set SDC4_TEST_CTRL(SW can Skip this step)
Step 8 - Set DDR_CONFIG
Step 9 - Set DLL_CONFIG_2
Step 10 - Set DLL_CONFIG
Step 11 - Wait for 52 us
Step 12 - Set RST & PDN to '0'
Step 13 - Set RST to '1'
Step 14 - Set RST to '0'
Step 15 - Set CORE_DLL_CLOCK_DISABLE to '0'
Step 16 - Wait for 8000 input clock cycles
Step 17 - Enable CK_OUT
Step 18 - Check for Lock
Step 19 - If PWRSAVE is needed, set PWRSAVE to '1'.

Change-Id: I889937a1728b3ce039a802972f9668969fe96505
Signed-off-by: Jun Li <liju@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-10-26 13:27:17 +08:00
qctecmdr
cf0ffb9c2c Merge "dma-mapping.h: Fix CRC mismatch issues from including genalloc.h" 2020-10-25 19:42:00 -07:00
qctecmdr
45fb30f007 Merge "input: qcom-hv-haptics: only use 4-byte writes when refilling FIFO" 2020-10-25 19:42:00 -07:00
Fenglin Wu
1c0c561c7f input: qcom-hv-haptics: correct register values when toggling RC_CLK_CAL
Correct register values when toggling RC_CLK_CAL for playing haptics in
HBoost open loop case.

Change-Id: Ia48ab3af93181c61ec719716634e94a819353c8b
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
2020-10-26 07:57:45 +08:00
qctecmdr
65e751ed01 Merge "mmc: host: Add variant ops for cqhci crypto" 2020-10-25 11:05:49 -07:00
qctecmdr
a5532e7931 Merge "defconfig: msm: Enable CONFIG_UFS_DBG for Holi debug builds" 2020-10-25 02:33:22 -07:00
qctecmdr
f09654a8fe Merge "mtd: msm_qpic_nand: Use logical unit count in flash density" 2020-10-25 02:33:22 -07:00
qctecmdr
b12359c3dc Merge "mmc: Kconfig: select DEVFREQ_GOV_SIMPLE_ONDEMAND with SDHCI_MSM" 2020-10-25 02:33:21 -07:00
qctecmdr
70c6b344c7 Merge "soc: spcom: fix race during channel character dev creation" 2020-10-25 02:33:21 -07:00
qctecmdr
4764cf6f6e Merge "cnss2: Check if firmware asserts before power off for CBC" 2020-10-25 02:33:21 -07:00
qctecmdr
82ef587103 Merge "iommu/arm-smmu: Leave power resources enabled across unmap and sync ops" 2020-10-25 02:33:21 -07:00
Yadu MG
bdae2a9977 arm64: defconfig: Add initial defconfig fragments for gen3auto
Add initial defconfig fragments for gen3auto which includes
gen3auto_GKI, gen3auto_QGKI and gen3auto_debug defconfig files
for gen3auto ADP.

Change-Id: I70c9555e41270bb7c45ffda13ad424995f32c85c
Signed-off-by: Yadu MG <ymg@codeaurora.org>
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
2020-10-24 17:36:36 +05:30
Veera Vegivada
e25f80b327 pinctrl: qcom: Expose ufs_reset as gpio on sa8195
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pin.
Reorder the pins and expose it as gpio 204, so that the UFS driver can
toggle it.

Change-Id: Ifd0b430a4c057a4fa5c4a57fb484c71df18d7f1d
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2020-10-24 17:35:27 +05:30
Saurabh Ambulkar
f4b1b0c872 pinctrl: qcom: Add initial pinctrl driver for sdmshrike
Add initial pinctrl driver to support pin configuration with
pinctrl framework for sdmshrike. This driver is a snapshot of
pinctrl-sdmshrike.c from msm-4.14 at commit id "54fbb7a2".

Change-Id: I8585c025cee91e5cce75598ed2e43cdc00bb769a
Signed-off-by: Saurabh Ambulkar <sambulka@codeaurora.org>
2020-10-24 17:34:52 +05:30
Vivek Kumar
0e8e0ee81e pinctrl: qcom: sm8150: Populate egpio variables in Pingroup
Populate egpio related variables in pingroup macro. This is
to make sure pincontrol-msm driver takes epgio bits into
account when it configures pinmux setting for any tlmm pin.

Change-Id: I828661fd2e05664b583dc40d3110096a95a489e8
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
2020-10-24 17:34:15 +05:30
Shreyas K K
898843087d arm64: Kconfig: Add config option for SA8195
Add option to enable the compilation for SA8195
platform.

Change-Id: I0866efa419c213d842448b35ee4a829785e7d954
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
2020-10-24 17:33:19 +05:30
Shreyas K K
30b16a09fa arm64: Kconfig: Add support for ARCH_SA8155
Add option "ARCH_SA8155" to enable compilation
for sa8155 target.

Change-Id: I55af2e604c946f8d0494ed6b9ad53aa42244b596
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
2020-10-24 17:32:24 +05:30
Konstantin Dorfman
e9db615eb4 soc: spcom: fix race during channel character dev creation
During char device creation, device counted by chdev_count and since
the device creation can happen from different contexts, need to guard the
flow.

This change introduces new lock for spcom_dev->chdev_count.

Change-Id: If59c3ae69d7366892583b2552cf276b6714eeb03
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
2020-10-23 13:09:15 -07:00
Isaac J. Manjarres
2c793736ae iommu/arm-smmu: Leave power resources enabled across unmap and sync ops
The votes for power resources can only be removed if there are no
outstanding TLB invalidation operations. This is true when the
downstream io-pgtable-arm optimizations are in use, as the code that
unmaps the memory from the IOMMU page tables ensures that all TLB
operations are complete before returning.

However, the upstream io-pgtable-arm implementation allows for a TLB
invalidation to be in progress when control is returned back to
arm_smmu_unmap(), at which point the votes for the power resources
will be removed. In cases where the GPU is in slumber, the GPU block
and GPU SMMU get powered down when the SMMU driver removes its votes.
This causes problems where unmapping buffers takes a long time.

For scenarios where it is not feasible to guarantee that TLB
invalidations have completed when control is returned to the
arm_smmu_unmap() function, leave the votes for power resources in place,
and rely on the subsequent sync operation to remove the votes.

Change-Id: Idc594cc69860b44a8eb56c72b5c592bf4799bf84
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-10-23 11:43:56 -07:00
Neeraj Upadhyay
286fb48b3d soc: qcom: Conditional compile page/slub minidumps
Put page owner and slub debug entries under conditional
flag, to avoid compilation issues.

Change-Id: I2a0c20f7bc9158e7a52e58c6a28a8f0859e83983
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
2020-10-23 23:22:30 +05:30