Commit graph

875,832 commits

Author SHA1 Message Date
Elliot Berman
b666a7e42a time: Add rq_stats snapshot
Add snapshot of runqueue stats module as of commit <e56fe938419e>
(Merge "uapi: Introduce V4L2_FLAG_CVPMETADATA_SKIP flag").

Added #ifdefery to allow rq_stats to actually be optional.

Change-Id: I3352a472c5b0ad61cc04317a1d6f26549bfcdc04
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-12-17 11:44:09 -08:00
qctecmdr
5b1b65d030 Merge "arm64: defconfig: Enable QUPv3 and GPI drivers on lahaina" 2019-12-16 11:29:58 -08:00
qctecmdr
7847fb4f8a Merge "msm: ipa: load IPA FW after smmu CB are probed" 2019-12-16 11:29:57 -08:00
qctecmdr
9adbc34dba Merge "Revert "perf: Set the DSU PMU to be readable from any CPU"" 2019-12-16 11:29:57 -08:00
qctecmdr
abe6d961ff Merge "msm: ipa: Add graceful handling to skip partial packets" 2019-12-16 10:50:50 -08:00
qctecmdr
abdbe88f83 Merge "msm: ipa: Fix not to update state during pipe reset" 2019-12-16 10:50:50 -08:00
qctecmdr
224be36813 Merge "msm: ipa: add support to updated wdi3 scratch register2 alone" 2019-12-16 10:50:49 -08:00
qctecmdr
1e336131de Merge "drivers: llcc edac: Add Cache Error Reporting driver for llcc" 2019-12-16 10:09:15 -08:00
qctecmdr
a11cd8cdd1 Merge "drivers: soc: qcom: Add snapshot of boot stats driver" 2019-12-16 10:09:14 -08:00
qctecmdr
6c5735d14c Merge "Revert "soc: qcom: socinfo: Expose custom attributes"" 2019-12-16 10:09:14 -08:00
qctecmdr
c24ca01eac Merge "arm64: defconfig: Enable spcom driver on Lahaina" 2019-12-16 10:09:14 -08:00
qctecmdr
ea118c4263 Merge "msm: ipa: Fix not sending QMI sync indication" 2019-12-16 10:09:14 -08:00
qctecmdr
7c77c9622d Merge "cpufreq: qcom: Update cycle counter logic for CPUFREQ HW" 2019-12-16 09:32:55 -08:00
Ghanim Fodi
d3e8fba561 msm: ipa: load IPA FW after smmu CB are probed
Now with GKI, SMMU CB can be delayed in probe
due to dependencies. The change waits for the
probe before triggering fw loading and post_init
call.

Change-Id: I468edd730a91de01ba9619385ab0c76083bc9382
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
2019-12-16 15:20:23 +02:00
Vipin Deep Kaur
ad58b3b633 arm64: defconfig: Enable QUPv3 and GPI drivers on lahaina
Enable QUPv3(I2C, SPI, I3C) and GPI drivers on lahaina.

Change-Id: I0f539bbe782870bf8e982c645ccef77238e93049
Signed-off-by: Vipin Deep Kaur <vkaur@codeaurora.org>
2019-12-16 11:19:04 +05:30
Chaitanya Pratapa
2f2eea29bc msm: ipa: add support to updated wdi3 scratch register2 alone
To update QMAP ID there is no need to start and stop the GSI
channel. Make changes to read only scratch2 register for WDI3
protocol and update the QMAP ID without affecting other registers.

Change-Id: I7f873386fd01d624629fed15b841c6abd558a9ce
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-12-15 12:30:39 -08:00
Chaitanya Pratapa
8872e11021 msm: ipa: Fix not sending QMI sync indication
If back to back SSR is triggered there is a possibility
of race condition where we try to send QMI sync indication
with a invalid handle. Make a change to validate the handle
before sending the indication.

Change-Id: If912b6676b562bd4a23c68512e9c80e6c0ac7a49
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-12-15 12:25:10 -08:00
Chaitanya Pratapa
e54481078f msm: ipa: Add graceful handling to skip partial packets
Partial packets are not expected to be receievd on WAN_CONS
pipe. Make changes to handle gracefully if EOB packets
are received on WAN_CONS pipe in cases where network is
misbehaving.

Change-Id: I4a4ce96a0c86f353e1764d016edbb00011367205
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-12-15 12:23:03 -08:00
Chaitanya Pratapa
c4e75e2793 msm: ipa: Fix not to update state during pipe reset
When MHI pipes are disconnected, host doesn't expect any
further communication from device. Make a change to not
to update the state during pipe disconnect.

Change-Id: Ia2315e3a94049ba3adda4b42d363ce2f7108d89f
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-12-15 12:18:19 -08:00
Konstantin Dorfman
caa496a1c6 arm64: defconfig: Enable spcom driver on Lahaina
This change enables spcom driver on Lahaina.

Change-Id: Ia8cbb369c3dd201389f83c8183dc573ecec71bb2
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
2019-12-15 09:55:31 +02:00
qctecmdr
24a21204c9 Merge "rtc: rtc-pm8xxx: add support for PMK8350 RTC" 2019-12-14 15:29:40 -08:00
qctecmdr
03c6cb1926 Merge "msm: adsprpc: Remove IPC logging from fastrpc driver" 2019-12-14 14:54:43 -08:00
qctecmdr
4046e33f14 Merge "drivers: thermal: cpu_cooling: Use Policy cpu as cdev ID" 2019-12-14 14:54:42 -08:00
qctecmdr
0275af0baf Merge "usb: host: xhci: Replace msleep with usleep_range" 2019-12-14 14:20:51 -08:00
qctecmdr
68ab595cfd Merge "usb: host: xhci: Change L1 timeout default to 128us" 2019-12-14 13:45:02 -08:00
qctecmdr
7740f4f565 Merge "soc: qcom: subsys_notif: Add early SSR notifications for PCIe DRV" 2019-12-14 12:54:19 -08:00
qctecmdr
5aa349c691 Merge "defconfig: lahaina-gki: Enable QTI Tri-LED driver" 2019-12-14 12:54:19 -08:00
qctecmdr
54fde738e5 Merge "sched/fair: Improve the scheduler" 2019-12-14 12:12:58 -08:00
qctecmdr
9e4cf2377a Merge "soc: qcom: spcom: add spcom as DLKM for GKI" 2019-12-14 12:12:58 -08:00
qctecmdr
4bf60464b5 Merge "FROMLIST: sched/fair: Use wake_q length as a hint for wake_wide" 2019-12-14 11:18:39 -08:00
qctecmdr
41bb745cf6 Merge "PM / EM: Micro optimization in em_pd_energy" 2019-12-14 10:36:41 -08:00
Taniya Das
6eeae6b763 cpufreq: qcom: Update cycle counter logic for CPUFREQ HW
There could be cpufreq hw where accumulative cycle counters are not
supported. Add a device tree property to identify the same.

On those hardware the cycle counter needs to be read from core-0 of the
frequency domain.

Change-Id: Ib7969b2c5aaaf78f7c8359d7c417b9453e6c1f2f
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-14 09:50:43 -08:00
Taniya Das
b478324c7f cpufreq: qcom-cpufreq-hw: Initialize the spinlock before usage
Initialization of the spinlock is required to avoid the below trace.

cpufreq: driver qcom-cpufreq-hw up and running
BUG: spinlock bad magic on CPU#7, swapper/0/1
lock: qcom_cpufreq_counter+0x128/0x140, .magic: 00000000,
.owner: <none>/-1, .owner_cpu: 0.

Change-Id: I079ebd7c0009c3b634d2d5d41ac880da06cf8f6d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-14 09:50:24 -08:00
Taniya Das
ffd89c1cb1 cpufreq: qcom-hw: Add register offsets for non-epss devices
Update the cpufreq hardware register offsets data for non EPSS devices to
be able to parse the LUTs of frequency and voltage.

Re-introduce the commit '00319840a4af ("cpufreq: qcom-hw: Update freq_scale
from fast_switch path")'
The freq_scale maintained by the topology driver needs to be updated when
the frequency is transitioned. Without this, the current capacity of a CPU
metric gets broken in the scheduler.

The current code calls arch_set_freq_scale() from the target_index method
but not from the fast_switch method. Fix this.

Change-Id: I2789b76f14b4c0fe8ad52b449ed9f4ea3a4bff32
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-14 09:50:18 -08:00
Pavankumar Kondeti
b90c678d9b cpufreq: qcom-hw: Update freq_scale from fast_switch path
The freq_scale maintained by the topology driver needs to be
updated when the frequency is transitioned. Without this,
the current capacity of a CPU metric gets broken in the scheduler.

The current code calls arch_set_freq_scale() from the target_index
method but not from the fast_switch method. Fix this.

Change-Id: I92cafba9ffd4a70c8a06ed54e4e410336de4d453
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-14 09:50:11 -08:00
Taniya Das
11ee5d6922 cpufreq: qcom-hw: Add support for EPSS CPUFREQ firmware
This is in preparation for updating the current driver to the upstreamed
code. Add support to take care of EPSS firmware related code.

Change-Id: I4bd4165a8457dcaedc26d3bc8704db0c886832ed
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-14 09:50:04 -08:00
qctecmdr
ac21732fc6 Merge "ANDROID: sched: Per-Sched-domain over utilization" 2019-12-14 09:43:16 -08:00
qctecmdr
f536145ef0 Merge "Revert "Mark HI and TASKLET softirq synchronous"" 2019-12-14 09:00:45 -08:00
qctecmdr
fac6230faf Merge "softirq: defer softirq processing to ksoftirqd if CPU is busy with RT" 2019-12-14 08:07:05 -08:00
qctecmdr
9dd145718b Merge "sched/fair: Add snapshot of load-balancing changes" 2019-12-14 07:12:11 -08:00
qctecmdr
18b2bd0259 Merge "kernel: Add snapshot of changes to support cpu isolation" 2019-12-14 06:22:07 -08:00
qctecmdr
a00df95151 Merge "ANDROID: sched, cpuidle: Track cpuidle state index in the scheduler" 2019-12-14 05:47:02 -08:00
qctecmdr
2f2d872989 Merge "power: em: correct increasing freq/power ratio" 2019-12-14 05:09:38 -08:00
qctecmdr
f5f00f4ff2 Merge "scripts: Makefile: Remove flags which are not support by EXT_DTC" 2019-12-14 04:32:38 -08:00
qctecmdr
916dbcdb30 Merge "iommu: arm-smmu: clear TBU halt request when halt times out" 2019-12-14 04:32:38 -08:00
qctecmdr
5cde937fee Merge "cpufreq: qcom-hw: use no_log when reading cpu counter val" 2019-12-14 03:51:35 -08:00
qctecmdr
341f70c77d Merge "scripts: Makefile: Add multi overlay dtbo-base apply verify" 2019-12-14 03:51:34 -08:00
qctecmdr
da38478d65 Merge "cpufreq: qcom-hw: Register child devices" 2019-12-14 03:12:39 -08:00
qctecmdr
3e78982665 Merge "cpufreq: qcom-hw: Set dvfs_possible_from_any_cpu cpufreq driver flag" 2019-12-14 02:36:33 -08:00
Elliot Berman
78a7a11b53 arm64: defconfig: Remove IKHEADERS option
The generation of kheader.tar.xz file uses xargs in ways that seems to
be unaccepatble by certain build environments, thus leading to build
failures. Disable the CONFIG to avoid the situation.

Change-Id: Ib7a2ca0c449f22021e80ac1382a9e5bdf6b388ba
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-12-12 13:14:59 -08:00