Commit graph

898,779 commits

Author SHA1 Message Date
qctecmdr
d0ce056b72 Merge "drivers: uart: initialize spin_lock before use" 2021-05-14 09:39:21 -07:00
qctecmdr
a67908f7ac Merge "defconfig: Add CONFIG_DEBUG_INFO for sdx12" 2021-05-14 09:39:20 -07:00
qctecmdr
3a9c7c52e7 Merge "soc: qcom: ddr_stats: API to read ddr residency" 2021-05-14 09:39:20 -07:00
qctecmdr
44fc2c8005 Merge "soc: qcom: hab: Add HAB fixes, and workarounds, for GHS" 2021-05-14 09:39:20 -07:00
qctecmdr
ea045f5208 Merge "dt-bindings: clock: Add support for clock ids for SCUBA" 2021-05-14 09:39:19 -07:00
qctecmdr
5af89e546a Merge "cnss2: Add code to print return value of BDF download failure" 2021-05-14 09:39:19 -07:00
qctecmdr
720bd5fe2a Merge "arm64: Kconfig: Add config option ARCH_SA2150P" 2021-05-14 09:39:19 -07:00
qctecmdr
c274e5f062 Merge "STMMAC: msm: Add io macro setting for 10Mpbs" 2021-05-14 09:39:18 -07:00
qctecmdr
df52b0feef Merge "defconfig: Compile icnss2 as part of vmlinux in monaco" 2021-05-14 09:39:18 -07:00
qctecmdr
f716cd752c Merge "msm: ep-pcie: Correct two CAP reg offsets" 2021-05-12 23:55:16 -07:00
qctecmdr
ff3d25b276 Merge "clk: qcom: gdsc: Update the BLK_ARES assert/deassert delay" 2021-05-12 23:55:16 -07:00
qctecmdr
5b628b2f9a Merge "usb: phy: Drive a pulse on DP on CDP detection" 2021-05-12 23:55:15 -07:00
qctecmdr
dbb99d92c2 Merge "cnss2: Fix invalid assignment due to type mismatch" 2021-05-12 23:55:15 -07:00
qctecmdr
3ecdedce1b Merge "defconfig: monaco: add stm proto basic" 2021-05-12 19:00:45 -07:00
qctecmdr
4beeba5338 Merge "arm: defconfig: enable thermal drivers for monaco" 2021-05-12 16:18:45 -07:00
qctecmdr
ed787f8498 Merge "soc: qcom: ddr_stats: update driver to get reg in probe" 2021-05-12 13:36:29 -07:00
qctecmdr
552a812707 Merge "msm: kgsl: Fix snapshot collection for ib1" 2021-05-12 08:42:25 -07:00
qctecmdr
146fa24541 Merge "soc: qcom: smem: Fix compilation warning" 2021-05-12 08:42:25 -07:00
Dundi Raviteja
e555369a25 defconfig: Compile icnss2 as part of vmlinux in monaco
Currently icnss2 for monaco is compiling as serperate
kernel module, change it to compile as part of vmlinux.

Change-Id: Ifb175f9f3b418edbe5df5836b8f02e41a11898bc
CRs-Fixed: 2944263
Signed-off-by: Dundi Raviteja <dundi@codeaurora.org>
2021-05-12 05:57:48 -07:00
qctecmdr
7909de7b54 Merge "sched: walt: Fix stale walt CPU reservation flag" 2021-05-12 05:57:27 -07:00
Mohammed Siddiq
a5aea06283 cnss2: Add code to print return value of BDF download failure
Add code to print return value of BDF download failure.

Change-Id: Ifca293d00eeae98fb8a6a0f81bba853c8d382cd3
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
2021-05-12 05:09:26 -07:00
Shreyas K K
52e382719a arm64: Kconfig: Add config option ARCH_SA2150P
Add config option to support SA2150P architecture
platform.

Change-Id: Ic1acd38fdafa2d3011506ed5240b3f30c4a1d44d
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
2021-05-12 17:08:06 +05:30
qctecmdr
787f7bf33d Merge "char: virtio_fastrpc: read domain number from device tree" 2021-05-12 03:01:03 -07:00
qctecmdr
060901c8f1 Merge "arm64: defconfig: Enable IOMMU related configs on direwolf" 2021-05-12 03:01:03 -07:00
qctecmdr
34a80d7261 Merge "pinctrl: qcom: spmi-pmic: Add "pm5100-gpio" compatible string" 2021-05-12 03:01:03 -07:00
Venkata Rao Kakani
cb9e2e0064 drivers: uart: initialize spin_lock before use
In linux guest restart case, during probe, stop_rx_sequencer is
getting called because of residual state set before restart.

spin_lock which is used in stop_rx_sequencer is not initialized.
To, resolve spin_lock debug mentioned below, initialize spin_lock
early.

		spin_dump+0x84/0x88
		do_raw_spin_lock+0xd4/0x12c
		raw_spin_lock+0x20/0x2c
		handle_rx_dma_xfer+0x44/0x330
		stop_rx_sequencer+0x118/0x420
		start_rx_sequencer+0xc0/0x1a0
		msm_geni_serial_runtime_resume+0x54/0xb8
		pm_generic_runtime_resume+0x44/0x80
		__rpm_callback+0x98/0x208
		rpm_resume+0x458/0x6a4
		__pm_runtime_resume+0x60/0xa0
		__device_attach.llvm.18035772682363603059+0xa0/0x174
		bus_probe_device+0x3c/0xdc
		device_add+0x95c/0xb84
		serdev_controller_add_platform+0x2c/0x1d0
		serdev_tty_port_register+0xf8/0x188
		tty_port_register_device_attr_serdev+0x50/0x90
		uart_add_one_port+0x268/0x60c
		msm_geni_serial_probe+0x630/0x780
		platform_drv_probe+0xac/0xf0
		really_probe+0x210/0x7d8.

Change-Id: I9e139897681ece174a9ead63f57bb999585ff0bf
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-12 15:18:20 +05:30
Wu Gao
ed263a8db1 defconfig: Add CONFIG_DEBUG_INFO for sdx12
Kernel symbol size is very small after removed CONFIG_DEBUG_INFO, so
add it back. This change adds below kernel configs for SDX12 debug
build:
  CONFIG_SLUB_DEBUG
  CONFIG_DEBUG_PREEMPT
  CONFIG_SCHED_DEBUG
  CONFIG_HAVE_DEBUG_KMEMLEAK
  CONFIG_DEBUG_BUGVERBOSE
  CONFIG_CC_HAS_KASAN_GENERIC

Change-Id: I502dd3800252077838063a0a4c25fe92bdac4c48
Signed-off-by: Wu Gao <wugao@codeaurora.org>
2021-05-12 17:37:27 +08:00
qctecmdr
dc53396363 Merge "cnss2: Dump MHI/PBL/SBL debug data during MHI power on" 2021-05-12 00:07:02 -07:00
Hongwei Ren
b51c567ce3 dt-bindings: clock: Add support for clock ids for SCUBA
Add clock IDs for GCC/GPUCC/DISPCC for clients to be able
to request for clocks from these clock controllers.

Change-Id: Ibd69e800ff6ebd0d59d34605deb8dc092c25b907
Signed-off-by: Hongwei Ren <hongren@codeaurora.org>
2021-05-12 11:48:38 +05:30
Zhiqiang Tu
4f02b73d10 soc: qcom: hab: Add HAB fixes, and workarounds, for GHS
Fix kernel shutdown callback crash in HAB by removing
commdev freeing in pchan free.
Add stub functions for dump_hab_wq and hab_pipe_read_dump.

Change-Id: I176085600e3ec3a40eb2f181491405c6bf4ac7bb
Signed-off-by: Anant Goel <anantg@codeaurora.org>
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
Signed-off-by: Yong Ding <yongding@codeaurora.org>
2021-05-11 21:55:51 -07:00
qctecmdr
e38c09a5b8 Merge "pci: msm: msm_pcie_iatu_config API clean" 2021-05-11 18:40:45 -07:00
Can Guo
c150d993f3 msm: ep-pcie: Correct two CAP reg offsets
Correct the offsets of L1SUB_CAPABILITY_REG and L1SUB_CONTROL1_REG.

Change-Id: I6130a7eab50d85e34d87c28bde3a48c058ee9eee
Signed-off-by: Can Guo <cang@codeaurora.org>
2021-05-12 07:59:40 +08:00
Can Guo
bab76a95c0 msm: ep-pcie: Allow device enter L1 right after BME is set
Allow device enter L1, i.e. clear PCIE_0_PCIE_PARF_PM_CTRL[REQ_NOT_ENTR_L1]
once we find out BME is set.

Change-Id: I8aca816446a286d02ef51724d157cb7c75057250
Signed-off-by: Can Guo <cang@codeaurora.org>
2021-05-12 07:59:17 +08:00
qctecmdr
e65b513369 Merge "pci: msm: Add dynamic iATU config for ep config space access" 2021-05-11 15:52:29 -07:00
Manaf Meethalavalappu Pallikunhi
6095d843da arm: defconfig: enable thermal drivers for monaco
Enable thermal sensors, governors and cooling device
drivers for monaco.

Change-Id: Iabc1a6501cb953dbfdf2813716022ceac0194d86
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
2021-05-11 22:39:53 +05:30
Suraj Jaiswal
e17d5f184b STMMAC: msm: Add io macro setting for 10Mpbs
IO macro setting for SA6155 for 10Mpbs.

Change-Id: I81238dfef16484197fe364ba6c10b1d47a519793
Signed-off-by: Suraj Jaiswal <jsuraj@codeaurora.org>
2021-05-11 18:17:28 +05:30
Pankaj Gupta
274824c561 msm: kgsl: Fix snapshot collection for ib1
Sometimes IB1_BASE from register does not match with IB1 of the
ring buffer, this may happen while doing save restore of IB
during preemption. In such case, to dump IB1 in snapshot, check
for overlap between IB1_BASE and IB1 from the ring buffer and
dump IB1 in snapshot as per ring buffer's IB1 base and size.

Change-Id: Ic3af8678a11f20f447fcbcbd3ec209283619b96a
Signed-off-by: Pankaj Gupta <gpankaj@codeaurora.org>
2021-05-11 17:18:11 +05:30
qctecmdr
887e689725 Merge "Fixing the GVM suspend failure due to veth_ipa_suspend" 2021-05-11 04:21:50 -07:00
Minghao Zhang
1b5b05b0ab soc: qcom: ddr_stats: API to read ddr residency
DDR residency can be read using sysfs node.
This change provides an API to get ddr residency so that it
can be read from any kernel drivers.

Change-Id: I6f0d508994a1f5e427e2cbce6f0229013fec387f
Signed-off-by: Minghao Zhang <minghao@codeaurora.org>
2021-05-11 17:35:08 +08:00
Minghao Xue
735d4c5201 char: virtio_fastrpc: read domain number from device tree
domain number could be different between platforms.

Change-Id: I6fa33635305ec71ec2ebaec35f7a68bbe0181609
Signed-off-by: Minghao Xue <mingxue@codeaurora.org>
2021-05-11 16:53:13 +08:00
qctecmdr
8f48489bc2 Merge "clk: qcom: gcc-blair: Add support for AHB clocks" 2021-05-11 01:42:47 -07:00
qctecmdr
b9ca7556ae Merge "drivers: rename_block: Enable A/B support" 2021-05-11 01:42:47 -07:00
Minghao Zhang
89d7b6ef3d soc: qcom: ddr_stats: update driver to get reg in probe
This change optimizes to get reg during probe.
With this change no need to ioremap_nocache() reg for every
ddr_stats_show() call.

Change-Id: Ieb38280d1f03e1d613e638a7532b7b014525fbf1
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
Signed-off-by: Minghao Zhang <minghao@codeaurora.org>
2021-05-11 16:39:13 +08:00
Veera Vegivada
938bcb66ce arm64: defconfig: Enable IOMMU related configs on direwolf
Enable the ARM SMMU driver as a module for direwolf GKI
and also enable other IOMMU configs for direwolf QGKI.

Change-Id: I3b27eda0efbf64411de22a36a430121356bb79bd
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2021-05-11 10:20:27 +05:30
Vivek Kumar
95dae267d0 arm64: defconfig: Enable IPCC driver as a module for direwolf
Enable IPCC driver as a loadable kernel module for direwolf.

Change-Id: I03bdc05193b9892e99a02c9855dcfe3e6a20a69e
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
2021-05-11 10:19:39 +05:30
Sriharsha Allenki
ef4e7c17dd usb: phy: Drive a pulse on DP on CDP detection
Some USB host PCs switch the downstream port mode from
CDP to SDP if the device does not pull DP up within certain
duration (~2s).
This limits the current drawn by the device to 500mA(or 900mA)
as opposed to the possible 1.5A resulting in slow charging of
the battery.
Fix this by driving a DP pulse when there is a connect
notification from PMIC and detected the charger type as CDP.

Change-Id: I76ac4c33dbbc538f5cb680fd1b5c15f8fb3bfe50
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Signed-off-by: Udipto Goswami <ugoswami@codeaurora.org>
2021-05-11 09:57:01 +05:30
Hemant Kumar
12f060439d pci: msm: msm_pcie_iatu_config API clean
Get rid of access to pciedev_table. Update data type
for bdf from unsigned long to u32. Prevent iATU config
for root port BDF. Do not save config values to rc_shadow
as iATU is configured dynamically.

Change-Id: I9e7254d1e6d91869db71c71f1c5b699a4d6376f4
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:12:13 -07:00
Hemant Kumar
5d4e8db03a pci: msm: Refactor endpoint event registration
For endpoint event registration do not depend on
num_ep, active_num_ep and pending_ep_reg variables.
Instead, create a list of registered endpoints and
notify an endpoint by iterating over the list of
registered endpoints with their corresponding
registered event. This also removes dependency on
PCIe device table and simplifies
msm_pcie_config_device_table function. Keep the
handling of upstream port I/O, memory and BME.

Change-Id: I5ab25ef300f0bc59ae5c2d973c662a0f81e44f43
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:12:05 -07:00
Hemant Kumar
5d3e24ee00 pci: msm: Use endpoint list to track suspend and resume
Decouple endpoint event registration from link suspend.
Instead of relying on pending_ep_reg and num_active_ep
create an enumerated endpoint list at the time of endpoint
enumeration and move it to suspended endpoint list up
on link suspend. If enumerated endpoint list becomes
empty allow link suspend. Move endpoint back to enumerated
list upon resume. This also removes a race where all
endpoints have not completed their enumeration and one of
the endpoints request to suspend the link.

Change-Id: I22ac6e52a4c93d294d2a365da63cc7292e5e36ce
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:12:00 -07:00
Hemant Kumar
3d8ab59065 pic: msm: Clean up msm_pcie_pm_control API
Instead of using global array of msm_pcie_dev use
existing PCIe device pointer in the function. Also
fix the indentation of the debug log strings.

Change-Id: I82eaaf2bfcbd4f588d1970131e0185f51d0f8ea5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:54 -07:00