Commit graph

876,376 commits

Author SHA1 Message Date
qctecmdr
dcf69a5cbc Merge "sched/core: Fix compilation issues when WALT is enabled" 2020-01-10 23:31:15 -08:00
qctecmdr
68ff2ae5b2 Merge "msm: kgsl: Check correct register for clamps on a660" 2020-01-10 22:56:17 -08:00
qctecmdr
e25e97f384 Merge "msm: kgsl: Set DMA Mask for gmu device" 2020-01-10 22:16:09 -08:00
qctecmdr
fd32c2402f Merge "msm: ipa: stop remote IPA channels if tethering is not enabled" 2020-01-10 19:29:13 -08:00
qctecmdr
59a02848ce Merge "PM / QoS: Reorder pm_qos/freq_qos/dev_pm_qos structs" 2020-01-10 18:25:14 -08:00
Michael Adisumarta
50026e05db msm: ipa: stop remote IPA channels if tethering is not enabled
This fix stops the remote IPA MHIP channels from probe if tethering is
not enabled, before unvoting host IPA clocks.

Change-Id: Iae12f13a3297e2ed7898e7c3a5e0b39ab6793e55
Acked-by: Jyothi Jayanthi <jyothij@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2020-01-10 17:56:33 -08:00
qctecmdr
7d2ba430da Merge "PM / QoS: Redefine FREQ_QOS_MAX_DEFAULT_VALUE to S32_MAX" 2020-01-10 17:50:17 -08:00
qctecmdr
ced45cc81c Merge "mm: oom_kill: dump info of all tasks when the FG process is killed" 2020-01-10 17:16:29 -08:00
qctecmdr
00cb79b42f Merge "sched/fair: skip 6% energy check when best_energy_cpu is idle" 2020-01-10 16:41:38 -08:00
qctecmdr
a9257508f0 Merge "clk: qcom: gcc-lahaina: Add PCIe and UFS clock muxes" 2020-01-10 14:15:54 -08:00
qctecmdr
a629a82df8 Merge "dt-bindings: clock: gcc: Add PCIe pipe and UFS symbol clocks" 2020-01-10 13:05:20 -08:00
qctecmdr
8b3e6472a5 Merge "clk: qcom: Fix incorrect mux_get_parent mapping" 2020-01-10 12:25:19 -08:00
qctecmdr
b2d3560047 Merge "clk: qcom: Fix orphaned sleep clocks for Lahaina" 2020-01-10 11:51:21 -08:00
qctecmdr
62b3ebe2ec Merge "defconfig: lahaina-qgki: Enable thermal drivers" 2020-01-10 11:12:21 -08:00
qctecmdr
bd9e19a39a Merge "defconfig: Lahaina: enable external display module" 2020-01-10 10:25:28 -08:00
Satya Durga Srinivasu Prabhala
abe694a346 sched/core: Fix compilation issues when WALT is enabled
When WALT & UCLAMP are enabled, compilation is broken.

Change-Id: Id0b23f1d0fd0131f390c062076bddad5104ddd51
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2020-01-10 10:09:39 -08:00
qctecmdr
0643acf80b Merge "msm: kgsl: Setup CP_CHICKEN_DBG register for a660" 2020-01-10 09:46:37 -08:00
qctecmdr
801710a3fa Merge "msm: kgsl: Add A660 to the gpulist" 2020-01-10 09:07:24 -08:00
Satya Durga Srinivasu Prabhala
3b65363e48 sched/fair: skip 6% energy check when best_energy_cpu is idle
Even though best_energy_cpu is idle and which would consume
same amount of energy as prev cpu, due to 6% check with prev cpu,
we end up choosing prev cpu over best_energy_cpu for the tasks.
This leads to increase in runnables. Choose best_energy_cpu when
it is idle and shallowest c-state over prev cpu in such scenarios
to avoid runnables.

Change-Id: Ib9eee263640bcd43bd80f8f777a8312585991bc5
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2020-01-10 08:15:40 -08:00
qctecmdr
89cb2f1e04 Merge "msm:ipa: stop UL IPA TX channel at the end of the probe" 2020-01-10 01:27:35 -08:00
qctecmdr
f9c09b638f Merge "msm: ipa: tune mhip ring size shrink to 6 elements" 2020-01-10 00:50:28 -08:00
qctecmdr
d93983d18c Merge "msm: ipa: vote for device side through mhi for tethering use cases" 2020-01-10 00:16:33 -08:00
qctecmdr
7ee6423b56 Merge "msm:ipa: mhip ring size optimization" 2020-01-09 23:40:11 -08:00
qctecmdr
35ad67c68d Merge "msm:ipa: continue ODL logging on MHIP post modem SSR" 2020-01-09 23:08:14 -08:00
qctecmdr
e445a70cfa Merge "msm:ipa: uc based flow control for UL tethering offload" 2020-01-09 22:00:04 -08:00
Mike Tipton
71a670d795 clk: qcom: gcc-lahaina: Add PCIe and UFS clock muxes
Add PCIe and UFS clock muxes.

Change-Id: I41af25822cd47a00a3c4dcda6fc2984f4c200eb9
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2020-01-09 17:25:56 -08:00
Mike Tipton
0f6325c35f dt-bindings: clock: gcc: Add PCIe pipe and UFS symbol clocks
Add PCIe pipe and UFS symbol clock bindings for Lahaina.

Change-Id: I19843209b37b2caf17574e459f05f31c406daa79
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2020-01-09 17:25:56 -08:00
Mike Tipton
119da71ac9 clk: qcom: Fix incorrect mux_get_parent mapping
The current mux_get_parent logic attempts to find the parent index by
passing the HW parent to qcom_find_src_index, which compares against the
logical value (parent_map::src) instead of the raw HW value
(parent_map::cfg). This can lead to improperly parented muxes or orphans
since there is no guarantee that the logical values match the HW values.

Add a new helper function (qcom_find_cfg_index), which returns the index
associated with the HW parent value (parent_map::cfg). Call this
function in mux_get_parent instead of qcom_find_src_index to fix the
improper mux parents.

Change-Id: I87efb8a798ab481a86d29a9b830cbc1f889a4e5b
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2020-01-09 17:25:17 -08:00
qctecmdr
f27ee2ff0d Merge "usb: typec: ucsi: fix spelling mistake "connetor" -> "connector"" 2020-01-09 17:14:37 -08:00
qctecmdr
93a183ce66 Merge "usb: typec: ucsi: Actually enable all the interface notifications" 2020-01-09 16:42:39 -08:00
qctecmdr
1345c14964 Merge "msm: ipa : Fix KW array index issue on dbg_buff" 2020-01-09 15:33:59 -08:00
Tatenda Chipeperekwa
72ad7d28b6 defconfig: Lahaina: enable external display module
Enable the external display module, which is a utility
to manage display interface and audio codec interactions
associated with the cable connect/disconnect events of the
display interfaces.

Change-Id: I736e86320f5a29c67cb3ca7a2f23429f07fe9445
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-01-09 15:31:43 -08:00
Michael Adisumarta
a1667e6019 msm: ipa: vote for device side through mhi for tethering use cases
Specify MHI_VOTE_DEVICE flag when calling mhi-driver API:
mhi_device_get_sync to make sure device side PCIE won't
get to power collapse.

Change-Id: Ia254d3bdbc191f80af05224df4b272921aba2d10
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2020-01-09 14:28:11 -08:00
Michael Adisumarta
e1d40758a7 msm: ipa: tune mhip ring size shrink to 6 elements
This change tunes MHIP UL / DL ring sizes to 6 elements for better
memory optimization.

Change-Id: I2e350bfee0c5b6f0aafdf5462be80f06001c6052
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2020-01-09 14:22:35 -08:00
qctecmdr
b53ff71bc0 Merge "crypto: msm: Add QTI crypto drivers" 2020-01-09 14:16:02 -08:00
Ram Chandrasekar
0c0342aa12 defconfig: lahaina-qgki: Enable thermal drivers
Enable thermal sensor drivers and cooling device drivers for lahaina.
These drivers are required to monitor thermal sensors and mitigate
cooling devices to maintain operating temperature.

Change-Id: I6da087a57ce3957992bbf37ee534b9b537ed3998
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2020-01-09 15:03:04 -07:00
Michael Adisumarta
0ebf33cfb2 msm:ipa: mhip ring size optimization
reduce MHIP ring size to 64 elements for memory saving
and tcp transmission queue size reduction.

Change-Id: Ib718d07a5f5078899847527ea26ef23524fbe024
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2020-01-09 14:00:12 -08:00
Michael Adisumarta
58c73c8d55 msm:ipa: uc based flow control for UL tethering offload
This change enables uc UL tethering offload flow control by
setting/resetting end point delay  for tethering clients
such as USB/WiFi.

Change-Id: Ie02c9234fe264f88042b4cf4b7682d9b86d154c2
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2020-01-09 13:55:37 -08:00
Michael Adisumarta
e5f9bb8d59 msm:ipa: stop UL IPA TX channel at the end of the probe
Stop UL MHIP IPA TX channel at end of the probe
if there is no active tethering. This will make sure no Uplink data is
sent when Device side is not prepared to take data.

Change-Id: Id37c0c7eb8270bdf4806265c75780951ae7394c3
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2020-01-09 13:53:13 -08:00
Michael Adisumarta
b5eb1a5688 msm:ipa: continue ODL logging on MHIP post modem SSR
Post modem SSR, check if previously ODL was connected and if yes
connect back ODL from mhip probe.

Change-Id: If0a2cc4a6e9c0a9836ea85fa62677f0c8a6f0e44
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2020-01-09 13:28:37 -08:00
qctecmdr
a347cbb376 Merge "usb: typec: ucsi: Store the notification mask" 2020-01-09 12:37:39 -08:00
qctecmdr
12712c665b Merge "usb: typec: ucsi: Fix the notification bit offsets" 2020-01-09 11:57:13 -08:00
qctecmdr
18ed6679f0 Merge "dt-bindings: clock: add MDSS clock names for Lahaina" 2020-01-09 08:55:51 -08:00
qctecmdr
f878ff116d Merge "coresight: csr: update programming sequence of enabling etr to bam" 2020-01-09 07:14:51 -08:00
qctecmdr
2aa3d32fe7 Merge "coresight: fix tmc flush timeout issue" 2020-01-09 06:44:47 -08:00
qctecmdr
8d7ec1b3ac Merge "coresight: tmc: leverage etr disable/enable when switching mode" 2020-01-09 06:14:58 -08:00
qctecmdr
bbb08a9d27 Merge "coresight: tmc: add usb support to etr" 2020-01-09 05:41:06 -08:00
qctecmdr
34d581cbff Merge "platform: msm: add support for external display module" 2020-01-09 04:09:02 -08:00
qctecmdr
07bf3d2c9e Merge "arm64: defconfig: Enable USB QDSS and USB BAM drivers on Lahaina" 2020-01-09 03:26:49 -08:00
qctecmdr
7ed98cdb71 Merge "iommu: Fixup selftests" 2020-01-09 02:51:55 -08:00