Update QCOM clock debugfs to support the below functionalities.
- Display the register contents of all the clocks which support
this operation.
- Display the frequency to voltage mapping of a clock.
- Display the list of clock frequencies supported by the root
clocks.
- Display the clk_rate_max associated with enabled clocks list.
Also add the clock list_rate_vdd_level operation, which is required
for the "clk_enabled_list" and "trace_clocks" debugfs nodes to print
the current voltage.
Change-Id: I3b4cf83e776750d993d53331142223109bf0862e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Update clock debugfs to support the below functionalities.
- Allow enabling/disabling a clock.
- Allow calling set_rate on a clock.
- Display the list of enabled_clocks along with prepare_count,
enable_count and rate.
- Add a trace_clocks node to dump the current state of all clocks
in the ftrace logs.
Change-Id: Ib67b3a3409c9e7d8adb710bb524f54f543abf712
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
USB cable can be disconnected (function disable) and function
descriptors can be freed while userspace daemon requesting for
descriptors copy to userspace. Avoid stale pointer copy by always
copying only local copy of desctiptors.
Change-Id: I16c01d22058e7148546f1ffbc5017520402eda97
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
using debug prints instead of err prints
Change-Id: Iaf667ca33e47f867dbd118f4d839f2e8e955f557
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
dwc3-msm driver is functionally dependent on the phy-generic,
phy-msm-snps-hs, and phy-msm-ssusb-qmp drivers. Hence, explicitly
add a soft-dependency on it to avoid unnecessary re-probes
when built as a module.
Change-Id: I16d3a3fb72a968b0ae7935df74cff86697a97c32
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
NAT can be run out SRAM, then DDR, then back-and-forth all relative to
the number of connections the NAT can hold.
Change-Id: Id20d7087e4e84fec826c72e29e50cae97f43191d
CRs-Fixed: 2578986
Signed-off-by: Perry Randise <prandise@codeaurora.org>
Add new macros in GSI driver to support 32-bit
architecture.
Change-Id: I7fd9867b19458ac962a87c03dfcf2ea570a4de69
Signed-off-by: Vipin Deep Kaur <vkaur@codeaurora.org>
Debug patch to capture GPI hardware status when a GSI General interrupt
is triggered.
Change-Id: I81a5d3858bd295383cd1079394fb161930d63913
Signed-off-by: Vipin Deep Kaur <vkaur@codeaurora.org>
Add support for HYP call to setup the sharedmem permissions
for the MPSS client.
Change-Id: I3b48ae962865d8d0a0ea6e3fbb8e21278b59c690
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
[riteshh@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Ankit Jain <jankit@codeaurora.org>
Signed-off-by: Richard Patrick <richardp@codeaurora.org>
This is a snapshot of the MSM sharedmem driver as of msm-3.14
commit:
commit <149717c0> ("uio: msm_sharedmem: Add custom mmap") +
sharedmem qmi logic is removed.
The following changes are included:
02d55287 uio: msm_sharedmem: Restrict debugfs write to root.
de961fc7 uio: msm_sharedmem: Return ENOMEM if the shared mem addr
is zero.
b974ce64 uio: msm_sharedmem: Add addtional information to debugfs
c46af547 uio: msm_sharedmem: Add support for dynamic shared memory
allocation
Change-Id: I49902f018bde1d59d41027b7e46268cc17231a3e
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Ankit Jain <jankit@codeaurora.org>
Signed-off-by: Richard Patrick <richardp@codeaurora.org>
This commit adds new UART port to support UART available on Embedded
USB Debugger (EUD).
Change-Id: Ib2bcf15df04875e5d9eb7ce3dc30f1d187236279
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
Absence of traffic is guaranteed when the device sitting behind a devbw
device is suspended. In such cases, it is a waste of power to make non-zero
bandwidth votes or to scale the devbw device. So, provide APIs to
suspend/resume the devbw device as needed.
Change-Id: Id58072aec7a9710eb917f248d9b9bd08d3a1ec6a
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: renamed devbw to icc and made minor styling change]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
Some devfreq devices using this governor might need suspend/resume support.
When suspended, those devices won't need any bandwidth votes and there is
no point in monitoring their bandwidth either.
Therefore, upon suspend, vote for zero bandwidth and stop the HW monitor.
Upon resume, vote for the previous bandwidth and start the HW monitor.
Change-Id: I318449995d714959f0ebfe91961bc23fa8edbd04
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: resolved trival merge conflicts and made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
The BIMC bwmon device supports monitoring read/write traffic from each BIMC
master port. It also has the capability to raise an IRQ when the traffic
count exceeds a programmable threshold. This allows for it to be used with
the bw_hwmon governor to scale the BW requests from each BIMC master.
Change-Id: Ie8a1471226411e23954ed556292186a5a864ddc1
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
This driver registers itself as a devfreq device that allows devfreq
governors to make IB/AB bandwidth votes. This driver allows the governors
to be agnostic of the bandwidth voting APIs, the number of master ports or
slave ports, the actual port numbers, the system topology, the available
frequencies, etc.
Change-Id: If055ddd580afd41f9668b111e6c09a047488b2e0
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[avajid@codeaurora.org: moved to icc framework, renamed to devfreq_icc and made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
The CPUBW HW monitor devfreq governor uses the Krait L2 PM counters to
determine the bandwidth needed by the Krait CPU subsystem. This governor
can be used in conjunction with the CPUBW devfreq device to dynamically
scale the DDR frequency based on the demand/actual usage from the Krait CPU
subsystem. Since this governor uses the Krait L2 PM counters it can
conflict with certain profiling tools.
The Krait L2 performance monitor counters have the capability to count the
no. of read/write transactions going out the master ports. They also have
the capability to raise interrupts when they overflow. This driver uses
those counters to determine the true usage of DDR from the Krait processor
subsystem and then recommends CPU DDR BW votes based on the measured values
and the following tunable parameters.
The driver provides various tunables that allow it to be tuned more in
favor of power or performance:
- io_percent: The percentage of the CPU time that can be spent waiting on
memory I/O. Lower value is better performance and worse power.
- sample_ms: The sampling period in milliseconds. This only affects the
sampling period when DDR use is ramping down or is increasing very slowly
(See tolerance_percent).
- tolerance_percent: The minimum increase in DDR use, compared to previous
sample, that will trigger an IRQ to immediately bump up the bandwidth
vote. It's expressed as a percentage of the previous sampled DDR use.
- decay_rate: The parameter controls the rate at which the history is
forgotten when ramping down. This is expressed as a percentage of history
to be forgotten. So 100% means ignore history, 0% mean never forget the
historical max. The default 90% means forget 90% of history each time.
- guard_band_mbps: This is a margin that's added to the measured BW (and
hence also the Bus BW votes) that's present to account for the time it
takes to ramp up the DDR BW while the CPU continues to use the DDR.
- bw_step: All BW votes are rounded up to multiples of bw_step. The default
value is 200 MB/s that turns out to ~25 or 12.5 MHz based on the SoC. A
smaller value would mean more frequent bus BW changes. A higher value
would mean less frequent BW vote updates, but also means at times an
unnecessarily higher BW vote (due to the rounding up).
Change-Id: I88629a3e545cdca7160af8f8ca616ecc949d9947
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[aparnam@codeaurora.org: Replaced snprintf with scnprintf]
Signed-off-by: Rama Aparna Mallavarapu <aparnam@codeaurora.org>
[avajid@codeaurora.org: updated attr definitions and made minor styling changes]
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
Enable the RPMh clock driver so that consumers can vote
for real RPMh clocks.
Change-Id: I274f9035b93766473a15731814f16da9f80f4070
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Enable FM driver as module in defconfig on Lahaina.
CRs-Fixed: 2578335
Change-Id: Ifdffd9591e5769aa881646eb523eb7f44c08ae75
Signed-off-by: himta ram <hram@codeaurora.org>
Enable compilation of the fastrpc driver on Lahaina, which
provides a communication mechanism that allows clients to
make remote method invocations across processor boundary
to applications, compute and sensors DSP processors.
Change-Id: I2a43104e260b3e129e3447840f3180843c10ce3a
Signed-off-by: Edgar Flores <edgarf@codeaurora.org>
Guard the code against ABI breakage using IS_ENABLED Helper macro.
Guarded code will be compiled when config is set to m or y.
CRs-Fixed: 2579332
Change-Id: Ic1a5ab22c8ced2c7b527bf5086c2c7b14fe24919
Signed-off-by: himta ram <hram@codeaurora.org>
System cache and DSP CVP driver not ready for Lahaina
bring up. Disable them until they are ready.
Change-Id: I70acfe8d53e527f7456084d72d93116a047f919a
Signed-off-by: George Shen <sqiao@codeaurora.org>
