Commit graph

5,032 commits

Author SHA1 Message Date
qctecmdr
f7c2937fcb Merge "dt-bindings: add bindings for gnss_sirf" 2021-05-03 18:42:37 -07:00
Santoshkumar Zalake
066695e2df ARM: dts: qcom: Add qcom in SiRF GNSS driver
Add qcom as vendor for SiRF GNSS Driver

Change-Id: I112cc1bf4177df99f1ae847752f315803bf0a897
2021-05-03 02:56:32 -07:00
Santoshkumar Zalake
c2370dcc07 dt-bindings: add bindings for gnss_sirf
This change updates documentation about vendor info

Change-Id: I10c76d43641146f841bc7b311a708ba6f4d77718
2021-05-01 20:13:03 -07:00
qctecmdr
3b9ed96136 Merge "ARM: dts: qcom: Add HS-I2S device tree support on SA8195" 2021-05-01 15:09:11 -07:00
qctecmdr
f8f7ed72ea Merge "ARM: dts: msm: update interconnect devices for Monaco" 2021-04-30 07:35:58 -07:00
qctecmdr
bdab26fc35 Merge "ARM: dts: msm: Add thermal configuration for sdxlemur" 2021-04-30 04:52:44 -07:00
qctecmdr
ee12d803a5 Merge "bindings: Use list of PCIe RC ports for WLAN device" 2021-04-30 04:52:44 -07:00
qctecmdr
dd016e245d Merge "ARM: dts: msm: Add ADC thermistors for sdxnightjar" 2021-04-30 04:52:43 -07:00
qctecmdr
4806a2e5c8 Merge "ARM: dts: msm: Add video dtsi in scuba target dtsi" 2021-04-30 04:52:43 -07:00
qctecmdr
0bb70cd69b Merge "ARM: dts: msm: Add ION support for Direwolf" 2021-04-30 02:05:30 -07:00
qctecmdr
63a72dae6d Merge "ARM: dts: msm: Enable CPU cooling device for sdxlemur" 2021-04-30 02:05:30 -07:00
qctecmdr
ab97857e49 Merge "ARM: dts: msm: Add LLCC PMU device nodes on Direwolf" 2021-04-29 21:27:40 -07:00
qctecmdr
02397f32db Merge "ARM: dts: qcom: Add wlan node for sa6155" 2021-04-29 21:27:40 -07:00
qctecmdr
a9f79b1d53 Merge "ARM: dts: msm: Update clock frequenices for PCIe 2nd instance" 2021-04-29 21:27:40 -07:00
Ram Chandrasekar
eda0bf7358 ARM: dts: msm: Add thermal configuration for sdxlemur
Add thermal configuration to,
1. enable all the modem QMI based sensors
2. add modem junction temperature rule
3. enable all the modem QMI based mitigation devices
4. add CPU junction temperature rule.

Change-Id: Ieb6cc3feaf81c74f9248aef47a79260af6d656e0
2021-04-29 08:54:46 -07:00
Jayadev K
dd96a652bf ARM: dts: qcom: Add HS-I2S device tree support on SA8195
1. Add device nodes for HS-I2S interface.
2. Correct gpio function in sleep state.

Change-Id: If1c986f64f314c0fb0134dee831236739e4a1d02
2021-04-29 13:07:38 +05:30
Srinu Gorle
bbe4b180db ARM: dts: msm: Add video dtsi in scuba target dtsi
Add video dtsi in scuba main target dtsi.

Change-Id: I671cd3586dcd63b0a2e39c0a771a6177fac93943
2021-04-29 10:28:58 +05:30
Srinu Gorle
19d009985a ARM: dts: msm: Add bus topology in Scuba Venus PIL
Bus topology is required for bus scaling driver
to serve the bandwidth requests from various clients.
Add the same for scuba venus PIL.

Change-Id: Iadce1e9be6d5274d3df8d6ce1443cdac2751175d
2021-04-29 10:28:48 +05:30
Srinu Gorle
508d6cd7d9 ARM: dts: msm: Add scuba video dtsi in target dtsi
Add scuba video dtsi in bengal dtsi to enable the
video device.

Change-Id: I04d7d1f4b1897a88c4d2489f134192b9d306e187
2021-04-29 10:28:06 +05:30
qctecmdr
0ce7d3c8d8 Merge "ARM: dts: msm: Add support for clock controllers for BLAIR" 2021-04-28 17:58:45 -07:00
qctecmdr
168762c6f6 Merge "ARM: dts: msm: Enable LLCC support in IOSS for sdxlemur" 2021-04-28 17:58:45 -07:00
qctecmdr
9557cc5a59 Merge "Revert "ARM: dts: msm: Disable NPU DCVS support on SM8150"" 2021-04-28 17:58:45 -07:00
qctecmdr
0225dbcdc7 Merge "ARM: dts: msm: Add GPUCC clock node and GDSCs for MONACO" 2021-04-28 17:58:44 -07:00
Yue Ma
8269d04dc3 bindings: Use list of PCIe RC ports for WLAN device
CNSS driver will retry PCIe RC ports with the same order from the
list if it fails to enumerate the device attached to the port.
Hence update bindings document for it.

Change-Id: Ibfcd6f72072650118b8abfa27c818a1933080171
2021-04-28 16:42:01 -07:00
Saurabh Sahu
240335dcfa ARM: dts: msm: Add GPUCC clock node and GDSCs for MONACO
GPUCC clock nodes is required for clocks client to request,
so add support for the same. Also add the GDSCs
required by clients for MONACO.

Change-Id: I2eb3f35e48a1f7f44c93df64384cee1af871416a
2021-04-28 21:03:41 +05:30
Vijayavardhan Vennapusa
539d411b01 ARM: dts: msm: Update clock frequenices for PCIe 2nd instance
Clock frequencies for PCIe 2nd instance are not passed correctly due
to which frequency for pcie1_phy_rchng_clk is not set to 100MHz. This
results in link training fail in Gen3 speed. Hence update clock
frequencies passed for PCIe 2nd instance to fix the issue.

Change-Id: I3065ebf725ecd8980057588e7bf93cb8ccedf51a
2021-04-28 11:41:32 +05:30
qctecmdr
65999e2fcc Merge "ARM: dts: msm: Enlarge the minidump cma area" 2021-04-27 22:49:31 -07:00
qctecmdr
398d967fad Merge "bindings: clock: Add debugcc bindings for BLAIR" 2021-04-27 22:49:31 -07:00
qctecmdr
9de30c4813 Merge "ARM: dts: msm: Adding new DT entries for ETH bridging" 2021-04-27 22:49:31 -07:00
qctecmdr
117edc04a9 Merge "ARM: dts: msm: Add eMMC card support for monaco" 2021-04-27 22:49:30 -07:00
qctecmdr
1acb4a6658 Merge "dt-bindings: iio: qcom,spmi-vadc: Add PMIC5 GEN3 ADC bindings" 2021-04-27 22:49:30 -07:00
Jinesh K. Jayakumar
c5adf9cf6f ARM: dts: msm: Enable LLCC support in IOSS for sdxlemur
Enable LLCC support in IOSS v2 for sdxlemur for ethernet link speeds
higher than 5 Gbps.

Change-Id: Ibaa0dcd411d0fbc3324bed6a72c878e04e719b45
2021-04-27 21:55:19 -07:00
Kuichu Ni
0f6ddbc23b ARM: dts: qcom: Add wlan node for sa6155
1. Add wlan converged node to support QCA6574/QCA6595/QCA6696 wlan
devices.
2. Use the "-config" suffix to replace with "-info" because of the
code changes in CNSS2, only reading property settings with "-config"
suffix for vregs.

Change-Id: Ib743b30f826f6dd5092db42aa0a9857e838880c4
2021-04-28 11:47:16 +08:00
qctecmdr
76b18bfb4d Merge "ARM: dts: msm: Add MX property for PCIe on sdxlemur" 2021-04-27 20:12:56 -07:00
Jishnu Prakash
a2a1df4273 dt-bindings: iio: qcom,spmi-vadc: Add PMIC5 GEN3 ADC bindings
PMIC5 GEN3 ADC has support for clients to read voltage and
current on supported channels connected to the PMIC.
Clients include reading voltage phone power and on board system
thermistors for thermal management. ADCs on certain PMICs have
support to read battery current.

Change-Id: Ief7cbdf77d227ba2cb4ef7919aa66d9962d98e37
2021-04-27 16:54:18 +05:30
Shreyas K K
d3839a42c0 Revert "ARM: dts: msm: Disable NPU DCVS support on SM8150"
Enable NPU DCVS support.
This reverts commit d641513439.

Change-Id: I6f5cecf8aa05ba5582da3a5cbadc0d5e5c98b477
2021-04-27 15:07:52 +05:30
Shreyas K K
5abf11a6c4 Revert "ARM: dts: msm: Disable NPU DCVS support on SA8195"
Enable NPU DCVS support.
This reverts commit d703024c34.

Change-Id: If193f56329cbec08a00edcc59838ba33dba1eefb
2021-04-27 15:07:44 +05:30
Kuichu Ni
a94fcaa044 ARM: dts: msm: Enlarge the minidump cma area
Enlarge the minidump cma area due to a number of new DTSI nodes
(mainly related to CPU cache minidumps) have been added, which
require more space.

Change-Id: I985d2bc74124e75c65ac98f0c207a76ee868c4b7
2021-04-27 16:57:48 +08:00
Shreyas K K
5ead592ae2 ARM: dts: msm: Add ION support for Direwolf
Add ION support for Direwolf target.

Change-Id: Ifd42df124041771aa84f665c085a45765d7208b6
2021-04-27 11:05:10 +05:30
Shreyas K K
bc230a705e ARM: dts: msm: Add LLCC device nodes for Direwolf
Add device nodes for Last level cache controller for
Direwolf target.

Change-Id: I7b207f8a63a9f466e5e3f1767b130137704fc73d
2021-04-27 10:08:35 +05:30
Shreyas K K
de855e1b6f ARM: dts: msm: Add LLCC PMU device nodes on Direwolf
Add LLCC PMU device nodes to measure the various
performance metrics on Direwolf target.

Change-Id: I8cae3762bd1659ee60343259b578ba0df82d2947
2021-04-27 10:08:24 +05:30
Shreyas K K
82aca3ed1b ARM: dts: msm: Add devfreq support nodes for Direwolf
Add devfreq support device tree noded for Direwolf platform.
This includes the devfreq devices, OPP tables, and devfreq
hardware monitors to support the different bandwidth and
latency requirements.

Change-Id: I30ac477957c2e4bec54f3e39db6a880a09bb6f0b
2021-04-27 10:07:57 +05:30
Madhuri Medasani
0d4a3216af ARM: dts: msm: Add support for clock controllers for BLAIR
Enable GPUCC, DISPCC and DEBUGCC and update RPMCC
to use holi-rpmcc instead of dummy for BLAIR RUMI.

Change-Id: Ia3aa16e4181aa3e2760eb2981af24c6111d27a32
2021-04-27 09:33:52 +05:30
Madhuri Medasani
748eb367f3 bindings: clock: Add debugcc bindings for BLAIR
Add debugcc clock controller bindings to support BLAIR.

Change-Id: Ib8fe2baabf741a6d0d500893a10e137c7344b4d3
2021-04-27 09:24:52 +05:30
Taniya Das
3ccb840aee ARM: dts: msm: Update CPUFREQ-HW nodes for Blair
Enable CPU frequency scaling and debug nodes for BLAIR.

Change-Id: I68cad665c716283298f08bb4501c7dd646dd8758
2021-04-27 09:22:56 +05:30
qctecmdr
071bc55490 Merge "ARM: dts: msm: Add extcon node for sdxlemur-atp" 2021-04-26 18:03:54 -07:00
qctecmdr
59a73db243 Merge "ARM: dts: msm: setting clk is provided by SOC" 2021-04-26 12:17:58 -07:00
qctecmdr
e059549819 Merge "bindings: spmi: spmi-pmic-arb: Add description for "qcom,mid"" 2021-04-26 12:17:58 -07:00
qctecmdr
a2300317d6 Merge "dt-bindings: Add DT bindings for scuba" 2021-04-26 12:17:58 -07:00
qctecmdr
3d9b6877c8 Merge "ARM: dts: msm: Correcting watchdog node in blair-rumi.dtsi" 2021-04-26 08:46:45 -07:00