Commit graph

875,757 commits

Author SHA1 Message Date
qctecmdr
fac6230faf Merge "softirq: defer softirq processing to ksoftirqd if CPU is busy with RT" 2019-12-14 08:07:05 -08:00
qctecmdr
9dd145718b Merge "sched/fair: Add snapshot of load-balancing changes" 2019-12-14 07:12:11 -08:00
qctecmdr
18b2bd0259 Merge "kernel: Add snapshot of changes to support cpu isolation" 2019-12-14 06:22:07 -08:00
qctecmdr
a00df95151 Merge "ANDROID: sched, cpuidle: Track cpuidle state index in the scheduler" 2019-12-14 05:47:02 -08:00
qctecmdr
2f2d872989 Merge "power: em: correct increasing freq/power ratio" 2019-12-14 05:09:38 -08:00
qctecmdr
f5f00f4ff2 Merge "scripts: Makefile: Remove flags which are not support by EXT_DTC" 2019-12-14 04:32:38 -08:00
qctecmdr
916dbcdb30 Merge "iommu: arm-smmu: clear TBU halt request when halt times out" 2019-12-14 04:32:38 -08:00
qctecmdr
5cde937fee Merge "cpufreq: qcom-hw: use no_log when reading cpu counter val" 2019-12-14 03:51:35 -08:00
qctecmdr
341f70c77d Merge "scripts: Makefile: Add multi overlay dtbo-base apply verify" 2019-12-14 03:51:34 -08:00
qctecmdr
da38478d65 Merge "cpufreq: qcom-hw: Register child devices" 2019-12-14 03:12:39 -08:00
qctecmdr
3e78982665 Merge "cpufreq: qcom-hw: Set dvfs_possible_from_any_cpu cpufreq driver flag" 2019-12-14 02:36:33 -08:00
Elliot Berman
78a7a11b53 arm64: defconfig: Remove IKHEADERS option
The generation of kheader.tar.xz file uses xargs in ways that seems to
be unaccepatble by certain build environments, thus leading to build
failures. Disable the CONFIG to avoid the situation.

Change-Id: Ib7a2ca0c449f22021e80ac1382a9e5bdf6b388ba
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-12-12 13:14:59 -08:00
qctecmdr
2cfd894384 Merge "leds: Add snapshot of QTI Tri-LED driver" 2019-12-11 10:26:41 -08:00
qctecmdr
e0070c9612 Merge "trace/sched: set priority to 150 for deadline tasks" 2019-12-11 10:26:41 -08:00
qctecmdr
763ee50313 Merge "coresight: funnel: add support for duplicating funnel devices" 2019-12-11 09:35:51 -08:00
qctecmdr
9b8098d6c3 Merge "wil6210: added sysfs file for FTM calibration" 2019-12-11 09:35:51 -08:00
qctecmdr
39c96c3723 Merge "firmware: qcom_scm: Export invoke callback response API" 2019-12-11 09:35:51 -08:00
qctecmdr
1cc4527d89 Merge "msm: kgsl: Remove legacy support for clock_set_flags" 2019-12-11 07:56:18 -08:00
qctecmdr
43e27702c9 Merge "coresight: Add snapshot of remote qdss driver" 2019-12-11 05:20:25 -08:00
qctecmdr
72cb2da423 Merge "coresight: Add snapshot of remote etm driver" 2019-12-11 05:20:25 -08:00
qctecmdr
967351300a Merge "arm64: defconfig: Enable EPSS L3 Interconnect driver for Lahaina" 2019-12-11 02:29:32 -08:00
qctecmdr
39c75aab87 Merge "arm64: defconfig: Enable QCOM clock debug features" 2019-12-11 02:29:32 -08:00
qctecmdr
49a82ebc71 Merge "soc: qcom: add secure processor communication (spcom) driver" 2019-12-11 02:29:31 -08:00
qctecmdr
cb426950b7 Merge "msm: kgsl: Add an option to always enable I/O coherency" 2019-12-10 22:16:00 -08:00
qctecmdr
909b1fdcfd Merge "interconnect: qcom: Prevent duplicate BCMs being added to commit list" 2019-12-10 20:53:15 -08:00
qctecmdr
5202070c22 Merge "msm: kgsl: Use bulk clock functions for GMU" 2019-12-10 20:15:31 -08:00
David Dai
614bbc4d3b cpufreq: qcom-hw: use no_log when reading cpu counter val
Use the no_log version of readl_relaxed when reading out the
counter values for CPUs to reduce the amount of logging in
RTB Logs. Scheduler activity is very frequent and clogs up the
buffer, which can potentially reduce the amount of useful logs.

Change-Id: Ib5c7595c8bae1822837c3b1f1ae56fdc3c612933
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-11 09:14:06 +05:30
Ram Chandrasekar
74e7ed3831 cpufreq: qcom-hw: Register child devices
Register child devices once a successful probe is done. This
will enable the dependent child devices to be probed immediately after
the cpufreq probe is done.

Change-Id: I9108636e1e6ad03bb6f5add9da9ba5507248c129
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2019-12-11 09:14:05 +05:30
Ram Chandrasekar
6297328964 cpufreq: qcom-hw: Add ready callback to register CPU cooling device
Add a ready callback, which will be called when a CPU policy is ready.
As a part of this callback, register the corresponding CPU cooling
device.

Change-Id: Ic12e0a8f7cd13fda583844454e3a0eb600a2cad3
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2019-12-11 09:14:05 +05:30
David Dai
7663559af5 cpufreq: qcom-hw: add cycle counter support
The scheduler needs a way to track cpu cycle counts,
return the total cycle count by adding the difference between
the current cycle count and the previous from reading the EPSS
cycle counters.

Change-Id: Ifacdb0fe8fb9c692322d3ef7fcd25c6c5d5cd4f3
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-11 09:14:04 +05:30
David Dai
6523e1a94c cpufreq: qcom-hw: remove check for hw enable during probe
Given that there are no issues selecting a desired_state before
EPSS is enabled for a particular cluster, let's skip the check
for enable bit on clusters to give better flexibility to the
cpufreq driver to probe successfully on configuration where
not all clusters are enabled.

Change-Id: I3548c5390f899e5a1108d00c00e24837726c9543
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-11 09:14:04 +05:30
Pavankumar Kondeti
0aa9086a40 cpufreq: qcom-hw: Set dvfs_possible_from_any_cpu cpufreq driver flag
As remote cpufreq updates are supported on MSM platforms, set
dvfs_possible_from_any_cpu cpufreq driver flag.

Change-Id: I0ae9f130ad37654967ce754390152a9dbd0ec80b
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:03 +05:30
Pavankumar Kondeti
12a9b84eee cpufreq: qcom-hw: Notify the current frequency to the topology driver
The topology driver keeps track of the current capacity of a CPU and
make it available via arch_scale_freq_capacity(). The PELT load
tracking in the scheduler and energy-aware task placement are the
clients of this API. Hence notify the new frequency to the topology
driver during frequency transition.

Change-Id: Ia0890956f59082496e7d5d7ba8a9c09b343e44ec
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
[satyap@codeaurora.org: resolve trivial merge conflict]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-11 09:14:03 +05:30
Satya Durga Srinivasu Prabhala
45f308f0cf cpufreq: qcom-hw: register with Energy Model framework
To be able to use Energy Model based on values supplied in DT
for "dynamic-power-coefficient" property, need to register with
Energy Model framework. This is to make placement decisions
based on Energy Model by Energy Aware Scheduler (EAS).

Change-Id: Iecc5c12bec2bf5e50d405cf43b501537274249df
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:02 +05:30
Taniya Das
91dbad4a60 cpufreq: qcom: Read voltage LUT and populate OPP
Add support to read the voltage look up table and populate OPP for all
corresponding CPUs.

Change-Id: I8b4cb9199db3aa202b9855237943f04675ec3e33
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:02 +05:30
David Dai
e05fb5b5a4 cpufreq: qcom-hw: use pre-defined core count for max cores
In order to support core boost where core counts is different than
the number of cores in the same frequency domain, use a predefined
value to determine max core count.

Change-Id: I076940b9b77f75ef1e5419bc3175635fb02a7549
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:01 +05:30
Taniya Das
ed7c3ccb4a cpufreq: qcom: Add snapshot of cpufreq-hw
This is snapshot of the cpufreq-hw as of msm-4.19
'commit b75185bdb985 ("cpufreq: qcom-hw:
Add support for QCOM cpufreq HW driver")'.

Change-Id: Ibd5bcf763513ba959e67eb736e707f30d30a41b0
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:12:27 +05:30
qctecmdr
1680897398 Merge "msm: kgsl: Bring in the GPU bandwidth governor" 2019-12-10 19:32:58 -08:00
qctecmdr
e64d784137 Merge "usb: dwc3: Issue core soft reset upon controller halt failure" 2019-12-10 18:39:03 -08:00
qctecmdr
2e8b7b69e6 Merge "arm64: defconfig: Enable devfreq drivers on Lahaina" 2019-12-10 18:39:03 -08:00
qctecmdr
d040484f53 Merge "sched: turn off the TTWU_QUEUE feature" 2019-12-10 17:17:59 -08:00
qctecmdr
a7abbe4fa3 Merge "hrtimer: make sure PINNED flag is cleared after removing hrtimer" 2019-12-10 16:06:57 -08:00
David Dai
ee11e2f2cb arm64: defconfig: Enable EPSS L3 Interconnect driver for Lahaina
Enable interconnect L3 driver so that consumer can vote
for L3 performance points.

Change-Id: I1ec2064db2c06a3e9c9b04de865c9b78dc3db9c6
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-10 16:02:54 -08:00
qctecmdr
e7dbaac319 Merge "arm64: defconfig: Enable spss_utils driver on Lahaina" 2019-12-10 15:15:00 -08:00
qctecmdr
371b1889be Merge "interconnect: qcom: Add EPSS L3 support for Lahaina" 2019-12-10 15:15:00 -08:00
Mike Tipton
f521455b14 arm64: defconfig: Enable QCOM clock debug features
Enable QCOM-specific clock framework debug features.

Change-Id: I8e1e57fe486ac23b6710624b658f1cd5705d410c
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2019-12-10 14:39:16 -08:00
qctecmdr
d3a7485671 Merge "msm: kgsl: Re-export the UAPI header" 2019-12-10 14:21:24 -08:00
Siddharth Gupta
5efbab93ed firmware: qcom_scm: Export invoke callback response API
Adding qcom_scm_invoke callback_response as an exported symbol.

Change-Id: I2cb0f91649c4580952f888925eb2b1ca8db5b849
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
2019-12-10 13:14:37 -08:00
Siddharth Gupta
b4f766a33e firmware: qcom_scm: Move qseecom specific workarounds
Move qseecom specific workarounds to the main file. This allows
access to the scm device struct.

Change-Id: I08bb227e88a7ba21bce0d3e7911819b07815c83f
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
2019-12-10 13:14:19 -08:00
Pavankumar Kondeti
db6940d546 softirq: defer softirq processing to ksoftirqd if CPU is busy with RT
Defer the softirq processing to ksoftirqd if a RT task is running
or queued on the current CPU. This complements the RT task placement
algorithm which tries to find a CPU that is not currently busy with
softirqs.

Currently NET_TX, NET_RX, BLOCK and TASKLET softirqs are only deferred
as they can potentially run for long time.

Change-Id: Id7665244af6bbd5a96d9e591cf26154e9eaa860c
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
[satyap@codeaurora.org: trivial merge conflict resolution.]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-10 12:46:07 -08:00