Commit graph

877,558 commits

Author SHA1 Message Date
qctecmdr
65411a1bfd Merge "usb: dwc3-msm: Fix out-of-bounds access in bus voting" 2020-01-31 16:56:06 -08:00
Subbaraman Narayanamurthy
70cde8b03f defconfig: lahaina: enable QTI battery debug driver
QTI battery debug driver helps to get logs and debug information
by communicating with charger firmware (CHGFW) running on the
remote subsystem (e.g. DSP) over PMIC Glink. Currently, it
supports getting the device context dump of battery gauging
software which is part of CHGFW.

Change-Id: Ib192ec957ea8e85f6074d5cd80c5f5e0163eb94f
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2020-01-31 16:46:59 -08:00
Subbaraman Narayanamurthy
ed0468b887 soc: qcom: add initial version of qti_battery_debug driver
QTI battery debug driver helps to get logs and debug information
by communicating with charger firmware (CHGFW) running on the
remote subsystem (e.g. DSP) over PMIC Glink. Currently, it
supports getting the device context dump of battery gauging
software which is part of CHGFW.

Change-Id: I7bb303cf61a97f3087f8c024fc6b37e68e5d1f1e
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2020-01-31 16:46:59 -08:00
Rishabh Bhatnagar
7099af6487 kernel_headers: Add missing kernel headers to lahaina
Add missing headers to gen_headers_*.bp files for lahaina.

Change-Id: Ifea80a88f418f99be0ea44f59b4a9d77cc80d7be
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2020-01-31 15:49:58 -08:00
Zhen Kong
e9465e8db0 defconfig: enable QSEECOM as a GKI module
enable QSEECOM as a GKI module.

Change-Id: Ib9585928fe4ae223158e3f1eba5959f70963013d
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
2020-01-31 14:29:56 -08:00
Zhen Kong
e0a2c2d4d5 qseecom: use of_reserved_mem_lookup to get heap base and size
As cma_get_base and cma_get_size are not intended to be used by
leaf drivers on GKI enabled build, use of_reserved_mem_lookup to
get heap base and size.

Change-Id: I91194187c89ff8c7f7d445833afce1a4716f0ea4
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
2020-01-31 14:29:38 -08:00
Liam Mark
1babe09d54 iommu/arm-smmu: Use an atomic context when fastmap is set on GKI
By default fastmap uses an atomic context.
On GKI builds fastmap is not supported, but we need to ensure that when
a client requests that fastmap be enabled on a GKI build that they still
use an atomic context.

Change-Id: I145e4679e973b10f666a0bef6ba104223fa5e7a9
Signed-off-by: Liam Mark <lmark@codeaurora.org>
2020-01-31 14:21:05 -08:00
Tony Truong
a91dfbac8e msm: pcie: remove PCI_MSM_MSI dependencies
PCI_MSM_MSI is no longer its own config option. It is bounded
with PCI_MSM so remove any dependencies for it.

Change-Id: Ic417b5e063c268f1bda73e28ffe790c4da4698e8
Signed-off-by: Tony Truong <truong@codeaurora.org>
2020-01-31 14:06:40 -08:00
Tony Truong
ef3efce54d msm: pcie: add support to control pipe clk mux for LPM
PCIe driver needs to toggle between bi_tcxo and phy pipe
clock as part of its LPM sequence. This is done by setting
pipe_clk/ref_clk_src as parent of pipe_clk_src.

Change-Id: Ie634e6024fef3e5736793fc53d281be2d52bcbf7
Signed-off-by: Tony Truong <truong@codeaurora.org>
2020-01-31 14:06:40 -08:00
Tony Truong
1b9adac1ff msm: pcie: add support for gcc_aggre_noc_pcie_*_axi_clk
PCIe root complex driver needs to support enable/disable
gcc_aggre_noc_pcie*_axi_clk.

Change-Id: I044d5081692d50ae82d5ab29c4913359719e5031
Signed-off-by: Tony Truong <truong@codeaurora.org>
2020-01-31 14:06:40 -08:00
Jordan Crouse
65b841c39b qseeecom: Fix possible unused function
When building as a module, the __setup() macro is undefined and the
compiler will warn about the now unused setup function. Mark it as
__maybe_unused to avoid the compiler warning.

Change-Id: Ic0dedbad341aae7d83169517d94af3b0ea038ac9
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
2020-01-31 12:11:49 -08:00
Vivek Aknurwar
37654ab400 clk: qcom: gpucc: Enable cx_gmu, hub_cx_int_clk always
Enable gpu_cc_cx_gmu_clk, gpu_cc_hub_cx_int_clk always.
SMMU hw voting did not tie these 2 clocks, SW needs
to explicitly enable/disable these clks. Since these two
clocks are needed in mulitple system images and are not
votable, to avoid complications always keeping them on
in HLOS. These clks will automatically turn on/off
along with the CX_GDSC so no power hit.

Change-Id: Id98cfadca69586e9c95160adb8031f50a43518a2
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2020-01-31 10:55:06 -08:00
qctecmdr
e2cda63632 Merge "msm: kgsl: Move secvid programming to gpudev" 2020-01-31 10:27:18 -08:00
qctecmdr
e791172b7e Merge "arm64: defconfig: Enable QRTR MHI on lahaina_debug" 2020-01-31 10:27:18 -08:00
qctecmdr
f542d726be Merge "scsi: ufs: Make crypto updates on QTI ufs" 2020-01-31 10:27:17 -08:00
qctecmdr
d806fa1378 Merge "tracing: rework sched_preempt_disable trace point implementation" 2020-01-31 10:27:17 -08:00
Thinh Nguyen
07731aa5e8 usb: gadget: configfs: Add max_speed setting
Some functions support speeds other than SuperSpeed. Add max_speed
attribute to configfs gadget allowing user to specify the maximum speed
the composite driver supports. The valid input speed names are
super-speed-plus, super-speed, high-speed, full-speed, and low-speed.

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Change-Id: I88aa2bee62da8af902954015437eaf9e7a158b27
Git-commit: a02497033e8e04c30501abb78c92d862982b9912
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[jackp@codeaurora.org: sprintf -> scnprintf to placate Cocci]
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2020-01-31 10:11:07 -08:00
Qingqing Zhou
ea0712d632 iommu-debug: allocate test_virt_addr when reading it
Change to allocate test_virt_addr of size 1 MB when reading
test_virt_addr for the first time. This will ensure allocation
to be made when tests are exercised and this doesn't add in
static boot time allocation.

Change-Id: If8babd47f52d954fb62b7c44f51268ee9bb6b0c0
Signed-off-by: Qingqing Zhou <qqzhou@codeaurora.org>
[isaacm@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-01-31 09:39:19 -08:00
Isaac J. Manjarres
d51f9057f8 iommu: iommu-debug: Fix return code for iommu_debug_dma_unmap_write
iommu_debug_dma_unmap_write() returns 0 instead of an error code
when the command passed to the dma_unmap debugfs node is not
in the expected format.

Change-Id: Ie4f5dfa4423edc539fec9c38554e97c79fccc6c3
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-01-31 09:07:03 -08:00
qctecmdr
0326bf0e0f Merge "msm: kgsl: Move APRIV config to a6xx start" 2020-01-31 04:38:34 -08:00
Satish Kodishala
a772144a04 Add support BT/FM CHK 3.2 chip
Added support for BT/FM CHK 3.2 chip. Also,
cleaned up unused chip ids.

CRs-Fixed: 2609077
Change-Id: I8a99113250bbe28fe2f10b17b90b5f00e40f852b
Signed-off-by: Satish Kodishala <skodisha@codeaurora.org>
2020-01-31 01:39:41 -08:00
qctecmdr
be8d5fe010 Merge "cpuidle: lpm-levels: update lpm_disallowed() with sched hints" 2020-01-30 23:05:04 -08:00
qctecmdr
44eb78d31e Merge "msm: cvp: Support releasing persistent buffer" 2020-01-30 23:05:03 -08:00
qctecmdr
88353cd04a Merge "arm64: defconfig: Enable MSM PCIe and MHI Host driver for lahaina" 2020-01-30 23:05:03 -08:00
qctecmdr
b74745b4f0 Merge "dwc3-msm: Add dwc3_msm_release_ss_lane() API" 2020-01-30 23:05:03 -08:00
Mayank Rana
4abb83b709 f_fs: Return correct USB endpoint descriptor to user space daemon
Some of user space daemon like ADB queries endpoint descriptor using
ioctl to know wMaxPacketSize value. Based on wMaxPacketSize value it
queues additional buffer to read zero length packet if expected read
buffer size is multiple of wMaxPacketSize. Currently driver is missing
handling for super speed plus case which results into sending full
speed related USB endpoint descriptor (i.e. wMaxPacketSize 64 bytes).
Hence when adbd is expecting 64 bytes packet from host, it queues one
more additional buffer. This results into mismatch of ADB command and
response when multiple ADB commands are used and causing different ADB
related stability issues. Fix this issue adding super speed plus check
with FUNCTIONFS_ENDPOINT_DESC ioctl command.

Change-Id: I9416295c07c2d98f9d32df43d7e506f975da15a2
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-01-30 18:15:37 -08:00
Mayank Rana
e501d1acc0 usb: gadget: Update functions for SSP descriptors
This change updates USB function drivers to assign SSP descriptors
using usb_assign_descriptors() API. USB SSP descriptors are needed
to enumerate these functions as different composite device in
super speed plus mode.

Change-Id: Iea4d623afb2bf572358d1cc1d0673f20f2d7d5aa
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-01-30 18:15:37 -08:00
David Collins
acbb167a16 defconfig: lahaina: remove disablement of SPMI temp alarm driver
CONFIG_QCOM_SPMI_TEMP_ALARM is incorrectly disabled in
lahaina_QGKI.config and lahaina_debug.config.  Remove this
disablement so that the SPMI temp alarm driver is compiled
in both GKI and QGKI builds.

Change-Id: I2f54dae62dabe50758974c70f39f713141d16d8f
Signed-off-by: David Collins <collinsd@codeaurora.org>
2020-01-30 16:38:46 -08:00
qctecmdr
23d132223b Merge "defconfig: lahaina-gki: enable various USB CONFIGFS functions" 2020-01-30 16:12:58 -08:00
qctecmdr
fb6e032b48 Merge "smp: Wake up all idle CPUs when suspending to idle" 2020-01-30 16:12:58 -08:00
qctecmdr
871c6683e3 Merge "msm: gsi: Fix the WARNING for gsi_write_channel_scratch" 2020-01-30 16:12:58 -08:00
Vivek Aknurwar
d16c7f6f83 clk: qcom: gpucc: Add support for HLOS1_VOTE_GPU_SMMU_CLK
Add clock GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK for clients to be able to
request for the clock.

Change-Id: I5325608b392ce3d0cf8390d7a893322e0f051a71
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2020-01-30 15:47:10 -08:00
Vivek Aknurwar
a267c2a3de dt-bindings: clock: Add support for HLOS1_VOTE_SMMU_CLK
The SMMU consumer requires to enable/disable the
GPU_CC_HLOS1_VOTE_SMMU_CLK, add support for same.

Change-Id: I1ef969bba510ea5354c213c99390a3754f0a0766
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2020-01-30 15:47:09 -08:00
Satya Durga Srinivasu Prabhala
61d1f2eb9b hrtimer: fix issue during core isolation
During core isolation, while migrating hrtimers to one of online CPUs,
below issue is being observed due to commit 5da7016046
("hrtimer: Implement support for softirq based hrtimers") which started
to enable local irqs. Fix it by moving local_bh_disable/enable calls to
hotplug path only.

[   73.488582] WARNING: CPU: 0 PID: 7 at kernel/softirq.c:106 \
					__local_bh_disable_ip+0xc4/0xd0
[   73.506182] WARNING: CPU: 0 PID: 7 at kernel/softirq.c:160 \
					__local_bh_enable_ip+0xd0/0x140
[   73.523834] kernel BUG at kernel/irq_work.c:138!
[   73.531979] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
[   73.567732] pstate: 60400005 (nZCv daif +PAN -UAO)
[   73.572663] pc : irq_work_run+0x160/0x170
[   73.576795] lr : flush_smp_call_function_queue+0x178/0x1b0
[   73.674966] Call trace:
[   73.677494]  irq_work_run+0x160/0x170
[   73.681271]  flush_smp_call_function_queue+0x178/0x1b0
[   73.686558]  generic_smp_call_function_single_interrupt+0x14/0x20
[   73.692832]  handle_IPI+0x188/0x2f8
[   73.696426]  gic_handle_irq+0x110/0x1d8
[   73.700374]  el1_irq+0xb4/0x130

Change-Id: I969171022377dc793834c4c4343e5f839f224dbe
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2020-01-30 12:48:18 -08:00
Siddharth Gupta
fc242a93cc kernel headers: Update comparison logic
Update comparison logic used to figure out the headers
that need to be added or removed from the corresponding
blueprint file.

Change-Id: I1f8eeea9750074d57868593a9693c016644e3682
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
2020-01-30 12:11:20 -08:00
Gaurav Kashyap
0bde03e734 scsi: ufs: Make crypto updates on QTI ufs
Make v6 updates on ufshcd-qti.c to match the updates
in ufshcd.c. Also compile UFS crypto when using
ufshcd-qti.

Change-Id: I1799b9b7f0aeee2cb76599403ae8461457a3fcd2
Signed-off-by: Gaurav Kashyap <gaurkash@codeaurora.org>
2020-01-30 11:05:32 -08:00
qctecmdr
addcafbc89 Merge "defconfig: enable schedutil governor on Lahaina" 2020-01-29 20:50:45 -08:00
qctecmdr
5898582bda Merge "net: qrtr: Introduce MHI transport for qrtr" 2020-01-29 20:50:45 -08:00
qctecmdr
e9130c5963 Merge "regulator: rpmh-regulator: support parent supply specification in subnodes" 2020-01-29 20:50:45 -08:00
qctecmdr
7d0324ab17 Merge "msm: cvp: Use compiler data type in uapi" 2020-01-29 20:50:44 -08:00
Hemant Kumar
1a54523a96 arm64: defconfig: Enable MSM PCIe and MHI Host driver for lahaina
Add configuration changes in lahaina to support MSM PCIe and MHI
HOST driver.

Change-Id: If6fbbaf3f8efb04566dba2a61a6c4f79dd391515
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2020-01-29 18:13:00 -08:00
Tony Truong
86c9bd5df0 msm: pcie: configure PCIe and MSI as modules in Makefile
This allows to compile PCIe MSM driver as one module. As part
of that remove Kconfig option PCI_MSM_MSI.

Change-Id: I225b880a01cfc7b480486d7d7db9fabe86256f52
Signed-off-by: Tony Truong <truong@codeaurora.org>
2020-01-29 18:11:26 -08:00
Isaac J. Manjarres
7039e1975f iommu: io-pgtable-fast: Fix IOMMU configuration usage in self-tests
When the fastmap selftests are running, a half-baked configuration
structure is allocated on the stack for the sole purpose of exercising
the mapping and unmapping paths. This leads to issues, as the
implementation of av8l_clean_range() assumes that the configuration
structure is well-defined (i.e. the device pointer is meaningful,
and can be used for applying cache-maintenance, and is contained in an
iopgtable structure). To avoid this, change av8l_clean_range() so that
it no longer assumes that the configuration structure is contained in an
iopgtable structure, as well as update the coherency settings used for
the selftests, so that cache-maintenance is not performed. It is
pointless to perform cache-mainteance for the tests, as no device
access occurs.

Change-Id: I428b893132e57184eb9f97d656ed2357489bb230
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-01-29 17:16:28 -08:00
Mayank Rana
0ed723e6bb dwc3-msm: Add dwc3_msm_release_ss_lane() API
DP driver needs to use both USB SS lane in some use case. Hence
to release USB SS lane, add dwc3_msm_release_ss_lane() API which
performs below operations:
i. Stop USB host mode
ii. Start USB host mode into high speed mode if USB host mode
was active.

dwc3_msm_release_ss_lane() API is blocking call, and will comeback
once above both operations are performed.

Change-Id: I56df606914a613bfe4b76298b0041a66fc74878d
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-01-29 15:43:43 -08:00
George Shen
6c20003309 msm: cvp: Support releasing persistent buffer
CVP firmware introduced new feature to support releasing user
allocated persistent buffers. Added support in kernel.

Change-Id: Ifcd35c328ebfbb961247bf45e2e72222bd3e425b
Signed-off-by: George Shen <sqiao@codeaurora.org>
2020-01-29 15:33:09 -08:00
qctecmdr
5e7a256761 Merge "clk: qcom: clk-rpmh: Mark rfclka2 as optional for Lahaina" 2020-01-29 15:32:56 -08:00
qctecmdr
41c90d480a Merge "psi: Use deferrable psi_avgs_work" 2020-01-29 15:32:56 -08:00
Harshdeep Dhatt
2951173569 msm: kgsl: Move secvid programming to gpudev
Since eCP will need these register writes as well, instead
of exporting a function set_secvid, move these register writes
to respective target specific functions which are common to
both eCP enabled and disabled configurations. This also helps
get rid of the register offset definitions.

Change-Id: I2faa996901c746e7277dc2fdc272b9eb76e13e9c
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-01-29 14:17:58 -08:00
Harshdeep Dhatt
cfcdc95690 msm: kgsl: Do dispatcher init at first open
With eCP, we will no longer be using the dispatcher. And
we will have different first open functions depending on
whether eCP is enabled or disabled. Hence, move dispatcher
init to first open so that dispatcher is initialized only when
eCP is not enabled.

Change-Id: Ia65807dcfed65a4b810b886f71beb4c5ba30abb1
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-01-29 14:17:56 -08:00
Harshdeep Dhatt
1affb278e4 msm: kgsl: Move APRIV config to a6xx start
We need APRIV enabled for eCP as well. But eCP doesn't
call into a6xx_rb_start. Move it to a more generic function
which is called by eCP as well.

Change-Id: I3014bee48145ab5b7c54f01854fe520d9a6db0a6
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-01-29 14:17:55 -08:00