Commit graph

882,338 commits

Author SHA1 Message Date
qctecmdr
fc8886fcbd Merge "msm: kgsl: Query xo resource addr from cmd-db driver" 2020-04-19 19:17:24 -07:00
qctecmdr
9df510677b Merge "msm: wigig_sensing: use 32 bit transactions for SPI block read" 2020-04-19 19:17:23 -07:00
qctecmdr
a647200494 Merge "arm64: defconfig: Enable touchscreen GKI on Lahaina" 2020-04-19 15:24:20 -07:00
qctecmdr
e49308cf2b Merge "driver: thermal: qmi_cdev: Add support for DSC mitigation" 2020-04-19 15:24:20 -07:00
qctecmdr
8be07e6448 Merge "msm: adsprpc: Add capibility API for HMX" 2020-04-19 15:24:19 -07:00
qctecmdr
8defedb222 Merge "msm: kgsl: Enable Content Protection for A660 GPU" 2020-04-19 15:24:19 -07:00
Gidon Studinski
965ece3b02 msm: wigig_sensing: use 32 bit transactions for SPI block read
32 bit SPI transactions are more efficient. Additionally, the data is
received in the correct endianness, as expected by the host, therefore an
endianness flip can be avoided.

Change-Id: I35c0be291c971d5f07a00e79923c2050914d9642
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
Signed-off-by: Alexei Avshalom Lazar <ailizaro@codeaurora.org>
2020-04-19 16:06:53 +03:00
Alexei Avshalom Lazar
444434b54a msm: wigig_sensing: initial commit of wigig_sensing SPI driver
This driver adds support for sensing use cases over 60GHz frequency band.
Sensing uses 60GHz radio signal to 'sense' the environment, allowing
various use cases such as proximity detection, face recognition, gesture
detection and more.

The driver communicates with the QCA6436 HW using SPI bus. The driver
requires SPI and wil6210 drivers to operate.

Change-Id: Ieaae89de8ef77617a24efafea0f476a3546cf27f
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
Signed-off-by: Alexei Avshalom Lazar <ailizaro@codeaurora.org>
2020-04-19 16:06:47 +03:00
qctecmdr
b4a1dedb26 Merge "service-locator: Start the locator service by default" 2020-04-19 03:16:33 -07:00
qctecmdr
14182749bb Merge "input: qcom-hv-haptics: store closed-loop brake settings into SDAM" 2020-04-19 03:16:33 -07:00
qctecmdr
8342759058 Merge "mhi: core: Add support to create uncached event ring" 2020-04-19 03:16:32 -07:00
qctecmdr
c5fe85f34b Merge "clk: qcom: gcc-shima: Add support for GCC clock driver" 2020-04-19 03:16:32 -07:00
qctecmdr
e8e648a045 Merge "mhi: cntrl: qcom: allow printing large strings to IPC logs" 2020-04-19 03:16:31 -07:00
qctecmdr
e8f60e2d99 Merge "mhi: cntrl: qcom: use RC driver APIs to toggle low power modes" 2020-04-19 03:16:31 -07:00
qctecmdr
f0d921fde0 Merge "mhi: core: remove unused timesync device" 2020-04-19 03:16:31 -07:00
Bhaumik Bhatt
f1e1c6b274 mhi: cntrl: qcom: use RC driver APIs to toggle low power modes
PCIe root complex driver has exposed set of APIs to allow or
prevent link level low power modes. Use those instead of
touching device side registers to toggle the same.

Change-Id: Idf4f6d60a80742524249dacd7a10fe5184acec95
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2020-04-17 23:02:08 -07:00
Bhaumik Bhatt
9986735138 mhi: cntrl: qcom: allow printing large strings to IPC logs
Large strings are truncated to 255 bytes by IPC logging API.
Allow for them to be printed in their entirety by using the
string separator API and split it using newline as the
delimiter.

Change-Id: If9ddbad7e9a9c30da57a733c94fb837c120f12ae
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2020-04-17 23:00:48 -07:00
Bhaumik Bhatt
6bc53ff9fa mhi: core: remove unused timesync device
Remove the unused timesync MHI device as we use the controller
device for timesync related activity instead.

Change-Id: If2bb5937cbf468d8778b89549afdb1d0a9af7782
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
2020-04-17 22:51:41 -07:00
qctecmdr
5918bdca37 Merge "dt-bindings: clock: Update clock IDs and BCRs of GCC for SHIMA" 2020-04-17 16:31:23 -07:00
qctecmdr
899d1ad7dd Merge "tcp: Reset tcp connections in SYN-SENT state" 2020-04-17 16:31:23 -07:00
qctecmdr
6c65d27ba1 Merge "arm64: defconfig: Insert Adreno default governor in gki defconfig" 2020-04-17 16:31:23 -07:00
qctecmdr
8121f935fe Merge "pinctrl: qcom: Expose ufs_reset as gpio on shima" 2020-04-17 16:31:22 -07:00
qctecmdr
440b0124f5 Merge "input: qcom-hv-haptics: update FIFO samples in IRQ thread" 2020-04-17 16:10:09 -07:00
qctecmdr
f417c81eb1 Merge "mhi: core: do not toggle PCIe low power mode in sleeping context" 2020-04-17 16:10:09 -07:00
qctecmdr
1c8659071c Merge "defconfig: arm64: Enable of_devlink proxy consumer for Lahaina" 2020-04-17 16:10:09 -07:00
qctecmdr
c9e50a28fa Merge "msm: kgsl: Add a terminating empty entry to a660_protected_regs array" 2020-04-17 15:54:47 -07:00
qctecmdr
32ef04353a Merge "msm: kgsl: Modify CP_LPAC_PROG_FIFO_SIZE register value for A660" 2020-04-17 15:54:46 -07:00
qctecmdr
13ffc50455 Merge "power: qti_battery_charger: Block PMIC GLINK Tx for debug battery" 2020-04-17 15:54:46 -07:00
qctecmdr
21045cf753 Merge "soc: qcom: Add support for proxy consumers on of_devlink" 2020-04-17 15:54:45 -07:00
qctecmdr
2062bd224e Merge "msm: cvp: fixed cache operation func param issue" 2020-04-17 15:54:45 -07:00
qctecmdr
5bcf7e3ec6 Merge "usb: gadget: composite: Support more than 500mA MaxPower" 2020-04-17 15:38:17 -07:00
Raghavendra Rao Ananta
91c84d3017 service-locator: Start the locator service by default
There's no reason why the locator service should start in
a 'disabled' manner. Hence, unless otherwise stated by the
cmdline arguments, start the service by default.

Change-Id: I8377aabed691c402c47352aadfdd4ded25f1f459
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-04-17 15:07:12 -07:00
Jagadeesh Kona
b7d2a71622 clk: qcom: gcc-shima: Add support for GCC clock driver
Add support for global clock controller for peripheral clock
clients to be able to request for the clocks.

Change-Id: I528821a299fee139d23947bc8caa5674ddef9687
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-04-17 04:35:07 -07:00
Devi Sandeep Endluri V V
01dbe6a77b tcp: Reset tcp connections in SYN-SENT state
Userspace sends tcp connection (sock) destroy on network permission
change. Kernel though doesn't send reset for the connections in
SYN-SENT state and these connections continue to remain. Even as
per RFC 793, there is no hard rule to not send RST on ABORT in
this state. Modify tcp_abort and tcp_disconnect behavior to send
RST for connections in syn-sent state to avoid lingering
connections on network switch.

CRs-Fixed: 2396964
Change-Id: If931fb979e519c474697d82d8c9dbaf0edb626e3
Signed-off-by: Devi Sandeep Endluri V V <dendluri@codeaurora.org>
2020-04-17 03:18:19 -07:00
Chandra Sai Chidipudi
624d012216 arm64: defconfig: Insert Adreno default governor in gki defconfig
CONFIG_QCOM_ADRENO_DEFAULT_GOVERNOR is getting inserted into qgki
defconfig by default on doing a make menuconfig. Clean it by
inserting into gki defconfig.

Change-Id: Ie479abfaad1352c3026a7fc027cfb9b59501f65d
Signed-off-by: Chandra Sai Chidipudi <cchidipu@codeaurora.org>
2020-04-17 01:33:32 -07:00
Fei Mao
87b6dfa00f arm64: defconfig: Enable touchscreen GKI on Lahaina
Enable touchscreen GKI drivers on Lahaina.

Change-Id: Iabc924a9dfc39b433abe765f0d7f4d46ad440d73
Signed-off-by: Fei Mao <feim1@codeaurora.org>
2020-04-17 00:44:47 -07:00
qctecmdr
ab470e82dd Merge "sched: Improve the scheduler" 2020-04-16 16:49:31 -07:00
qctecmdr
f205d5a440 Merge "cnss2: Enable time sync feature for QCA6490" 2020-04-16 16:49:31 -07:00
qctecmdr
ba398e7818 Merge "interconnect: qcom: lahaina: Use the correct binding for qnm_pcie" 2020-04-16 16:49:30 -07:00
qctecmdr
00e20a4709 Merge "netfilter: Include alarm type timer in idletimer" 2020-04-16 16:49:30 -07:00
qctecmdr
04c75d5d9f Merge "defconfig: holi: Enable holi pinctrl" 2020-04-16 16:49:29 -07:00
qctecmdr
0f383d5ad2 Merge "cnss2: Remove improper runtime PM enablement checks" 2020-04-16 16:49:29 -07:00
Anirudh Raghavendra
01566543bb msm: adsprpc: Add capibility API for HMX
A new capability API is added for HMX to support both
spatial and depth parameters.

Change-Id: I845073b4271a0c2ad619d3e80d182071b22e6e5a
Signed-off-by: Anirudh Raghavendra <araghave@codeaurora.org>
2020-04-16 16:31:31 -07:00
Nitheesh Muthuraj
6d434abcce msm: kgsl: Enable Content Protection for A660 GPU
Enable Content Protection feature for A660 GPU. This feature allows
the user to create secure memory and to put the GPU into secure mode.

Change-Id: I3aa0756898446a0876f74654444a9c318307a549
Signed-off-by: Nitheesh Muthuraj <nmuthuraj@codeaurora.org>
2020-04-16 12:30:33 -07:00
Ram Chandrasekar
40103f7638 driver: thermal: qmi_cdev: Add support for DSC mitigation
Modem supports new DSC based mitigation nodes, which are not timer
based. Add support for these new TMD devices to be registered as cooling
devices in thermal framework.

Change-Id: I4673aa80029804ff4fa8104d4e04651c3d825e48
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2020-04-16 11:58:37 -07:00
qctecmdr
1ddf3853b2 Merge "defconfig: Enable header tests for Lahaina GKI" 2020-04-16 11:22:40 -07:00
qctecmdr
8c3d768ae8 Merge "msm: cvp: Fix NULL pointer error when DEBUG_FS is disabled" 2020-04-16 11:22:40 -07:00
qctecmdr
8e57ec125a Merge "mhi: core: Cache last processed event ring element" 2020-04-16 11:22:39 -07:00
qctecmdr
79cec43dde Merge "mhi: core: Add OOB and DB mode event IPC log and count" 2020-04-16 11:22:39 -07:00
Nitin Rawat
eb68ce5d76 pinctrl: qcom: Expose ufs_reset as gpio on shima
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pin.
Reorder the pins and expose it as gpio 204, so that the UFS driver can
toggle it.

Change-Id: Id35739a32bf05eaf310857fa07d9c7fbdb3abf86
Signed-off-by: Nitin Rawat <nitirawa@codeaurora.org>
2020-04-16 15:22:10 +05:30