A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-11 15:11:48 -04:00
Code Issues Projects Releases Packages Wiki Activity

Merge "ARM: dts: msm: Update DISPCC and debugcc clock nodes for YUPIK"

Browse source
This commit is contained in:
qctecmdr 2021-01-10 22:44:56 -08:00 • committed by Gerrit - the friendly Code Review server
commit 9ed837fb63
2 changed files with 40 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

9
qcom/yupik-rumi.dtsi
View file

@ -189,3 +189,12 @@
clocks = <&bi_tcxo>, <&gcc GCC_GPLL0>;
status = "disabled";
};
&dispcc {
clocks = <&bi_tcxo>, <&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&gcc GCC_DISP_AHB_CLK>;
};
&debugcc {
clocks = <&bi_tcxo>;
};

33
qcom/yupik.dtsi
View file

@ -962,8 +962,13 @@
};
dispcc: clock-controller@af00000 {
compatible = "qcom,dummycc";
clock-output-names = "dispcc_clocks";
compatible = "qcom,yupik-dispcc", "syscon";
reg = <0xaf00000 0x20000>;
reg-names = "cc_base";
vdd_cx-supply = <&VDD_CX_LEVEL>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&gcc GCC_DISP_AHB_CLK>;
clock-names = "bi_tcxo", "gcc_disp_gpll0_clk","cfg_ahb";
#clock-cells = <1>;
#reset-cells = <1>;
};
@ -994,6 +999,30 @@
#reset-cells = <1>;
};
apsscc: syscon@182a0000 {
compatible = "syscon";
reg = <0x182a0000 0x1c>;
};
mccc: syscon@90ba000 {
compatible = "syscon";
reg = <0x90ba000 0x54>;
};
debugcc: debug-clock-controller@0 {
compatible = "qcom,yupik-debugcc";
qcom,gcc = <&gcc>;
qcom,camcc = <&camcc>;
qcom,dispcc = <&dispcc>;
qcom,gpucc = <&gpucc>;
qcom,videocc = <&videocc>;
qcom,apsscc = <&apsscc>;
qcom,mccc = <&mccc>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo_clk_src";
#clock-cells = <1>;
};
cpufreq_hw: qcom,cpufreq-hw {
compatible = "qcom,cpufreq-hw-epss";
reg = <0x18591000 0x1000>, <0x18592000 0x1000>,