Commit graph

2,564 commits

Author SHA1 Message Date
Subbaraman Narayanamurthy
00100a8674 ARM: dts: qcom: add some more channels for pm8350b and smb139x
Add CHG_TEMP, IIN_FB and ICHG_FB channels on PM8350B to read
charger temperature, input current and charging current. Add
SMB_TEMP, IIN_SMB and ICHG_SMB on both SMB139x charge pumps to
read SMB temperature, input current and charging current which
happens over reading virtual channels through PBS.

Change-Id: Id08453083d7a09b15ac15032ebef3d9c8ac367e8
2020-09-14 09:00:55 -07:00
qctecmdr
29c2c0fbe7 Merge "bindings: clock: Add support for flag to stop bimc logging" 2020-09-14 00:22:42 -07:00
qctecmdr
8f15481fe4 Merge "ARM: dts: msm: Add support for BIMC stop logging for HOLI" 2020-09-14 00:22:42 -07:00
qctecmdr
683442c94f Merge "ARM: dts: msm: Add reserved memory for dfps data region on Shima" 2020-09-14 00:22:42 -07:00
qctecmdr
61552f8b76 Merge "ARM: dts: msm: Include display panel for Trusted UI" 2020-09-14 00:22:41 -07:00
qctecmdr
05f3f31819 Merge "dt-bindings: add bindings for RIMPS memlat" 2020-09-14 00:22:41 -07:00
Santosh Mardi
fac9cbdd40 dt-bindings: add bindings for RIMPS memlat
Add initial dt-bindings for RIMPS memlat and logging drivers.

Change-Id: I64a8cf4c77c4eb9c3333ac53ae603ef0ace3f0c8
2020-09-13 21:41:49 -07:00
qctecmdr
5797e93ad7 Merge "ARM: dts: msm: Add transaction timeout config for shima" 2020-09-13 21:34:17 -07:00
qctecmdr
da8bf20010 Merge "ARM: dts: msm: add osm register to minidump for shima" 2020-09-13 21:34:17 -07:00
qctecmdr
992b901e4f Merge "ARM: dts: msm: Add EPSS hardware GT interrupts for SHIMA" 2020-09-13 21:34:17 -07:00
qctecmdr
8ee6d40e2d Merge "ARM: dts: msm: Add llcc dcache dump nodes for shima" 2020-09-13 21:34:16 -07:00
qctecmdr
c7b76fb4ed Merge "ARM: dts: msm: Enable smb1398 on holi MTP and QRD" 2020-09-13 21:34:16 -07:00
qctecmdr
f82e10852f Merge "dt-bindings: Add support for GDSC flag to skip disable" 2020-09-13 21:34:16 -07:00
qctecmdr
2013a524dd Merge "ARM: dts: msm: Enable CNSS PM domain support for Lahaina" 2020-09-13 16:08:29 -07:00
qctecmdr
42a949f2a4 Merge "dt-bindings: Add Dt binding for rimps mailbox" 2020-09-13 07:15:07 -07:00
qctecmdr
be4af8efe3 Merge "ARM: dts: msm: spss_utils: spss shared registers" 2020-09-13 07:15:07 -07:00
qctecmdr
411afea675 Merge "dt-bindings: iio: qcom,spmi-vadc: update prescale ratios" 2020-09-13 07:15:07 -07:00
qctecmdr
7671ab754b Merge "dt-bindings: Add snapshot of qpnp-smblite documentation" 2020-09-13 01:13:30 -07:00
qctecmdr
63f3882bd4 Merge "ARM: dts: qcom: Update ACD control register values for A660v2" 2020-09-13 01:13:30 -07:00
Jishnu Prakash
bb9d9bc7d7 ARM: dts: msm: Enable smb1398 on holi MTP and QRD
Enable smb1398 master and slave charge pump nodes on holi
MTP and QRD.

Change-Id: Ib8bd88613ef69b18b344af5085d2d3269eb9bd38
2020-09-11 18:43:06 -07:00
qctecmdr
55110f1570 Merge "ARM: dts: msm: Correct name of tpdm ACTPM on holi" 2020-09-11 17:31:01 -07:00
qctecmdr
5ddc1a2a9f Merge "ARM: dts: msm: Enable WLED for holi LCD platform" 2020-09-11 17:31:01 -07:00
qctecmdr
f9a3dd5166 Merge "ARM: dts: msm: Use a carveout for memshare memory" 2020-09-11 17:31:01 -07:00
qctecmdr
715c12898d Merge "ARM: dts: msm: Add tzone-names for lahaina GPU" 2020-09-11 17:31:01 -07:00
Mohammed Mirza Mandayappurath Manzoor
0e3f40297c ARM: dts: qcom: Update ACD control register values for A660v2
Update the dvm values for optimizing ACD performance and enable ACD
on lower levels.

Change-Id: I0031f5cbb0e19b132980951b4ff9abeff9204656
2020-09-11 14:35:53 -07:00
qctecmdr
67541e3c04 Merge "ARM: dts: msm: add haptics configuration for shima target" 2020-09-11 08:25:27 -07:00
qctecmdr
38cf9db931 Merge "ARM: dts: msm: Update PCIe1 PHY settings to v1.06 for lahaina" 2020-09-11 08:25:27 -07:00
qctecmdr
697a88b598 Merge "ARM: dts: msm: Update PCIe0 PHY settings to v1.01 for lahaina v2.1" 2020-09-11 08:25:16 -07:00
Tao,Zhang
7bde323c18 ARM: dts: msm: Add llcc dcache dump nodes for shima
Add llcc_1_dcache and llcc_2_dcache dump node to support these two
registers dump.

Change-Id: I7a390633f7b24bbce828104c85e4787019ba9206
2020-09-11 17:59:00 +08:00
Gaurav Kohli
78902b1136 dt-bindings: Add Dt binding for rimps mailbox
Adding rimps mailbox controller Dt binding.

Change-Id: I4b20b50f9a2d600affba29e518eaae28ad8e6275
2020-09-10 23:06:12 -07:00
Yuanfang Zhang
8ac529888a ARM: dts: msm: Correct name of tpdm ACTPM on holi
The coresight TPDM name for ACTPM is spelled wrong as ACPTM, this
change fix this issue.

Change-Id: I0d5d6b3d40ac2b705a98a2b33ac49e7ccefc6bcf
2020-09-11 10:59:26 +08:00
Ram Chandrasekar
9f163a1164 ARM: dts: msm: Add a two second polling for PMIC alarm in lahaina
Add a two second polling for PMIC temperature alarm sensor to ensure the
software is in sync with hardware.

Change-Id: I5d0fc8eba6295b338252833581207d2ab189e33b
2020-09-10 15:48:42 -07:00
Isaac J. Manjarres
c3cdcaddc2 ARM: dts: msm: Use a carveout for memshare memory
The memshare driver currently uses CMA memory for its usecases. This
is problematic, as CMA memory has a normal cached mapping in the kernel,
which allows for speculative access. This makes it possible for a
speculative cache-line fill to occur, prior to the memory being unmapped
from the stage-2 page tables of Linux, as well as XPU protected. The
cache-line can later be evicted, while the memory is still XPU protected.
This results in a write to the system cache, which is blocked by the XPU,
resulting in an XPU violation.

Given the nature of the memshare usecases (i.e. the memory is allocated
once, and never given back to Linux), move the memshare driver to using
a carveout. Using a carveout makes it so that there are no normal cached
mappings in the kernel for the memory, which prevents speculative
cache-line fills from occurring.

Change-Id: I97e2fe144c8fde364ecd40fdd181a881ca93c4b1
2020-09-10 11:24:31 -07:00
Jishnu Prakash
8b39e87824 ARM: dts: msm: Enable WLED for holi LCD platform
Enable WLED in place of AMOLED for holi CDP platform
using LCD.

Change-Id: If005a5d52d82e4c72bfcea2b46550121172d8714
2020-09-10 21:32:10 +05:30
Ritesh Kumar
efc201b44b ARM: dts: msm: Include display panel for Trusted UI
Include display panel for Truested UI on lahaina QRD.

Change-Id: Id3531e9d073bb3ec09f36e5b3107ac56da09b430
2020-09-10 04:52:09 -07:00
Ritesh Kumar
45e58cc22c ARM: dts: msm: Add focaltech node in trustedvm devicetree
Add focaltech node for trusted vm device tree and enable
trusted touch on trusted vm for lahaina qrd. Also, move
fts node to mtp and cdp vm dtsi file.

Change-Id: I2e8f80a2b6c622c02526cbc6a2b2a1f8d632d593
2020-09-10 16:59:13 +05:30
Ritesh Kumar
8b88a78eda ARM: dts: msm: alter size for QUPv3 SE4 on lahaina QRD
Alter size for Serial Engine 4 memory while lending
in trusted touch usecase.

Change-Id: Iadebef94e608f0af73408be85aa8c2a673a2a759
2020-09-10 16:55:27 +05:30
Amir Samuelov
ea4e6c99bd ARM: dts: msm: spss_utils: spss shared registers
provide spss shared registers address to spss_utils.

Change-Id: I7d2727a2936f9dc3770bb4483fa7778e6475f046
2020-09-10 13:54:41 +03:00
Young Kwak
fef117d47d ARM: dts: msm: Add tzone-names for lahaina GPU
Add GPU tzone-names to get the GPU temperature on lahaina.

CRs-Fixed: 2765368
Change-Id: I8acbb6aee4a98f9e1e3b3b18a77cd798dc24ff3a
2020-09-10 19:08:44 +09:00
qctecmdr
0fa7983508 Merge "ARM: dts: msm: Add PM-QOS and clk scaling support for shima" 2020-09-09 18:24:26 -07:00
qctecmdr
17f9099c30 Merge "ARM: dts: msm: updates the shima VM ION same as lahaina" 2020-09-09 18:24:26 -07:00
qctecmdr
5a778b5e8f Merge "ARM: dts: msm: Add PM-QOS and clk scaling support for holi" 2020-09-09 18:24:26 -07:00
qctecmdr
45057148ed Merge "dt-bindings: Add dts entries for haven" 2020-09-09 18:24:26 -07:00
qctecmdr
47ad3fab1c Merge "ARM: dts: msm: reduce S2E regulator minimum voltage for Lahaina" 2020-09-09 18:24:26 -07:00
qctecmdr
3fa1fc0717 Merge "ARM: dts: msm: Update cnss dt node for bus bandwidth for shima" 2020-09-09 15:28:45 -07:00
qctecmdr
9ba0b463ba Merge "ARM: dts: msm: Add trusted touch properties to focaltech" 2020-09-09 15:28:45 -07:00
qctecmdr
4913717110 Merge "ARM: dts: msm: Enable CNSS2 node for shima" 2020-09-09 15:28:45 -07:00
qctecmdr
975c91f5ba Merge "ARM: dts: msm: Add handles for PCIE clocks" 2020-09-09 15:28:45 -07:00
qctecmdr
01cb0101cb Merge "ARM: dts: msm: Enable RCU expedited and no-cb cpus for Shima" 2020-09-09 15:28:45 -07:00
qctecmdr
dad6c67f94 Merge "bindings: smb1398: Update SMB1398 DT bindings" 2020-09-09 15:28:44 -07:00