A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-13 08:07:32 -04:00
Code Issues Projects Releases Packages Wiki Activity
5,014 commits 10 branches 0 tags 2.1 GiB
Commit graph

5,014 commits

This branch
This branch
All branches
Author SHA1 Message Date
qctecmdr
0bb70cd69b Merge "ARM: dts: msm: Add ION support for Direwolf" 2021-04-30 02:05:30 -07:00
qctecmdr
63a72dae6d Merge "ARM: dts: msm: Enable CPU cooling device for sdxlemur" 2021-04-30 02:05:30 -07:00
qctecmdr
ab97857e49 Merge "ARM: dts: msm: Add LLCC PMU device nodes on Direwolf" 2021-04-29 21:27:40 -07:00
qctecmdr
02397f32db Merge "ARM: dts: qcom: Add wlan node for sa6155" 2021-04-29 21:27:40 -07:00
qctecmdr
a9f79b1d53 Merge "ARM: dts: msm: Update clock frequenices for PCIe 2nd instance" 2021-04-29 21:27:40 -07:00
qctecmdr
0ce7d3c8d8 Merge "ARM: dts: msm: Add support for clock controllers for BLAIR" 2021-04-28 17:58:45 -07:00
qctecmdr
168762c6f6 Merge "ARM: dts: msm: Enable LLCC support in IOSS for sdxlemur" 2021-04-28 17:58:45 -07:00
qctecmdr
9557cc5a59 Merge "Revert "ARM: dts: msm: Disable NPU DCVS support on SM8150"" 2021-04-28 17:58:45 -07:00
qctecmdr
0225dbcdc7 Merge "ARM: dts: msm: Add GPUCC clock node and GDSCs for MONACO" 2021-04-28 17:58:44 -07:00
Saurabh Sahu
240335dcfa ARM: dts: msm: Add GPUCC clock node and GDSCs for MONACO 
GPUCC clock nodes is required for clocks client to request,
so add support for the same. Also add the GDSCs
required by clients for MONACO.

Change-Id: I2eb3f35e48a1f7f44c93df64384cee1af871416a
 2021-04-28 21:03:41 +05:30
Vijayavardhan Vennapusa
539d411b01 ARM: dts: msm: Update clock frequenices for PCIe 2nd instance 
Clock frequencies for PCIe 2nd instance are not passed correctly due
to which frequency for pcie1_phy_rchng_clk is not set to 100MHz. This
results in link training fail in Gen3 speed. Hence update clock
frequencies passed for PCIe 2nd instance to fix the issue.

Change-Id: I3065ebf725ecd8980057588e7bf93cb8ccedf51a
 2021-04-28 11:41:32 +05:30
qctecmdr
65999e2fcc Merge "ARM: dts: msm: Enlarge the minidump cma area" 2021-04-27 22:49:31 -07:00
qctecmdr
398d967fad Merge "bindings: clock: Add debugcc bindings for BLAIR" 2021-04-27 22:49:31 -07:00
qctecmdr
9de30c4813 Merge "ARM: dts: msm: Adding new DT entries for ETH bridging" 2021-04-27 22:49:31 -07:00
qctecmdr
117edc04a9 Merge "ARM: dts: msm: Add eMMC card support for monaco" 2021-04-27 22:49:30 -07:00
qctecmdr
1acb4a6658 Merge "dt-bindings: iio: qcom,spmi-vadc: Add PMIC5 GEN3 ADC bindings" 2021-04-27 22:49:30 -07:00
Jinesh K. Jayakumar
c5adf9cf6f ARM: dts: msm: Enable LLCC support in IOSS for sdxlemur 
Enable LLCC support in IOSS v2 for sdxlemur for ethernet link speeds
higher than 5 Gbps.

Change-Id: Ibaa0dcd411d0fbc3324bed6a72c878e04e719b45
 2021-04-27 21:55:19 -07:00
Kuichu Ni
0f6ddbc23b ARM: dts: qcom: Add wlan node for sa6155 
1. Add wlan converged node to support QCA6574/QCA6595/QCA6696 wlan
devices.
2. Use the "-config" suffix to replace with "-info" because of the
code changes in CNSS2, only reading property settings with "-config"
suffix for vregs.

Change-Id: Ib743b30f826f6dd5092db42aa0a9857e838880c4
 2021-04-28 11:47:16 +08:00
qctecmdr
76b18bfb4d Merge "ARM: dts: msm: Add MX property for PCIe on sdxlemur" 2021-04-27 20:12:56 -07:00
Jishnu Prakash
a2a1df4273 dt-bindings: iio: qcom,spmi-vadc: Add PMIC5 GEN3 ADC bindings 
PMIC5 GEN3 ADC has support for clients to read voltage and
current on supported channels connected to the PMIC.
Clients include reading voltage phone power and on board system
thermistors for thermal management. ADCs on certain PMICs have
support to read battery current.

Change-Id: Ief7cbdf77d227ba2cb4ef7919aa66d9962d98e37
 2021-04-27 16:54:18 +05:30
Shreyas K K
d3839a42c0 Revert "ARM: dts: msm: Disable NPU DCVS support on SM8150" 
Enable NPU DCVS support.
This reverts commit d641513439.

Change-Id: I6f5cecf8aa05ba5582da3a5cbadc0d5e5c98b477
 2021-04-27 15:07:52 +05:30
Shreyas K K
5abf11a6c4 Revert "ARM: dts: msm: Disable NPU DCVS support on SA8195" 
Enable NPU DCVS support.
This reverts commit d703024c34.

Change-Id: If193f56329cbec08a00edcc59838ba33dba1eefb
 2021-04-27 15:07:44 +05:30
Kuichu Ni
a94fcaa044 ARM: dts: msm: Enlarge the minidump cma area 
Enlarge the minidump cma area due to a number of new DTSI nodes
(mainly related to CPU cache minidumps) have been added, which
require more space.

Change-Id: I985d2bc74124e75c65ac98f0c207a76ee868c4b7
 2021-04-27 16:57:48 +08:00
Shreyas K K
5ead592ae2 ARM: dts: msm: Add ION support for Direwolf 
Add ION support for Direwolf target.

Change-Id: Ifd42df124041771aa84f665c085a45765d7208b6
 2021-04-27 11:05:10 +05:30
Shreyas K K
bc230a705e ARM: dts: msm: Add LLCC device nodes for Direwolf 
Add device nodes for Last level cache controller for
Direwolf target.

Change-Id: I7b207f8a63a9f466e5e3f1767b130137704fc73d
 2021-04-27 10:08:35 +05:30
Shreyas K K
de855e1b6f ARM: dts: msm: Add LLCC PMU device nodes on Direwolf 
Add LLCC PMU device nodes to measure the various
performance metrics on Direwolf target.

Change-Id: I8cae3762bd1659ee60343259b578ba0df82d2947
 2021-04-27 10:08:24 +05:30
Shreyas K K
82aca3ed1b ARM: dts: msm: Add devfreq support nodes for Direwolf 
Add devfreq support device tree noded for Direwolf platform.
This includes the devfreq devices, OPP tables, and devfreq
hardware monitors to support the different bandwidth and
latency requirements.

Change-Id: I30ac477957c2e4bec54f3e39db6a880a09bb6f0b
 2021-04-27 10:07:57 +05:30
Madhuri Medasani
0d4a3216af ARM: dts: msm: Add support for clock controllers for BLAIR 
Enable GPUCC, DISPCC and DEBUGCC and update RPMCC
to use holi-rpmcc instead of dummy for BLAIR RUMI.

Change-Id: Ia3aa16e4181aa3e2760eb2981af24c6111d27a32
 2021-04-27 09:33:52 +05:30
Madhuri Medasani
748eb367f3 bindings: clock: Add debugcc bindings for BLAIR 
Add debugcc clock controller bindings to support BLAIR.

Change-Id: Ib8fe2baabf741a6d0d500893a10e137c7344b4d3
 2021-04-27 09:24:52 +05:30
Taniya Das
3ccb840aee ARM: dts: msm: Update CPUFREQ-HW nodes for Blair 
Enable CPU frequency scaling and debug nodes for BLAIR.

Change-Id: I68cad665c716283298f08bb4501c7dd646dd8758
 2021-04-27 09:22:56 +05:30
qctecmdr
071bc55490 Merge "ARM: dts: msm: Add extcon node for sdxlemur-atp" 2021-04-26 18:03:54 -07:00
qctecmdr
59a73db243 Merge "ARM: dts: msm: setting clk is provided by SOC" 2021-04-26 12:17:58 -07:00
qctecmdr
e059549819 Merge "bindings: spmi: spmi-pmic-arb: Add description for "qcom,mid"" 2021-04-26 12:17:58 -07:00
qctecmdr
a2300317d6 Merge "dt-bindings: Add DT bindings for scuba" 2021-04-26 12:17:58 -07:00
qctecmdr
3d9b6877c8 Merge "ARM: dts: msm: Correcting watchdog node in blair-rumi.dtsi" 2021-04-26 08:46:45 -07:00
qctecmdr
0f71734cda Merge "ARM: dts: msm: Fix DDR OPP table entries" 2021-04-26 08:46:45 -07:00
qctecmdr
39df042c17 Merge "Revert "ARM: dts: msm: Add LA specific TVM flag in respective SPI node"" 2021-04-26 08:46:45 -07:00
qctecmdr
f5dc180a13 Merge "ARM: dts: qcom: add audio device tree source files" 2021-04-26 08:46:45 -07:00
qctecmdr
8201d7c36e Merge "ARM: dts: msm: bypass IPA eth shared-cb" 2021-04-26 08:14:42 -07:00
Fch
9a06b5cc08 ARM: dts: msm: setting clk is provided by SOC 
Solving QUIN TDM without CLK

Change-Id: Ifec0d86bcba5c5c21b6d296ad001fbcb45a2119f
 2021-04-25 02:14:02 -07:00
Kiran Gunda
be43290dee bindings: spmi: spmi-pmic-arb: Add description for "qcom,mid" 
Add a description for the "qcom,mid" property which corresponds
to the SPMI master ID of the SPMI PMIC arbiter controller. It is
most useful in systems with multiple masters, e.g. when there are
multiple SoCs connected to a single SPMI bus.

Change-Id: I376e6f569f9bbea44ba3930480a330fb1dd2c2de
 2021-04-24 09:35:46 +05:30
Ram Chandrasekar
e7e3f09c6e ARM: dts: msm: Enable CPU cooling device for sdxlemur 
Enable CPU cooling device to register with thermal framework for
sdxlemur.

Change-Id: I1be3532bfed77d4a82b1ef5c337220fe3f199783
 2021-04-23 10:28:44 -07:00
Guru Das Srinagesh
a668e9faaf ARM: dts: msm: Add extcon node for sdxlemur-atp 
Enable cable detection using pdphy functionality.  Also disable PMX65
VBUS_DET as VBUS detection is through PM7250B.

Change-Id: I9301e5f7412c5a443da4254524bcf7bd9e1fd79c
 2021-04-22 20:26:13 -07:00
Guru Das Srinagesh
b6dea87442 ARM: dts: msm: Add PM7250B to sdxlemur-atp 
Add support for PM7250B on the ATP board.

Change-Id: I5b5551eced2ffa28766b7b560d3d80136be35c52
 2021-04-22 20:26:11 -07:00
qctecmdr
24366521f8 Merge "ARM: dts: msm: Add initial device tree for SCUBA" 2021-04-22 20:21:16 -07:00
Guru Das Srinagesh
487a8f3c50 ARM: dts: msm: Include sdxlemur-mtp dt in sdxlemur-atp 
Assuming that ATP is similar to MTP in this aspect.

Change-Id: I2519dcba24ec60c549a27aea4641a95ecdd2569b
 2021-04-22 20:17:11 -07:00
Bojun Pan
5294bccf0d ARM: dts: msm: bypass IPA eth shared-cb 
bypass IPA eth shared-cb.

Change-Id: Id88736ee596de78daeec963d45d9aea3c6e0a233
 2021-04-22 18:02:22 -07:00
qctecmdr
20b0bf8687 Merge "ARM: dts: msm: Add device tree for sdxlemur ATP variant" 2021-04-22 11:54:54 -07:00
qctecmdr
ae84e7fdfe Merge "ARM: dts: msm: update quat tdm multilane config on auto VMs" 2021-04-22 11:54:54 -07:00
qctecmdr
93eb49c757 Merge "ARM: dts: msm: Enable L3 interconnect driver for direwolf" 2021-04-22 11:54:54 -07:00