Commit graph

890,320 commits

Author SHA1 Message Date
Harshdeep Dhatt
0eb8eb4dcc msm: kgsl: Modify the a6xx interrupt mask for hwsched
With hardware scheduling, we only need to enable a subset
of interrupts as the rest of them are completely owned by
GMU.

Change-Id: I32afc4420299688b9a4322804ce972c79f1a7a22
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 13:23:38 -06:00
Harshdeep Dhatt
ea24bd99f6 msm: kgsl: Add the hwsched dispatcher
We need a dispatcher which can keep track of inflight submissions
so that in case of a fault, the remaining submissions can be re-
submitted after reset. Also, we need a dispatcher to hold queued
submissions until the input fences are signaled.

Change-Id: I59f5cf0fed6d443cf8a55fd0f40e3f16600d9a6f
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 13:23:37 -06:00
Harshdeep Dhatt
a8002ec263 msm: kgsl: Add context unregister HFI
This is a special sequence because we don't want to wait for
the ack back while holding the device mutex. This means, we
have to define a new sequence of unlocking the device mutex
before we begin our wait for ack.

Change-Id: I3ea27bdccd66cdaafd8cff6cc1366848c1a4bea6
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 13:23:32 -06:00
Harshdeep Dhatt
019b8504ba msm: kgsl: Add support for multiple ack waiters
It is possible that there may be multiple host to firmware
messages waiting to be ACKed. So add support for putting them
in a list and traversing the list when an ack is received.
The primary use case for this feature is the context unregister
hfi of which there can be many, and they may get ACKed out of order.

Change-Id: I56087dab0814daf7e8ba720db0105e4762614b5e
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 10:16:38 -06:00
Harshdeep Dhatt
9786a5702b msm: kgsl: Dispatch submissions using hwscheduling
Add support for registering a context and sending
submissions to a single dispatch queue.

Change-Id: Ica16d8f54d5fa9bd0e416976224f24f7fca0884b
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 10:16:37 -06:00
Harshdeep Dhatt
bf1d7d92f8 msm: kgsl: Add asynchronous processing of acks
This adds the initial bits of handling acks asynchronously.
It is assumed that there is only one outstanding ack since we
wait for ack while holding the device mutex.
GMU handles acks inline until start_msg hfi and beyond that,
each hfi will be acked asynchronously.

Change-Id: I15e930d22f1154db377599a0c0409640821fb868
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 10:16:36 -06:00
Harshdeep Dhatt
fbe170edac msm: kgsl: Allow sending CP INIT via GMU
This change adds support to send CP INIT and switch to
unsecure mode packets via raw packets to GMU.

Change-Id: I2915b217c9c6c7d6dc624b4349d137df9a7a2c80
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 10:16:36 -06:00
Harshdeep Dhatt
dde333681c msm: kgsl: Add memalloc hfi support
Allocate gpu globals based on memalloc hfi requests. Map
them in gmu as well.

Change-Id: I43ecfedf5be92e39fd079a00f8311fe6aca7191b
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 10:16:35 -06:00
Harshdeep Dhatt
9e3803d654 msm: kgsl: Add the hwsched platform driver
This adds the skeleton for the hwsched driver to be
used for dispatching submissions using hwscheduling.

Change-Id: I963fe6b16deb58edab78ab0e9c66fae0d9294b9a
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-02 10:16:26 -06:00
qctecmdr
ed0ed35925 Merge "arm64: defconfig: Enable CONFIG_QCOM_QFPROM_SYSFS on Lahaina/Shima" 2020-09-02 03:12:22 -07:00
qctecmdr
4d6ca247d9 Merge "kgsl: msm: Correctly check hardware idle status for a619_holi target" 2020-09-02 03:12:22 -07:00
qctecmdr
5a2a2bcdf9 Merge "icc: dt-bindings: Update endpoint IDs for interconnects for HOLI" 2020-09-02 03:12:21 -07:00
qctecmdr
903b8756f2 Merge "power: smb1398: Update win-uv threshold to 10mV" 2020-09-02 03:12:21 -07:00
Ashish Chavan
7b32e9aedf power: smb1398: Update win-uv threshold to 10mV
When VIN/2 – VOUT < the threshold with debounce time,
WIN_UV protection kicks in. Update this threshold to
10mV.

Change-Id: I015528b9fb1e4db86c4e1af186aa0f6a912967f2
Signed-off-by: Ashish Chavan <ashichav@codeaurora.org>
2020-09-02 01:45:49 -07:00
Odelu Kukatla
9bd285b662 icc: dt-bindings: Update endpoint IDs for interconnects for HOLI
Update the master and slave ID constants for Holi interconnect
providers which consumers can use to set bandwidth constraints
and find paths in the NoC (Network-On-Chip) topology.

Change-Id: Ibba6b5ca47a56c041f1314eb516e62d3b9291573
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-09-02 13:23:34 +05:30
qctecmdr
836b649ab2 Merge "msm: adsprpc: send non-zero message PID for process kill message" 2020-09-02 00:22:31 -07:00
qctecmdr
e361eb5def Merge "soc: altmode: Add correct notify message length check" 2020-09-02 00:22:31 -07:00
qctecmdr
4602f8e6de Merge "PM / devfreq: qoslat: add support for multiple clients" 2020-09-02 00:22:31 -07:00
qctecmdr
444bd5e92e Merge "clk: qcom: clk-debug: Detach the clock request from syscon regmap" 2020-09-02 00:22:30 -07:00
qctecmdr
f6afabd1e2 Merge "mhi: core: Extend mhi_device_get_sync_atomic() for panic cases" 2020-09-02 00:22:30 -07:00
qctecmdr
633c0a1c6d Merge "drivers: lpm-levels: Update the RIMPS register pasring from DT" 2020-09-02 00:22:29 -07:00
qctecmdr
efd7f5d40d Merge "msm: kgsl: Add support for split pagetables" 2020-09-01 21:42:14 -07:00
qctecmdr
b5b61d0f51 Merge "power: qpnp-qg: Fix the sleep_length value in process_suspend" 2020-09-01 17:18:54 -07:00
qctecmdr
ffcae92e17 Merge "defconfig: lahaina-gki: enable QPNP PBS driver" 2020-09-01 17:18:54 -07:00
qctecmdr
7886690ee9 Merge "mmc: sdhci-msm: Add support for ice core clock" 2020-09-01 17:18:53 -07:00
qctecmdr
c99ee572a3 Merge "mmc: sdhci-msm: Calculate timeout value based on the base clock" 2020-09-01 17:18:52 -07:00
qctecmdr
ca144bfa19 Merge "msm: kgsl: Use a token address for memstore" 2020-09-01 17:18:52 -07:00
Amir Vajid
a5041de2a6 PM / devfreq: qoslat: add support for multiple clients
Add support for multiple clients in qoslat by maintaining a
list of devices and aggregating across them during updates.

Change-Id: I3e9970b324938eecdd85f3970ba3acc2c5880fdf
Signed-off-by: Amir Vajid <avajid@codeaurora.org>
2020-09-01 16:09:59 -07:00
Himateja Reddy
b76e246359 msm: adsprpc: send non-zero message PID for process kill message
Currently, since remote process kill is a kernel RPC call, a zero
pid is sent in its message. Send the actual HLOS pid for the
process kill message so that the remote subsystem can identify
which process to kill without needing to map the arguments.

Change-Id: I14c13194baa231a892ed9e8ee269a8cdb1710211
Acked-by: Thyagarajan Venkatanarayanan <venkatan@qti.qualcomm.com>
Signed-off-by: Himateja Reddy <hmreddy@codeaurora.org>
2020-09-01 16:02:59 -07:00
qctecmdr
8295c46e6b Merge "msm: kgsl: Add GPU minimum bandwidth vote state" 2020-09-01 14:37:03 -07:00
qctecmdr
55ab5d8dd6 Merge "interconnect: qcom: Add QoS config support for BIMC masters" 2020-09-01 14:37:03 -07:00
qctecmdr
7c4e91c5a8 Merge "build.config: Add qnoc-qos.ko module for Lahaina" 2020-09-01 14:37:02 -07:00
qctecmdr
9c40e1ec65 Merge "clk: qcom: debugcc: Update clk measure for gcc clocks for HOLI" 2020-09-01 11:50:48 -07:00
qctecmdr
4be07d0844 Merge "power: supply: qti_battery_charger: Change wireless power supply type" 2020-09-01 11:50:48 -07:00
qctecmdr
e2d2f0e595 Merge "Merge android11-5.4.60+ (22550de) into msm-5.4" 2020-09-01 11:50:48 -07:00
Jordan Crouse
0c294ef2ff msm: kgsl: Add support for split pagetables
Attempt to enable split pagetables on the global and LPAC domains.
If successful we no longer need to map globals in all pagetables and we
don't need to manually return to the default pagetable when coming out
of slumber since all the globals will now live in the always on TTBR1
region.

Change-Id: Ic0dedbaddd7d05299d7e85d7b0bbc96b46dad10e
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2020-09-01 12:33:50 -06:00
Jordan Crouse
3ba19ae965 msm: kgsl: Use a token address for memstore
The user maps the memstore using the GPU address of the shadow memory.
Unfortunately, mmap() only uses a unsigned long which means that 32 bit
applications can handle when TTBR1 is enabled and the memstore is in
very high memory.

Instead of passing the real GPU address pass a dummy 32 bit value and use
that to identify the memstore instead.

Change-Id: Ic0dedbaddd6efda305953b20cfaa4a597020bff9
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-09-01 12:32:38 -06:00
Raghavendra Kakarla
ccb665aa2b drivers: lpm-levels: Update the RIMPS register pasring from DT
This patch adds the logic to get the RIMPS address with passing
domain name and stores the rimps address to lpm_cpu structure so
that it can access from the last core of corresponding cluster
domain going to rail-pc to program the RIMPS timer value.

Change-Id: I90418d280440e3f26615583454116c01cec04126
Signed-off-by: Raghavendra Kakarla <rkakarla@codeaurora.org>
2020-09-01 21:55:08 +05:30
Odelu Kukatla
40d225830e interconnect: qcom: Add QoS config support for BIMC masters
Introduce support to initialize QoS settings for BIMC
masters.

Change-Id: Ia225afedb08cb3b09094bc8f4ebd6d12ad9c6a33
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-09-01 21:45:32 +05:30
qctecmdr
111c4766c6 Merge "defconfig: msm: Enable ARCH_SHIMA for genericarmv8" 2020-09-01 09:04:14 -07:00
qctecmdr
4f9cdbfb88 Merge "serial: msm_geni_serial: Reduce nos HSUART port supported" 2020-09-01 09:04:14 -07:00
qctecmdr
e0bcd926c9 Merge "defconfig: holi: Enable Incremental FS support" 2020-09-01 09:04:14 -07:00
qctecmdr
b8a10f7b0a Merge "defconfig: msm: Enable debug module info config for Lahaina/Shima" 2020-09-01 09:04:13 -07:00
Taniya Das
f3e2d69be4 clk: qcom: clk-debug: Detach the clock request from syscon regmap
syscon_regmap_lookup_by_phandle prepares the 0th clk handle provided in
the device node. The debug clock controller prepares/enables/disables the
required clock, thus it is safe to detach the clock to remove the
undesired clock prepare votes.

Change-Id: Ibacac8161ba8244c170a87f172c3ad9029625ed7
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-09-01 09:00:33 -07:00
Mukesh Ojha
bd5897b9d5 arm64: defconfig: Enable CONFIG_QCOM_QFPROM_SYSFS on Lahaina/Shima
Enable CONFIG_QCOM_QFPROM_SYSFS on Lahaina/Shima, so that feature
config nodes etc. can be accessed from userspace and at the same
time disabled CONFIG_NVMEM_SYSFS to avoid exposing full QFPROM region
to user-space.

Change-Id: I43dd4f6f368d07d0a5047c3732065efe4200b3b3
Signed-off-by: Mukesh Ojha <mojha@codeaurora.org>
2020-09-01 08:01:14 -07:00
qctecmdr
5bebd12bfa Merge "power: smb5-lib: Use the unlocked version votable for FV" 2020-09-01 03:34:52 -07:00
qctecmdr
7e4d83fc02 Merge "drivers: coresight: Add interrupt service routine for apss tgu" 2020-09-01 03:34:52 -07:00
qctecmdr
17d7ab928a Merge "mfd: qcom-i2c-pmic: Reduce the stat-toggle delay" 2020-09-01 03:34:51 -07:00
qctecmdr
a0246be549 Merge "scsi: ufs: Increase ah8 idle to 10ms" 2020-09-01 03:34:51 -07:00
qctecmdr
f31d68236e Merge "arm64: defconfig: Enable vWDT support to SVM" 2020-09-01 03:34:51 -07:00