This makes sure CNSS2 driver is able to work in the platforms and
kernels which do not have on-chip interconnect management feature.
Change-Id: I282ef1a282fab9ce4910e7ab914f26789b34ba64
Signed-off-by: Yue Ma <yuem@codeaurora.org>
This makes sure CNSS2 driver is able to work in non-MSM platforms
which do not have command DB feature.
Change-Id: I9551bfc639e6db0256e475a27db5dec87bce74ed
Signed-off-by: Yue Ma <yuem@codeaurora.org>
This makes sure CNSS2 driver is able to work in non-MSM platforms
which do not have IPC logging feature.
Change-Id: I4c8fe3eb45e38fd106f47c28f0e4da82b0bdf76f
Signed-off-by: Yue Ma <yuem@codeaurora.org>
This makes sure CNSS2 driver is able to work in non-MSM platforms
which do not have memory dump and mini dump features.
Change-Id: I5193deed941ff8e2e2ca2693150396a53eb3db7d
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Currently in MSM platform reserved memory is attached to PCI
device of_node which may not apply to other non-MSM platforms.
Hence abstract the API using CONFIG_ARCH_QCOM flag.
Change-Id: Ic02b087c188b8dcb0959e17c80e72bb4021a725c
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Current default regulator and clock tables are for MSM platform
only. Use empty tables for non-MSM platforms by default so that
proper regulators and clocks can be added later based on platforms.
Change-Id: I2705d8ca2a0fde636f346f01e677a762b4cf92b7
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Currently the driver enables autoresume for all the connected
peripherals. In a case where an LS device is connected but fails
the enumeration, this autoresume enablement is leading to PHY
keeping the Dm pulled up even when the peripheral is detached.
Hence, the detach hs_phy_irq is never fired and disconnect is
not processed.
Since remote wakeup from LS peripherals is not a requirement on
our platforms, enable autoresume for FS/HS devices only.
Change-Id: I0a62d08e58af18b523af322c64529f5183d55907
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
Currently the driver checks whether the PED bit of the PORTSC
register is set to decide whether any device is connected, and
then checks the PORTSPEED field to check for the speed and
accordingly updates the HSPHY speed flag with LS or FS/HS. Hence,
the PDC is programmed to fire HS_PHY_IRQ only on the rising edge
of Dp/Dm.
In a case where the connected peripheral has failed to enumerate,
the PED bit can be cleared by the host driver. When such a device
is disconnected, there is no HS_PHY_IRQ fired to wakeup SW and
disconnect handling does not happen.
Fix this by setting HSPHY speed flags based on the CCS bit of the
PORTSC register so that the PDC is programmed to fire HS_PHY_IRQ
on the falling edge of Dp/Dm.
Change-Id: I122d170434da19fd6aeb022a5fa8a85f1ea6f541
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
Enable MFD SPMI PMIC driver and several SPMI and PMIC drivers
which are needed to provide baseline support of PMIC peripherals.
Change-Id: I965b40eb0931c2e22e9fab28626e9ca753ad3ff8
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
