Commit graph

858,494 commits

Author SHA1 Message Date
Lina Iyer
47e18613bc irqchip: qcom-pdc: Add IPC logging support
Add IPC logging support for debugging PDC interrupts.

Change-Id: I541acccc44cdc617a72d44ac8b3528bbc05b2e69
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
2019-10-01 18:02:48 +05:30
Lina Iyer
1582c6bcd9 irqchip: qcom-pdc: Additionally set type in SPI config registers
GPIOs that can be configured as wakeup are routed to the PDC wakeup
interrupt controller and from there to the GIC interrupt controller. On
some QCOM SoCs, the interface to the GIC for wakeup capable GPIOs have
additional hardware registers that need to be configured as well to
match the trigger type of the GPIO. This register interfaces the PDC to
the GIC and therefore updated from the PDC driver.

Typically, the firmware intializes the interface registers for the
wakeup capable GPIOs with commonly used GPIO trigger type, but it is
possible that a platform may want to use the GPIO differently. So, in
addition to configuring the PDC, configure the interface registers as
well.

Change-Id: Icab7d9eeb77b5dab9d6a5a8280ce568da40b6ca6
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
2019-10-01 18:02:48 +05:30
Lina Iyer
67c413154e irqchip: qcom-pdc: add irqchip set/get state calls
Add irqchip calls to set/get interrupt state from the parent interrupt
controller. When GPIOs are renabled as interrupt lines, it is desirable
to clear the interrupt state at the GIC. This avoids any unwanted
interrupt as a result of stale pending state recorded when the line was
used as a GPIO.

Change-Id: Ibd551f84d8f6ae15b8d9702faeb585a69f283f6e
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
2019-10-01 18:02:38 +05:30
Chris Goldsworthy
bda68082e0 defconfig: enable reserved memory check on Lahaina
Enable a check to see if devices with reserved memory regions allocate from
those regions, when using the DMA API for allocations.  WARN_ON if check
doesn't pass.

Change-Id: Ic788dc4638d83cdf8a1e34f60efe678b9639d4b3
Signed-off-by: Chris Goldsworthy <cgoldswo@codeaurora.org>
2019-09-27 11:06:48 -07:00
Chris Goldsworthy
d9c9998b16 of: reserved_mem: Check that memory reserved in device tree is in use
Inside of dma_alloc_attrs(), verify that devices with a reserved memory
region are actually using the region, in order to prevent wastage of
memory.

Change-Id: I56852a761d3253ec2a3a7db0f6501c73983e55c6
Signed-off-by: Chris Goldsworthy <cgoldswo@codeaurora.org>
2019-09-27 10:25:31 -07:00
qctecmdr
b94e0753f5 Merge "ion: remove cpu binding of pool refill kthreads" 2019-09-26 18:19:14 -07:00
qctecmdr
50d99abda8 Merge "soc: qcom: qmi_interface: Remove ineffective mutex lock from txn struct" 2019-09-26 17:45:36 -07:00
qctecmdr
af0b277dbf Merge "soc: qcom: qmi_interface: Add send timeout helper" 2019-09-26 17:08:56 -07:00
qctecmdr
270e085d20 Merge "soc: qcom: qmi: Remove txn idr entry in qmi handle release" 2019-09-26 16:36:26 -07:00
qctecmdr
7eb503f63d Merge "msm: ipa: add the version check for FnR stats ioctl" 2019-09-26 15:47:34 -07:00
qctecmdr
049152c66e Merge "soc: qcom: qmi_interface: sync release and data_ready callback" 2019-09-26 15:11:14 -07:00
Bojun Pan
a7cdc47c78 msm: ipa: add the version check for FnR stats ioctl
Add version check for FnR stats ioctl and error return,
since only IPA4.5+ HW will support this feature.

Change-Id: If5c5021d16bc1ee6af516d9e2200c3e6b5081d27
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-09-26 14:21:53 -07:00
qctecmdr
872e13b08b Merge "ipa3: add hasting AP+STA quota/stats support" 2019-09-26 13:41:31 -07:00
qctecmdr
14b5a2da73 Merge "ion: msm: Correct memory-region of_node reference counting" 2019-09-26 11:14:33 -07:00
Skylar Chang
566b07e021 ipa3: add hasting AP+STA quota/stats support
Add uc event ring to have ipa-uc monitor the
quota and bw-voting threshold to generate the
irq to ipa-driver to inform if quota or and bw
threshold is hit.

Change-Id: I7ce9c1a0048016fc6b6248a1632365f51717422c
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2019-09-26 10:55:19 -07:00
qctecmdr
1aea860783 Merge "Revert "staging: android: ion: Use the MSM dmabuf ops when possible"" 2019-09-26 10:38:24 -07:00
qctecmdr
4f857060ef Merge "ion: msm: Update the heap IDs as per the ION core standards" 2019-09-26 10:03:02 -07:00
qctecmdr
306f178df8 Merge "msm: ipa3: remove ipa3_ctx access from wan driver and qmi service" 2019-09-26 09:16:12 -07:00
qctecmdr
f2b18e2809 Merge "include: dt-bindings: ion: Add header for the MSM ION heap IDs" 2019-09-26 08:47:42 -07:00
qctecmdr
af4a510da5 Merge "ion: msm: Define heap IDs as constants in their own file" 2019-09-26 08:08:29 -07:00
qctecmdr
95a9b89382 Merge "clk: qcom: clk-alpha-pll: Add support for controlling Lucid5lpe PLLs" 2019-09-25 08:02:45 -07:00
qctecmdr
a178938446 Merge "drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs" 2019-09-25 08:02:45 -07:00
Michael Adisumarta
75cf0024f4 msm: ipa3: remove ipa3_ctx access from wan driver and qmi service
Access ipa3_ctx through ipa_utils.c instead of direct access
which is prohibited.

Change-Id: I1682037cf845d3d8553966551410ff5e8a833f84
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-09-25 01:25:46 -07:00
Michael Adisumarta
8386504ae8 msm: ipa: add additional checks to prevent use-after free errors
Adding a function to check for dangling pointer using IPA IDR structure
to avoid use after free error.

Change-Id: I0bd3d733bf10403366abc643f89c3e5c5e6228e9
Acked-by: Suhas Mallesh <smallesh@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-09-24 16:36:17 -07:00
Arun Kumar Neelakantam
3bf90d6d26 soc: qcom: qmi_interface: Remove ineffective mutex lock from txn struct
The same QMI transaction data is synchronized using two mutex locks.

Remove ineffective transaction mutex lock because it is always
covered by QMI txn_lock with same purpose.

CRs-Fixed: 2470638
Change-Id: If53e006436c77d572b2d69507e1593e3d57e1cd4
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
2019-09-24 16:36:04 -07:00
Arun Kumar Neelakantam
4cdda05e9d soc: qcom: qmi_interface: Release mutex lock before return
Mutex lock not released before function return in failure case.

Add mutex unlock in failure case.

CRs-Fixed: 2463072
Change-Id: I68b23364e8cb1001c0a65b1b831fd3b68894e1a9
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
2019-09-24 16:36:01 -07:00
Chris Lew
e62317caca soc: qcom: qmi_interface: Add send timeout helper
Add an api for clients to set the send timeout of the underlying qrtr
socket. QMI sets this timeout to 10 seconds by default but this is too
long for some clients in critical paths.

Change-Id: I4c892a2f034c87b6bf2f71664369140910e72383
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-09-24 16:35:37 -07:00
Arun Kumar Neelakantam
0aa2d8ef9b soc: qcom: qmi_interface: Fix race between net_reset and release
qmi client calling qmi_handle_release while handling net_reset cause
NULL pointer access.

Synchronize the net_reset handling with qmi_handle_release to avoid
memory leak and invalid pointer access.

CRs-Fixed: 2383987
Change-Id: I8179f96e5dfabe945b1a37f83530bc3b05ed746a
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
2019-09-24 16:08:01 -07:00
Deepak Kumar Singh
780b9bb5d5 soc: qcom: qmi: Remove txn idr entry in qmi handle release
txn idr entry contains local pointer, which can go out of context
if the calling function exits. Qmi handle can be released from other
thread context(SSR), where iterating over pending transactions list
if txn idr entry is not removed it results in crash in next iteration
as the previous txn idr entry is not valid.

CR-Fixed: 2373541
Change-Id: I0c96a575fb198115532de9977095f2c056742b33
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
2019-09-24 16:07:53 -07:00
Arun Kumar Neelakantam
cc8f664618 soc: qcom: qmi_interface: sync release and data_ready callback
Receiving data on a socket which is getting closed by client at same time
can cause invalid pointer access.

Use sk_callback_lock to sync between data_read callback and socket close.

CRs-Fixed: 2372711
Change-Id: I98951a86a6a53bf196026a342ec4fff726bedf92
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
2019-09-24 16:07:40 -07:00
Isaac J. Manjarres
38a894b463 ion: msm: Correct memory-region of_node reference counting
of_parse_phandle() is used to deduce if a memory region is
associated with a particular device. The call to of_parse_phandle()
internally increments the reference count to the memory region's
of_node, and thus, the caller should reverse that action by
decrementing it via a call to of_node_put().

Change-Id: I80a0ed843312229f277c09fe107e407118a0a473
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:40 -07:00
Isaac J. Manjarres
b11b966555 ion: msm: Prevent log-spam from ION dmabuf mmap failures
Use rate-limited prints when an ION buffer should not be
mapped to userspace. This prevents the kernel logs from being
flooded by failures triggered by continuous userspace requests
to map a buffer that should not be mapped to it.

Change-Id: I5f4a1bc1fab7424588e68a55cb18aa28e969841c
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:40 -07:00
Isaac J. Manjarres
2e94d4453b Revert "staging: android: ion: Use the MSM dmabuf ops when possible"
This reverts commit b0cbb06dd1.
This commit is no longer needed, since the ION core now allows
for dmabuf ops to be overridable.

Change-Id: I32def4db2d7de97f465a82531367c78eeae8a4a1
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:39 -07:00
Isaac J. Manjarres
a641971d26 ion: Update the heaps to use the MSM ION dmabuf ops for CMO
Since the dmabuf portion of the ION core now allows for heaps
to specify their own dmabuf ops for cache maintenance, update
the heaps so that they specify the MSM ION dmabuf ops.

Change-Id: I98d9f2fa3e3ab8288e481c72e18e5d2f14a8a400
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:39 -07:00
Isaac J. Manjarres
18fe521583 ion: msm: Update the heap IDs as per the ION core standards
Update the heap IDs as per the standard imposed by the ION
core (i.e.):

SYSTEM_HEAP: (1 << 0)
SYSTEM_CONTIG_HEAP: (1 << 1)
CARVEOUT_HEAPS: [(1 << 2), (1 << 6)]
CHUNK_HEAP: (1 << 7)
CMA_HEAPS: [(1 << 8), (1 << 15)]
VENDOR_HEAPS: [(1 << 16), (1 << 31)]

Since the heap IDs are now bitmasks, as opposed to offsets
within a bitmask, update the userspace ION_HEAP() macro/as
well as the heap ID treatment in the kernel to account for
this as well.

Change-Id: I6b7ca1caf89dda03dfb499a362db863168c2753c
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:38 -07:00
Isaac J. Manjarres
33bf5566ad include: dt-bindings: ion: Add header for the MSM ION heap IDs
Add a reference to the MSM ION heap ID header as part of the
dt-bindings headers, so that the device-tree can reference
the heap IDs via the defined macros.

Change-Id: I7fd7e45e8a61908b037a421b08f4ba8b4ddebfbf
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:38 -07:00
Isaac J. Manjarres
5baf1404c7 ion: msm: Define heap IDs as constants in their own file
The ION heap IDs are also needed by the device-tree to
provide the kernel with the heap ID for the heap that
a device-tree entry describes. Currently, these IDs are
hard-coded, which can be error-prone when updating the
heap IDs.

Thus, create a header that can also be accessed by the
device-tree and userspace, and move the heap IDs to that
header. This makes it so that the device-tree can now use
the constants defined in the header, instead of hard-coded
IDs, making updates significantly easier.

Change-Id: I58b1aae9924504f2b20e159b9be8da7a2ee8d248
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-24 15:25:29 -07:00
qctecmdr
03bcb3cbf0 Merge "ion: msm: Relocate MSM ION header directly to include/uapi/linux" 2019-09-24 12:23:30 -07:00
qctecmdr
04df73fc45 Merge "iommu/arm-smmu: Mask TLBI address correctly" 2019-09-24 11:38:33 -07:00
Vivek Aknurwar
610636dbb8 clk: qcom: clk-alpha-pll: Add support for controlling Lucid5lpe PLLs
Add programming sequence support for managing the Lucid 5lpe
PLLs.

Change-Id: Ib15da038c5c2904487d5eac31384cbf3310daf83
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2019-09-24 11:31:09 -07:00
Lina Iyer
5155a9bc8a drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs
Introduce a new domain for wakeup capable GPIOs. The domain can be
requested using the bus token DOMAIN_BUS_WAKEUP. In the following
patches, we will specify PDC as the wakeup-parent for the TLMM GPIO
irqchip. Requesting a wakeup GPIO will setup the GPIO and the
corresponding PDC interrupt as its parent.

Change-Id: I13b206773e5f04452eed87ad1490da50b034ac4c
Co-developed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
2019-09-24 10:39:20 -06:00
qctecmdr
9fbdb30f29 Merge "msm: ipa: remove unneeded files" 2019-09-24 08:56:21 -07:00
Michael Adisumarta
e4ea599a9a msm: ipa: Enable qmi send request to remove last connection
Change the if condition to be inclusive to allow remove_offload
ioctl to send the rmv_offload_request through qmi on the last
connection.

Change-Id: I6eec7799fd1a76ab168bc588b3e9c74dbfd215fd
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2019-09-23 15:56:10 -07:00
Bojun Pan
91c832801c msm: ipa: remove unneeded files
Remove code check-in not belonging to IPA driver.

Change-Id: I6f79d72d054c7c3b9d5448ae83150d5afaedacff
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-09-23 13:49:40 -07:00
Sudarshan Rajagopalan
0ba9663f16 ion: remove cpu binding of pool refill kthreads
Remove the cpu affinity of ion pool refill kthreads which were
binded to min capability cpus, since there was no observable
power impact with when not affined.

Note: It was found that the code to create cpumask for min
capability cpus was broken and kthreads were free to run on
any cpus. No observable power impact was seen, hence better
off with removing this code entirely.

Change-Id: If6a32d9e4d3c576e63e3b0ec405be1fd4639a5e0
Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 12:39:43 -07:00
Patrick Daly
1c00dc6bef staging: android: ion: Ratelimit warning message
Ratelimit warning messages to prevent unnecessary log spam.

Change-Id: I61f4a4b65f516650cd9324ccf087639d6ea27da1
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 12:39:32 -07:00
Robin Murphy
367d9d7d5f iommu/arm-smmu: Mask TLBI address correctly
The less said about "~12UL" the better. Oh dear.

We get away with it due to calling constraints that mean IOVAs are
implicitly at least page-aligned to begin with, but still; oh dear.

Change-Id: I8e4ed0ccc1aae76988449895e6f7a9944d429af6
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Git-commit: 353b325047
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 11:49:47 -07:00
Isaac J. Manjarres
5d45437535 ion: msm: Relocate MSM ION header directly to include/uapi/linux
Instead of using a symlink to point to the MSM ION header,
place it directly in the include/uapi/linux path.

Change-Id: Id2a91adb4bdfc2c03e8eb535882734603ccd0f94
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 09:47:34 -07:00
Isaac J. Manjarres
436d1f81a7 ion: Fail system secure heap creation if system heap is unavailable
The system secure heap relies on the existence of the system
heap. Thus, if the system heap is not available, do not create,
the system secure heap.

Change-Id: I7a99e0fda45ae02ed6e5c8a797d29e917e84f182
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-09-23 09:47:34 -07:00
Bojun Pan
2a54c015b8 msm: ipa: Fix KW P1 issue
KW tool detect the potential NULL access and buffer
index overflow issue.
The change is to add the proper handle for NULL response
and prevent buffer index overflow.

Change-Id: I0bb1b45ba6e5b0abe6c3539d451f74e19028737c
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-09-21 14:04:45 -07:00