The LLC uses a 64 byte cache line size, but has a GFO
mode where it can allocate partial cache lines as well.
So Enabling GFO mode for higher performance.
Change-Id: I941b3ed4fa20038834362134d6dfaeae77f0cfdf
Signed-off-by: Nitheesh Muthuraj <nmuthuraj@codeaurora.org>
For modifying load balance policy, we add the hook on
find_busiest_group().
It allows us to modify load balance paths.
Bug: 168248326
Signed-off-by: YT Chang <yt.chang@mediatek.com>
Change-Id: I77ec043576139806551b978eb1bdf9f637442dfb
(cherry picked from commit a2ca8408de6183364b4c17f341f06e875bc7a1c1)
(cherry picked from commit 489646b879ede582b6b00803edd3f777aede4d85)
Enable CONFIG_SHADOW_CALL_STACK_VMAP by default, and as we allocate
a full page for the stack, allow the kernel use all of it.
Bug: 169781940
Change-Id: Ie8eaa7f24e9bf10ff28a302ac98ad843b71c9c2a
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Git-commit: 1eb128820e
Git-repo: https://android.googlesource.com/kernel/common/+/refs/heads/android11-5.4
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Enable WDI2 and dynamic switching between WDI3
and WDI2 based on wlan input.
Change-Id: Iaa23c78d8852fe12d9f9bc1133ee7c53f6755779
Signed-off-by: Pooja Kumari <kumarip@codeaurora.org>
Add some symbols to symbol list included by oem modules.
Bug: 165594476
Change-Id: I2ce478cf2fff9d570122910cc4007523afc8fa9f
Signed-off-by: Peter Wuw <peter.wuw@oneplus.com>
When PVM lend an IRQ, a notification is given to SVM. Later SVM can
accept the IRQ that is lend by PVM. If the SVM do not accept an IRQ,
PVM can reclaim it back and lend again to SVM. This scenario is not
handled correctly and notification for lend from PVM to SVM is not
happening. Do an extra check in the callback handler whether previous
lend succeeded or not.
Change-Id: I9a6d335b6c11c8aea956fa1535b093c385e4cde1
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Enable CONFIG_SHADOW_CALL_STACK_VMAP by default, and as we allocate
a full page for the stack, allow the kernel use all of it.
Bug: 169781940
Change-Id: Ie8eaa7f24e9bf10ff28a302ac98ad843b71c9c2a
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Virtual PM Group resource type has been added to the list of
hypervisor resource types that can be queried for by a VM.
This addition is in preparation for the hyp core ctl driver to store and
utilize the information related to VPM group such as cap_id and
VPM group state in relevant hypervisor features.
Change-Id: I4ec9b4dca5f095980b8ce9134c7cac695562f101
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
The proxy consumer driver currently only supports proxy
probing for platform bus. However, there's a need to
proxy-probe coresight devices, which falls under ABMA bus.
Hence, extend the driver to support proxy probing for
"struct amba_driver" and add coresight-etm ids to the list.
Change-Id: I48da20ea18f61b5cc82ae0616a75c23af32481a2
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
Add "qcom,jtagv8-mm" to the list of proxy consumers, such that
the sync-state logic need not wait for the probe from the actual
driver if it's disabled.
Change-Id: I580a865ba3c4c298d76e29552eec854b33faea24
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
Update the android/abi_gki_aarch64_qcom with recent symbol additions.
Simple change and no need to update the .xml file, as no new symbol
addition.
Bug: 171693478
Signed-off-by: Archana Sriram <apsrir@codeaurora.org>
Change-Id: Ic105f1f4d3c3409c461e49035cad5806f5fce22c
The estimated utilization for a task:
util_est = max(util_avg, est.enqueue, est.ewma)
is defined based on:
- util_avg: the PELT defined utilization
- est.enqueued: the util_avg at the end of the last activation
- est.ewma: a exponential moving average on the est.enqueued samples
According to this definition, when a task suddenly changes its bandwidth
requirements from small to big, the EWMA will need to collect multiple
samples before converging up to track the new big utilization.
This slow convergence towards bigger utilization values is not
aligned to the default scheduler behavior, which is to optimize for
performance. Moreover, the est.ewma component fails to compensate for
temporarely utilization drops which spans just few est.enqueued samples.
To let util_est do a better job in the scenario depicted above, change
its definition by making util_est directly follow upward motion and
only decay the est.ewma on downward.
Bug: 120440300
Signed-off-by: Patrick Bellasi <patrick.bellasi@matbug.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Vincent Guittot <vincent.guittot@linaro.org>
Cc: Dietmar Eggemann <dietmar.eggemann@arm.com>
Cc: Douglas Raillard <douglas.raillard@arm.com>
Cc: Juri Lelli <juri.lelli@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Perret <qperret@google.com>
Cc: Rafael J . Wysocki <rafael.j.wysocki@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20191023205630.14469-1-patrick.bellasi@matbug.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit b8c96361402aa3e74ad48ceef18aed99153d8da8)
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: Iaa75dec917748375d9043c3ebf21bf272299c8dd
Update the DLL power up sequence according to the latest enhanced SDCC
DLL HSR document and SDCDC initialization sequence in HPG.
Final sequence:
Step 1 - Set PWRSAVE bit in MCI_CLK to '0' during reset
Step 2 - Disable CK_OUT
Setp 3 - Set CORE_DLL_CLOCK_DISABLE to '1'
Step 4 - Set RST & PDN to '1'
Step 5 - Set DLL_CONFIG_3
Step 6 - Set SDC4_USER_CTRL
Step 7 - Set SDC4_TEST_CTRL(SW can Skip this step)
Step 8 - Set DDR_CONFIG
Step 9 - Set DLL_CONFIG_2
Step 10 - Set DLL_CONFIG
Step 11 - Wait for 52 us
Step 12 - Set RST & PDN to '0'
Step 13 - Set RST to '1'
Step 14 - Set RST to '0'
Step 15 - Set CORE_DLL_CLOCK_DISABLE to '0'
Step 16 - Wait for 8000 input clock cycles
Step 17 - Enable CK_OUT
Step 18 - Check for Lock
Step 19 - If PWRSAVE is needed, set PWRSAVE to '1'.
Change-Id: I889937a1728b3ce039a802972f9668969fe96505
Signed-off-by: Jun Li <liju@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Correct register values when toggling RC_CLK_CAL for playing haptics in
HBoost open loop case.
Change-Id: Ia48ab3af93181c61ec719716634e94a819353c8b
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pin.
Reorder the pins and expose it as gpio 204, so that the UFS driver can
toggle it.
Change-Id: Ifd0b430a4c057a4fa5c4a57fb484c71df18d7f1d
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
Add initial pinctrl driver to support pin configuration with
pinctrl framework for sdmshrike. This driver is a snapshot of
pinctrl-sdmshrike.c from msm-4.14 at commit id "54fbb7a2".
Change-Id: I8585c025cee91e5cce75598ed2e43cdc00bb769a
Signed-off-by: Saurabh Ambulkar <sambulka@codeaurora.org>
Populate egpio related variables in pingroup macro. This is
to make sure pincontrol-msm driver takes epgio bits into
account when it configures pinmux setting for any tlmm pin.
Change-Id: I828661fd2e05664b583dc40d3110096a95a489e8
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Add option to enable the compilation for SA8195
platform.
Change-Id: I0866efa419c213d842448b35ee4a829785e7d954
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
Add option "ARCH_SA8155" to enable compilation
for sa8155 target.
Change-Id: I55af2e604c946f8d0494ed6b9ad53aa42244b596
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
During char device creation, device counted by chdev_count and since
the device creation can happen from different contexts, need to guard the
flow.
This change introduces new lock for spcom_dev->chdev_count.
Change-Id: If59c3ae69d7366892583b2552cf276b6714eeb03
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
The votes for power resources can only be removed if there are no
outstanding TLB invalidation operations. This is true when the
downstream io-pgtable-arm optimizations are in use, as the code that
unmaps the memory from the IOMMU page tables ensures that all TLB
operations are complete before returning.
However, the upstream io-pgtable-arm implementation allows for a TLB
invalidation to be in progress when control is returned back to
arm_smmu_unmap(), at which point the votes for the power resources
will be removed. In cases where the GPU is in slumber, the GPU block
and GPU SMMU get powered down when the SMMU driver removes its votes.
This causes problems where unmapping buffers takes a long time.
For scenarios where it is not feasible to guarantee that TLB
invalidations have completed when control is returned to the
arm_smmu_unmap() function, leave the votes for power resources in place,
and rely on the subsequent sync operation to remove the votes.
Change-Id: Idc594cc69860b44a8eb56c72b5c592bf4799bf84
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Put page owner and slub debug entries under conditional
flag, to avoid compilation issues.
Change-Id: I2a0c20f7bc9158e7a52e58c6a28a8f0859e83983
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Enable CONFIG_UFS_DBG for Holi debug builds, so that UFS Ftrace
logs gets enabled in trace instances.
Change-Id: Id4171a386900931ae1c59853235a3fc2cbe3bc05
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
In an ONFI compliant devices, the flash parameters are calculated
by reading the onfi parameter page of the device.
Existing flash density is calculated based on a single logical
unit(LUN). This shows wrong density information on Multi LUN flashes.
So, always use number of LUNS value in flash density calculations.
Change-Id: Idba4d4e129e7fdcdab1e509bd8c3149f26fc11f2
Signed-off-by: Pradeep P V K <ppvk@codeaurora.org>
Commit 3a1bd738ef ("dma-mapping-fast: Do not clobber existing atomic
pool") included the genalloc.h header file in the dma-mapping.h header
file.
Including genalloc.h in dma-mapping.h expands the definition of the
gen_pool structure for all files that include dma-mapping.h.
This can cause a different CRC value to be generated for an exported
function symbol, if the function parameters or any of their descendant
members contain genpool structures, as the genpool structures may have
been previously forward declared, but now they are fully defined.
Remove the inclusion of genalloc.h in dma-mapping.h to fix this.
Change-Id: I83a3fad284649b91372168d845f30d9302f75c1d
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Enable SD/eMMC card driver as a inbuilt module for sdxlemur target.
Also Enabled the required Block layer configs.
Change-Id: Ide938308ae659cbe558af341dd8697cab3b987d5
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Current task in OOM path could be holding enough memory
that is not reapable by oom reaper. Fail the allocation
and let the task exit before triggering OOM.
Change-Id: Ie00911548c5b16a430767f0b60761d839fc43f78
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
Currently driver allocating RX buffer once in port open and use the
same buffer for each RX transfer. This buffer is not cleared in driver.
In some scenarios when SW got DMA_DONE interrupt and the RX buffer we are
still seeing the previously completed RX data in DDR buffer. DMA_DONE from
HW doesn't confirm that the DATA is copied to DDR, sometimes we are queuing
the stale data from previous transfer to tty flip_buffer.
This change is to memset RX buffer to zero after tty_flip_buffer_push
so that memset change will easily help us to identify suck scenarios.
Change-Id: If14bdf0377cd6764280f515b1b8e67f5629e32ce
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
With GCOV enabled, LLVM generates calls to compiler-generated
__llvm_gcov_* functions, but doesn't add them to the CFI jump
table, which trips indirect call checking. Work around the issue
by disabling CFI when GCOV_KERNEL is enabled.
Bug: 169124292
Change-Id: Ifd60cd9eda2bcdd86838ac5ce41bb0dbc00d602f
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
(cherry picked from commit 93a4197bc23a4a6967ff0592d07f3cf4cd69b1d6)
The QMI TS get sensor list supports maximum 32 sensors. But there
are targets that support more than 32 QMI TS sensors. To add more
sensors support as well as to make sure backward compatibility with
legacy sensor list, add new optional extended sensor list variable
in QMI TS interface. The first 32 sensors will be filled in legacy
sensor list variable and all other sensors will be filled with new
extended sensor list variable.
Add support to qmi sensor driver to get extended sensor list if any.
Change-Id: If31f0caf9a0a8a0639315d4b01f7d526e47e5c1b
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
The haptics module supports writing FIFO samples using 4-byte burst
mode as well as 1-byte mode. During FIFO refilling, if a 1-byte write
was used, then the hardware would fill zeros automatically after that
to keep the FIFO data 4-byte aligned. When this happened in the middle
of playing, the hardware inserted 0 values would cause spurs on the
haptics output. To fix this, only use 4-byte burst writes during FIFO
refilling until the end of the play.
Change-Id: I0441942585e0e0d5da62ec4a7123b2763b292739
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
