Commit graph

886,744 commits

Author SHA1 Message Date
Pratham Pratap
6767f19da8 usb: gadget: f_midi: Avoid invalid pointer access
Currently f_midi function driver is marking the f_midi->card
NULL when the card is unregistered. There is a possibility that
alsa_show is called after the card is unregistered which can lead
to page fault since midi->card is assigned to rmidi->card. Avoid
this by adding midi->card pointer check in alsa_show.

Change-Id: I24fd35fb9cd35fcd5d8698b808459310b09675f9
Signed-off-by: Pratham Pratap <prathampratap@codeaurora.org>
2020-07-20 21:04:16 -07:00
qctecmdr
1ff72e6864 Merge "firmware: scm: Remove arch check for dma_set_mask" 2020-07-20 12:16:06 -07:00
qctecmdr
a7d4628040 Merge "soc: qcom: rpmh-rsc: Set suppress_bind_attrs flag" 2020-07-20 12:16:05 -07:00
qctecmdr
dde87f7fae Merge "interconnect: qcom: Add SDC1 master for Shima" 2020-07-20 12:16:05 -07:00
qctecmdr
85f242f759 Merge "arm64: defconfig: Add support for DISPCC, debugCC for SHIMA" 2020-07-20 08:45:51 -07:00
qctecmdr
67cb4fbaf4 Merge "clk: qcom: Add support for pm ops for Multimedia clock controllers" 2020-07-20 08:45:50 -07:00
qctecmdr
ec92655704 Merge "scsi: ufs: Clear uic_cmd->cmd_active before calling complete()" 2020-07-20 08:45:50 -07:00
qctecmdr
a539b642f4 Merge "qseecom: Change in buffer sharing mechanism in qseecom" 2020-07-20 08:45:50 -07:00
qctecmdr
b2198c494f Merge "drivers: qcom: stats: define readq_relaxed for ARM variants" 2020-07-20 08:45:49 -07:00
qctecmdr
b83f0c9796 Merge "clk: qcom: debugcc: Add debug clock controller support for SHIMA" 2020-07-20 03:11:40 -07:00
qctecmdr
a6ceb8782b Merge "clk: qcom: Update GCC/GPUCC code for HOLI" 2020-07-20 03:11:39 -07:00
qctecmdr
7aa09639a4 Merge "defconfig: lahaina: Fix INTERCONNECT_TEST being disabled for QGKI" 2020-07-20 03:11:39 -07:00
qctecmdr
97f35d5f2d Merge "pinctrl: qcom: Update pinctrl for HOLI soc" 2020-07-20 03:11:39 -07:00
qctecmdr
0e975c6686 Merge "input: touchscreen: synaptics_tcm: add new touch driver" 2020-07-20 00:21:23 -07:00
qctecmdr
97913a8a95 Merge "icc: dt-bindings: Update endpoint IDs for interconnects for HOLI" 2020-07-20 00:21:23 -07:00
qctecmdr
7cb2052d4a Merge "ufs: ufs-qcom: Fix racing caused by ufs_qcom_testbus_config()" 2020-07-19 21:01:11 -07:00
qctecmdr
08dcb823ac Merge "sound: usb: qmi: Move QMI service init to driver probe" 2020-07-19 21:01:11 -07:00
qctecmdr
54a634f9d4 Merge "ABI: Update internal whitelist with hyp assign" 2020-07-19 21:01:11 -07:00
qctecmdr
90bec1c521 Merge "coresight-tmc: Use sysfs_buf for byte-cntr and sw usb cases" 2020-07-19 21:01:10 -07:00
qctecmdr
c5289e457d Merge "dt-bindings: clock: Update clock ID's of GPUCC and DISPCC for SHIMA" 2020-07-19 21:01:10 -07:00
Odelu Kukatla
649dce9082 interconnect: qcom: Add SDC1 master for Shima
Add SDC1 master port as it is for client to request
the bandwidth.

Change-Id: Ib459a6f156df05f088c0ec5a58b6dbb73cb39a5f
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-07-18 09:19:36 -07:00
Odelu Kukatla
439afcdc16 icc: dt-bindings: Add SDC1 master ID for Shima
Add SDC1 master ID as it is for client to request
the bandwidth.

Change-Id: I2be2c4866a64a1a2ade2299d7d9b78f4e2d85933
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-07-18 21:18:12 +05:30
Jagadeesh Kona
27c20c3a1c arm64: defconfig: Add support for DISPCC, debugCC for SHIMA
Enable Display and debug clock controllers for SHIMA.

Change-Id: I69b8e770c8f286d32f6ebfd876284bf52a74c380
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-07-18 06:00:08 -07:00
Jagadeesh Kona
577b5c7e15 clk: qcom: debugcc: Add debug clock controller support for SHIMA
Add debug clock controller to support measure functionality for all
clock controllers.

Change-Id: I4fde3ad197220264329126ca788aa70a7c75bcb7
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-07-18 06:00:00 -07:00
Jagadeesh Kona
dcc0bc3e74 clk: qcom: dispcc: Add display clock controller for SHIMA
Add the display clock controller to support display port
related branches, PLLs and RCGs.

Change-Id: I3f366c3880823199ed4cd34bb9e608baf804e1bc
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-07-18 18:29:09 +05:30
Mao Jinlong
1ebe55d92e coresight-tmc: Use sysfs_buf for byte-cntr and sw usb cases
Etr_buf will be NULL when disable etr hw. It is before stopping byte-cntr
and sw usb data transfer which may cause null pointer issue. Use sysfs_buf
to avoid this issue.

Change-Id: I5967fd4183a9f36fca22059bb08fd8d357c8e5af
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
2020-07-18 14:11:35 +08:00
Jagadeesh Kona
97f4757fee clk: qcom: Add support for pm ops for Multimedia clock controllers
Add support for pm ops for Camera, Graphics and Video clock
controllers.

Change-Id: Ic9c01a35385a8c24899b66c9652810135bc42ac7
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-07-17 20:27:12 -07:00
Jagadeesh Kona
83b7c09872 ABI: Add pm_clk* symbols to qcom whitelist
Add pm_clk_add, pm_clk_create, pm_clk_destroy, pm_clk_resume,
pm_clk_suspend symbols to qcom whitelist.

Change-Id: I166bdc86bba786161d2148b7a63d2f6f75777694
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-07-18 08:54:18 +05:30
Jack Pham
8f354a41fe sound: usb: qmi: Move QMI service init to driver probe
When registering the QMI server during initialization there is
a chance that the handle creation can fail with -EPROBE_DEFER if
the IPC router service isn't ready yet. In that case, we should
not fail the module_init call as that results in the module
getting unloaded with no automatic mechanism to reload it (a la
driver probe deferral). Instead, move the uaudio_qmi_svc_init()
call to beginning of uaudio_qmi_plat_probe() so that in case it
defers the probe can be retried again later.

Change-Id: I07a1e2cee5194387884cb716e95ed7c414a22159
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2020-07-17 12:09:08 -07:00
Mukesh Ojha
f9fde8988f interconnect: qcom: Compile Shima interconnect provider driver
Add the shima driver file compilation on INTERCONNECT_QCOM_SHIMA
config.

Change-Id: I2148f176f6c2a8b2232df790391e54a819302b48
Signed-off-by: Mukesh Ojha <mojha@codeaurora.org>
2020-07-17 11:07:56 -07:00
Kunlei Zhang
5a61ae90da ABI: Update internal whitelist with hyp assign
Update internal whitelist with hyp assign.

Change-Id: I89bf58600a53ea8cdb8b6aa4c5f87ed4b35421b9
Signed-off-by: Kunlei Zhang <kunleiz@codeaurora.org>
2020-07-17 23:17:35 +08:00
Anmolpreet Kaur
7b0010980f qseecom: Change in buffer sharing mechanism in qseecom
Copy the entire userspace request buffer to local kernel
buffer and use that to send to TZ. Update the response
received in the local buffer to the actual userspace buffer
after the request is complete.

Change-Id: I673d74a32966816c5248778fc967eb91da5b6df5
Signed-off-by: Anmolpreet Kaur <anmolpre@codeaurora.org>
2020-07-17 05:36:13 -07:00
Lina Iyer
eb798d82d2 firmware: scm: Remove arch check for dma_set_mask
Remove the preprocessor if statement for checking the arch of the
target since this will not affect targets with a 32bit address space. This
change allows the driver to be compiled and used for targets that do not
define CONFIG_ARM64.

Change-Id: I6fc11e86d6799099fdaeec46df6d7093c1ca117f
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org>
2020-07-17 17:34:33 +05:30
Lina Iyer
963b168fc2 cpuidle: lpm-levels: no hotplug for single core
Register for hotplug and dev_pm_qos notification only
for SMP so covering under CONFIG_SMP flag.

Change-Id: Ic3da9648a4dd5c762cd97dbb9f1915f79bd2481e
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
2020-07-17 17:33:27 +05:30
Lina Iyer
6757e16bd0 drivers: qcom: rpmh: allow RPMH on ARM SoC
Remove config restriction for RPMH on ARM64 platforms
only.

Change-Id: Id783ad288098e09294eefbff2982af5670c3ab54
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
2020-07-17 17:31:41 +05:30
Lina Iyer
e5fb789453 drivers: irqchip: pdc: Add irqchip for sdxlemur
Declare PDC irqchip support for sdxlemur.

Change-Id: I2ac3f67b71cc092024ea8a3d13e31571cd2bc898
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
2020-07-17 17:30:08 +05:30
Lina Iyer
8d6b711a9f drivers: qcom: stats: define readq_relaxed for ARM variants
ARM cannot natively read 64-bit address. As such the readq_ variants
are not defined for this architecture. Add a 32-bit equivalent to read 2
sequential 4-byte memory into a u64 value. Let's keep them locally
defined for now, since they are not native to the ARM architecture.

Change-Id: Ib0ce08c3b8a37af85c12c2ad72803bf871847f67
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
2020-07-17 17:27:27 +05:30
Saurabh Sahu
ab5f1435fc clk: qcom: Update GCC/GPUCC code for HOLI
Update the gpll configuration values for GCC and GPUCC
and halt check for camera and video ahb clks for GCC
in HOLI.

Change-Id: I637b05f0ecc877a2d83990532b34462de28069de
Signed-off-by: Saurabh Sahu <sausah@codeaurora.org>
2020-07-17 16:57:00 +05:30
Odelu Kukatla
acee14b604 icc: dt-bindings: Update endpoint IDs for interconnects for HOLI
Update the master and slave ID constants for Holi interconnect
providers which consumers can use to set bandwidth constraints
and find paths in the NoC (Network-On-Chip) topology.

Change-Id: I45b73970484220af09d9ab55062da197038a82cd
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-07-17 02:29:37 -07:00
Can Guo
820e10e820 scsi: ufs: Clear uic_cmd->cmd_active before calling complete()
Previously, uic_cmd->cmd_active is cleared after completion has been raised
so that we can tell completion timeout happened due to kernel scheduling,
which is for debugging purposes. It is more important, however, to increase
the chance that UIC cmd survives from a completion timeout. So, this change
clears uic_cmd->cmd_active before calling complete().

Change-Id: I99254ac4e3b16dc6b905b5ed5248d53f9c9fc3af
Signed-off-by: Can Guo <cang@codeaurora.org>
2020-07-17 16:39:43 +08:00
Maulik Shah
d9b2c33c11 soc: qcom: rpmh-rsc: Set suppress_bind_attrs flag
rpmh-rsc driver is fairly core to system and should not be removable
once its probed. However it allows to unbind driver from sysfs using
below command which results into a crash on sc7180.

echo 18200000.rsc > /sys/bus/platform/drivers/rpmh/unbind

Lets prevent unbind at runtime by setting suppress_bind_attrs flag.

Change-Id: I7a8679dd4d8f3118b4f1d091f8d42ca1fde9b8f0
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1592808805-2437-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-17 11:37:51 +05:30
qctecmdr
1c0ece4496 Merge "msm: kgsl: Add GPUCC register dumps to A6xx GPU snapshot" 2020-07-16 03:13:59 -07:00
qctecmdr
5ffc3e2da4 Merge "mmc: core: Add at least 3 mclk cycle delay before next command after ACMD41" 2020-07-16 03:13:59 -07:00
qctecmdr
7dda60b9e7 Merge "soc: qcom: pil: Handle uninitialized 'ret'" 2020-07-15 20:47:42 -07:00
qctecmdr
d1a6708ff7 Merge "msm: kgsl: Wait for active count when last kgsl instance is closed" 2020-07-15 20:47:42 -07:00
qctecmdr
53e710e089 Merge "net: qrtr: haven: Add doorbell retry for secondary" 2020-07-15 20:47:41 -07:00
Jagadeesh Kona
de7666473c dt-bindings: clock: Update clock ID's of GPUCC and DISPCC for SHIMA
Remove support for GPUCC CX APB clock and DISPCC crypto clocks.

Change-Id: I6156a19b4113543ce4d8987004aa800957a33e34
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-07-16 08:06:53 +05:30
qctecmdr
bfcf7c9bd4 Merge "mhi: cntrl: qcom: Add support for fatal error processing" 2020-07-15 18:03:33 -07:00
qctecmdr
2fc1d24fc1 Merge "msm: kgsl: Update preemption keepalive on a660" 2020-07-15 18:03:33 -07:00
qctecmdr
dd7b6315a9 Merge "msm: kgsl: Add support to configure bus dcvs sampling interval" 2020-07-15 18:03:33 -07:00