Commit graph

4,604 commits

Author SHA1 Message Date
Tony Truong
7f4bcfef39 ARM: dts: msm: add PCIe pipe clk mux and ext src to PCIe clock for lahaina
PCIe needs to switch between XO and pcie_*_pipe_clk based on
LPM state. Add the clocks to support this on lahaina.

Change-Id: I44efe4752d5a9d93a7fff5809b272fa4b6146f14
2020-02-03 09:18:48 -08:00
Tony Truong
60f5940600 ARM: dts: msm: add aggre_noc_pcie_*_axi_clk for PCIe on lahaina
Add aggre_noc_pcie_0_axi_clk and aggre_noc_pcie_1_axi_clk for
the corresponding PCIe devicetree node on lahaina.

Change-Id: Ic5940f38b83b54aeb77d310b144a75e15c72b74f
2020-02-03 09:18:44 -08:00
Abir Ghosh
79b14699af ARM: dts: msm: Add dtsi changes for qbt_handler
Add dtsi changes for fingerprint driver.

Change-Id: I739901b9c1d3b331e044b6841782d2959bc89a0c
2020-02-03 14:56:39 +05:30
Abir Ghosh
4d9d892407 dt-bindings: Add documentation for qbt_handler
Add dt-bindings for fingerprint driver.

Change-Id: I48715fed62645c97b8cdbd8b20846393d42242b0
2020-02-03 14:56:29 +05:30
Ajay Prathi
3f51879035 ARM: dts: msm: Add TSENS thermal nodes for lahaina
Include user thermal zone configurations
for temperature sensors in Lahaina.

Change-Id: Iee5d956f926caa84d9cf9dc76b0476365e9b583e
2020-02-03 11:32:06 +05:30
qctecmdr
d03820b8f6 Merge "ARM: dts: msm: Disable watchdog for Lahaina-RUMI" 2020-02-02 17:26:40 -08:00
qctecmdr
f44b1b4db1 Merge "ARM: dts: msm: Do not create logical mappings for the secure CDSP heap" 2020-02-01 21:26:28 -08:00
David Collins
0d9d1080f2 ARM: dts: qcom: change all rpmh-regulator LDO default modes to HPM
Change the initial mode of all rpmh-regulator LDO devices from
low power mode (LPM) to high/normal power mode (HPM).  This
avoids problems during boot up if a consumer requests a voltage
before requesting a load current as this will result in the
LDO regulator being switched to LPM.  A subsequent load current
request will switch it to HPM.  However, if the LDO was enabled
and sourcing more current than the LPM limit, then this brief
period can cause the voltage to drop out and lead to hardware
faults.

Change-Id: Ibecd9c439a6b382642a6131eecb92c2a50f64a05
2020-01-31 16:57:32 -08:00
qctecmdr
66bb91ca95 Merge "dt-bindings: input: qcom-hv-haptics: Add initial binding document" 2020-01-31 16:56:06 -08:00
qctecmdr
fe5692f1c8 Merge "ARM: dts: msm: Specify address/size cells for &soc on lahaina-rumi" 2020-01-31 16:56:05 -08:00
qctecmdr
46239aacf8 Merge "ARM: dts: msm: Add interconnects to USB on Lahaina" 2020-01-31 16:56:05 -08:00
Isaac J. Manjarres
38156f438c ARM: dts: msm: Do not create logical mappings for the secure CDSP heap
Creating logical mappings for the secure CDSP heap memory may
cause problems with respect to speculative access, so ensure
that no logical kernel mappings are created for that region.

Change-Id: I56c23e82c1a4ba52322aa0f5a2045e482a8586ff
2020-01-31 13:53:07 -08:00
Raghavendra Rao Ananta
a542936ef7 ARM: dts: msm: Disable watchdog for Lahaina-RUMI
As the emulation platform is very slow, we may encounter watchdog
barks/bites very often. Hence, explicitly disable the device-tree
node for the watchdog driver for this platform.

Change-Id: I11e48439370efdd27c2c6cee6798fe0d22e2bd7d
2020-01-31 10:39:33 -08:00
Raghavendra Rao Ananta
11877cd88d ARM: dts: msm: Update the arch_timer frequency
Update the arch_timer frequency to 19.2 MHz, now that the device
boots up on a real hardware (instead of an emulation platform).
Leave the 96KHz still intact for emulation platforms.

Change-Id: I3745395b88d8aa9d1b0047b4eca7c85db4ec7a13
2020-01-31 10:39:33 -08:00
qctecmdr
40cf535cc0 Merge "ARM: dts: msm: Fix USB PHY resets" 2020-01-31 10:27:17 -08:00
qctecmdr
cc7e741fc8 Merge "ARM: dts: msm: Add alias for HSUART node" 2020-01-31 10:27:17 -08:00
qctecmdr
29348badb7 Merge "bindings: pinctrl: Add device-tree bindings for Lahaina pinctrl driver" 2020-01-31 04:38:34 -08:00
qctecmdr
0141f892dd Merge "ARM: dts: msm: vidc: Add register value mask" 2020-01-30 23:05:03 -08:00
qctecmdr
f5febf26bd Merge "ARM: dts: msm: Include ipcc_test dtsi file in lahaina.dtsi file" 2020-01-30 23:05:03 -08:00
Jack Pham
cecd0dc415 ARM: dts: msm: Specify address/size cells for &soc on lahaina-rumi
When lahaina-rumi is compiled as a separate overlay, it does
not explicitly include the definition of the &soc node. Without
the #address-cells and #size-cells specifiers, the compiler uses
default values of 2 and 1, respectively, which results in the
following warnings when compiling lahaina-rumi-overlay.dtb:

  Warning (reg_format): "reg" property in
/fragment@15/__overlay__/usb_emu_phy@a720000 has invalid length (8
bytes) (#address-cells == 2, #size-cells == 1) Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/fragment@15/__overlay__/usb_emu_phy@a720000
  Warning (avoid_default_addr_size): Relying on default #size-cells
value for /fragment@15/__overlay__/usb_emu_phy@a720000

As the &soc node is referenced here only for the purpose of adding
a new child node, usb_emu_phy, address the warnings by explicitly
defining the {address,size}-cells values.

Change-Id: I8b5ebcd53c060eeea3c55bf9fb8e55093e7862f2
2020-01-30 22:45:35 -08:00
Fenglin Wu
11444a63a7 dt-bindings: input: qcom-hv-haptics: Add initial binding document
Qualcomm Technologies, Inc. (QTI) High Voltage (HV) PMIC haptics
modules can support up to 10 V voltage to drive either ERM or LRA.
It has an integrated module to support auto resonance detection
and correction for LRA actuator. It can play different vibration
effects with different pattern sources. It also has an integrated
brake module which can work in different modes to use BEMF for
quick vibration stop.

Change-Id: Id8b9fa1e4eefc7dda325e25728e59af9c1de9049
2020-01-30 18:00:40 -08:00
Akshay Chandrashekhar Kalghatgi
2036e44c56 ARM: dts: msm: Add secure display heap
Add a secure display heap of size 164 MB for carveout memory
required to support 3 concurrent secure Video sessions.

Change-Id: I5d88df171370e7f3cc9ad723db1d2736e1bf614f
2020-01-30 16:50:20 -08:00
qctecmdr
9f1823dd32 Merge "ARM: dts: msm: Add device tree overlay for Lahaina CDP" 2020-01-30 16:12:58 -08:00
qctecmdr
af651c731b Merge "ARM: dts: msm: Enable dcc on lahaina" 2020-01-30 16:12:58 -08:00
qctecmdr
316cc15084 Merge "ARM: dts: msm: add qcom,fastrpc-gids property on Lahaina" 2020-01-30 16:12:58 -08:00
Mukesh Kumar Savaliya
65bf412b4e ARM: dts: msm: Add alias for HSUART node
This change is to create required node for HSUART.

Change-Id: I25353149cab2d691869f286ed4768222df08e9c5
2020-01-31 03:38:50 +05:30
qctecmdr
39118d2eba Merge "dt-bindings: regulator: add rpmh-regulator bindings" 2020-01-30 10:09:44 -08:00
qctecmdr
921514b98b Merge "dt-bindings: usb: Document interconnects usage for qcom,dwc-usb3-msm" 2020-01-29 20:50:44 -08:00
qctecmdr
cd512b2648 Merge "bindings: qti-flash: Fix slave id for pm8350c in DT example" 2020-01-29 15:32:56 -08:00
David Collins
ebd2d10ede ARM: dts: qcom: switch to I2C control of PM8008 PMIC regulators for Lahaina
Add support for managing the PM8008I and PM8008J chips via I2C.
Replace the stub-regulator device nodes for these PMICs with
subnodes inside of the respective I2C devices.  This ensures
that consumers are able to modify the physical state of these
PMIC regulators.

Change-Id: Ieb4976ecd8818c7515c2fbf61c754518215fd5bd
2020-01-29 15:26:03 -08:00
Prakruthi Deepak Heragu
91e60e3146 ARM: dts: msm: Include ipcc_test dtsi file in lahaina.dtsi file
Include the ipcc_test.dtsi file in the main lahaina.dtsi file to probe
ipcc test driver.

Change-Id: Ib88eb0af26dd0d604ffa2df40ff5cfb4b3f4ce04
2020-01-29 13:53:47 -08:00
Akshay Chandrashekhar Kalghatgi
5a8e0343b8 ARM: dts: msm: vidc: Add register value mask
Add a register value mask which will specify which bits of the register
will be updated with the value. For instance, if mask is 0x11, then
only bit 0 & bit 4 will be updated with the corresponding bits of the
specified value.

Change-Id: I27471c3afee72ac99f955030ab2100f3685d46d9
2020-01-29 13:43:42 -08:00
Asutosh Das
e2fa537812 ARM: dts: msm: Fix ufs OCS error
OCS errors are seen due to a SMMU config mismatch
between bootloader and hlos.
Bootloader enables IO-coherency for SMMU, but hlos
has not marked the ufs device as coherent.

This causes MISMATCH_DATA_BUFFER_SIZE error.

Fix this by marking UFS device as coherent.

Change-Id: I852394aaf549652e13886210422111060a626b12
2020-01-29 11:36:30 -08:00
Jack Pham
0b2074ce23 ARM: dts: msm: Fix USB PHY resets
The HS and SS PHY devices were pointing to the wrong reset instances.

Change-Id: I40a4764b5dc694aed85a506d5cb942f90cc480ab
2020-01-28 22:13:51 -08:00
Jack Pham
eec5318ae8 ARM: dts: msm: Add interconnects to USB on Lahaina
Specify the interconnect paths for the USB devices on Lahaina.

Change-Id: Ic2cdb7e2f143ba73f01e48aa57972cbc98f4ff7e
2020-01-28 13:11:55 -08:00
Jack Pham
9298ca5e12 dt-bindings: usb: Document interconnects usage for qcom,dwc-usb3-msm
Document usage of interconnects and interconnect-names properties
for the USB controller node. This replaces the now obsolete msm_bus
bindings.

Change-Id: I4a1a2cd6a115584986bba28ba121d3fbea7cb409
2020-01-28 13:11:55 -08:00
qctecmdr
91ceb262c3 Merge "ARM: dts: msm: add a CX, MX and MMCX Turbo level proxy request for Lahaina" 2020-01-28 08:04:50 -08:00
Shyam Kumar Thella
3a8cbb10af bindings: qti-flash: Fix slave id for pm8350c in DT example
Correct pm8350c slave ID in DT example for flash led device.

Change-Id: Ie2cc2f3b10802470a9507bc0d2821b2106f4a1b3
2020-01-28 17:12:52 +05:30
qctecmdr
f051f1e1a2 Merge "bindings: soc: qcom: add QTI battery glink debug" 2020-01-28 02:41:31 -08:00
qctecmdr
84f0ea8797 Merge "ARM: dts: msm: Add regulator entries for Lahaina" 2020-01-27 20:20:59 -08:00
qctecmdr
a73e4582e6 Merge "ARM: dts: msm: add proxy consumers for L5B and L6B regulators on Lahaina" 2020-01-27 13:53:29 -08:00
qctecmdr
ae17478d3b Merge "bindings: power: supply: add QTI battery charger" 2020-01-27 13:53:29 -08:00
qctecmdr
8e166c620f Merge "dt-bindings: add documentation for leds-qti-flash" 2020-01-27 13:53:29 -08:00
Shyam Kumar Thella
51087911ef dt-bindings: Add snapshot of QPNP AMOLED regulator bindings
Add bindings for QPNP AMOLED regulator which is used to configure
triple power supply for amoled displays.

Change-Id: I28b5dcbfa288884b97260bdc5204bce455f97ce1
2020-01-27 15:14:59 +05:30
qctecmdr
c167c97bfa Merge "ARM: dts: msm: add display sde nodes to target dtsi" 2020-01-26 04:10:12 -08:00
qctecmdr
060c0923ef Merge "ARM: dts: msm: Update supply routing for swr dmic on Lahaina" 2020-01-25 16:33:53 -08:00
Subbaraman Narayanamurthy
64fb31c188 bindings: soc: qcom: add QTI battery glink debug
QTI battery glink debug device helps to get logs and debug
information by communicating with charger firmware running on the
remote subsystem (e.g. DSP) over PMIC Glink.

Change-Id: I3a894b40bbbb67dbe26ad683cfabe330bf7e3d69
2020-01-24 19:47:21 -08:00
Guru Das Srinagesh
f3e448268b ARM: dts: msm: Add PWM and RGB LED devices for PM8350C
Add PWM and LED devices on PM8350C that are needed for Lahaina
platforms.

Change-Id: I30399e8ec2da2fc8cd5553c96e3caf571536df91
2020-01-24 18:35:25 -08:00
qctecmdr
96fb88bca1 Merge "ARM: dts: msm: Add and enable disp rsc support for Lahaina" 2020-01-24 17:58:34 -08:00
qctecmdr
0ddead96b3 Merge "dt-bindings: regulator: pm8008-regulator: add OCP interrupt support" 2020-01-24 17:58:34 -08:00