Commit graph

893,267 commits

Author SHA1 Message Date
Jagadeesh Kona
8b82fcc32c clk: qcom: dispcc: Add display clock controller for YUPIK
Add the display clock controller to support display port
related branches, PLLs and RCGs.

Change-Id: I3b9c15e1eab364250300d1ff9121285a044ced2e
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2021-01-07 01:00:45 +05:30
qctecmdr
4afb66961f Merge "spi: spi-msm-geni: Configure DFS index and clk before doing set rate" 2021-01-05 10:50:55 -08:00
qctecmdr
08dc7ff311 Merge "spi: spi-msm-geni: Calculate transfer timeout dynamically" 2021-01-05 10:50:54 -08:00
qctecmdr
14d5ad2a5e Merge "arm: vdso: Fix GENERIC_GETTIMEOFDAY dependencies" 2021-01-05 10:50:54 -08:00
qctecmdr
50694617b0 Merge "scsi: ufs: Increase the PA_HIBERN8TIME on the host" 2021-01-05 10:50:53 -08:00
qctecmdr
77aca605c0 Merge "clk: qcom: gcc: Add support for GCC clock Driver for sdxnightjar" 2021-01-05 10:50:53 -08:00
qctecmdr
a704da9e6e Merge "clk: qcom: cpu: Re-org CPU clock driver for SDXLemur" 2021-01-05 10:50:52 -08:00
qctecmdr
1975f8264d Merge "cnss2: skip pci link recovery for EACCES error" 2021-01-05 06:05:14 -08:00
qctecmdr
901012883c Merge "arm64: defconfig: explicitly SLIMBUS_MSM_NGD as m" 2021-01-05 06:05:13 -08:00
qctecmdr
82ffd15f1b Merge "arm64: Kconfig: Add config option for SA6155" 2021-01-05 06:05:13 -08:00
qctecmdr
5d3347b4b6 Merge "firmware: qcom_scm: Check for NULL before dereferencing __scm" 2021-01-05 00:35:26 -08:00
qctecmdr
b8aa4abaea Merge "mmc: core: Retry claim host in mmc_sd_detect" 2021-01-05 00:35:25 -08:00
qctecmdr
bf525affe2 Merge "input: touchscreen: focaltech: Block resume work on PVM" 2021-01-05 00:35:25 -08:00
qctecmdr
a92909e0b4 Merge "input: touchscreen: st: Block resume work on PVM" 2021-01-05 00:35:25 -08:00
qctecmdr
9c5eac7747 Merge "coresight: Add snapshot of Coresight Dbgui driver" 2021-01-05 00:35:24 -08:00
qctecmdr
d84c33524e Merge "arm64: defconfig: Enable LLCC driver" 2021-01-05 00:35:24 -08:00
qctecmdr
39b1e4e2e5 Merge "asoc: Update supported rate and format for dummy dai" 2021-01-05 00:35:24 -08:00
qctecmdr
7bd2a2072a Merge "usb: gadget: composite: Add spinlock protection for usb string descriptor" 2021-01-05 00:35:23 -08:00
Raghavendra Rao Ananta
c75011c99d arm: vdso: Fix GENERIC_GETTIMEOFDAY dependencies
GENERIC_GETTIMEOFDAY can be enabled only if HAVE_GENERIC_VDSO
is enabled. However, HAVE_ARM_ARCH_TIMER selects it unconditionally,
thus throwing the following warning:

WARNING: unmet direct dependencies detected for GENERIC_GETTIMEOFDAY
Depends on [n]: HAVE_GENERIC_VDSO [=n]
Selected by [y]:
- HAVE_ARM_ARCH_TIMER [=y] && CPU_V7 [=y]

Fix this by selecting GENERIC_GETTIMEOFDAY conditionally in
HAVE_ARM_ARCH_TIMER as well.

Also, handle this conditional dependency in all the references.

Change-Id: Iccb154ad4c0f49857115372334e49504f31a8380
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2021-01-04 12:57:15 -08:00
Ashok Vuyyuru
cceceac1d8 firmware: qcom_scm: Check for NULL before dereferencing __scm
The function qcom_scm_mem_protect_region_id dereferences __scm without
checking for NULL and could potentially lead to a NULL pointer exception.
This scenario can happen if the clinet calls qcom_scm_mem_protect_region_id
before qcom_scm driver is even probed. Hence, check for NULL before
dereferencing it.

Change-Id: I1a9eba6d45ba8ebf73da80bca984b4dfad05042e
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-01-04 20:56:54 +05:30
Neeraj Upadhyay
87fa6c04a8 arm64: defconfig: Enable LLCC driver
Enable the Last Level Cache Controller (LLCC) driver for Yupik.

Change-Id: I31723ec8588d398d22d0fbcf69ca0425dbb423f6
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
2021-01-04 18:07:21 +05:30
Ziqi Chen
06efe84d5f scsi: ufs: Increase the PA_HIBERN8TIME on the host
The device advertises PA_HIBERN8TIME may not be enough for some UFS
devices. To workaround this issue, host should add more 100 us.

The commit 8941234ea1 ("scsi: ufs: Add UFS_DEVICE_QUIRK_PA_HIBER8TIME
quirk") just increase PA_HIBERN8TIME base on TX_HIBERN8TIME_CAPABILITY,
we should increase PA_HIBERN8TIME directly because the
RX_HIBERN8TIME_CAPABILITY may be more than TX_HIBERN8TIME_CAPABILITY.

Change-Id: If5e28e11a656df999fc50014e65bc89498b28499
Signed-off-by: Ziqi Chen <ziqichen@codeaurora.org>
2021-01-04 17:33:58 +08:00
Yuanfang Zhang
57e094d312 coresight: Add snapshot of Coresight Dbgui driver
Add snapshot for coresight Dbgui driver from msm-3.18
commit cf126d1be1a("ANDROID: sdcardfs: Add option to
not link obb"). Make necessary change to adopt coresight
framework change.

Change-Id: I3cf911f20b79f88cbc6482304fd6f43989aa881a
Signed-off-by: Yuanfang Zhang <zhangyuanfang@codeaurora.org>
2021-01-04 16:01:48 +08:00
Rakesh Kota
3b29f87982 clk: qcom: gcc: Add support for GCC clock Driver for sdxnightjar
Add MSS_Q6_BIMC_AXI and MSS_CFG_AHB clocks to GCC for peripheral
clock clients to be able to request for the clocks. While at it, also
add support for debug clock controller to measure frequency of clocks.

Change-Id: Iefdd56797632c317c8ae31c277380622726a9c7c
Signed-off-by: Rakesh Kota <kotarake@codeaurora.org>
2021-01-04 11:35:43 +05:30
Mohammed Siddiq
f64b19b7c5 cnss2: skip pci link recovery for EACCES error
Skip pci link recovery for EACCES error returned
from msm_pcie_prevent_l1. Do link recovery only
if the error is EIO.

Change-Id: I037a729e282e22e8c7174f83c61a58fa0faad579
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
2021-01-03 21:06:16 -08:00
Shashank Babu Chinta Venkata
71f19c2d0f input: touchscreen: st: Block resume work on PVM
While trusted touch is underway, block resume work
to flush touch FIFO since ownership of register space
is with Trusted VM. Additionally add extra regulator
vote before starting TUI.

Change-Id: I50e94400e467194b5caf615bdbd0d2f4d8630a96
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2021-01-04 10:33:36 +05:30
Ritesh Kumar
ddce185d77 input: touchscreen: focaltech: Block resume work on PVM
While trusted touch is underway, block resume work
to flush touch FIFO since ownership of register space
is with Trusted VM.

Change-Id: Ibcd7274c560ddc9eae4eb9218198ab5039acdc18
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-01-04 10:16:41 +05:30
qctecmdr
5f5ad727a8 Merge "qseecom: Added boundary checks between two subsequent fields" 2021-01-03 17:29:48 -08:00
qctecmdr
787ab105df Merge "interconnect: qcom: Add interconnect stub provider driver for MONACO" 2021-01-02 23:03:24 -08:00
Nitin LNU
d31677846c qseecom: Added boundary checks between two subsequent fields
Checking if there is enough room in between the offset of the
two subsequent field so that data of field 2 will not overlap
the data of field 1.

Change-Id: I96f656bb25878a302e7de109dd8f981045ed52e7
Signed-off-by: Nitin LNU <nlakra@codeaurora.org>
2021-01-03 11:40:16 +05:30
qctecmdr
3d0000932d Merge "leds: qpnp-flash-v2: Fix out-of-bound array access" 2021-01-02 10:22:53 -08:00
qctecmdr
a304838842 Merge "pinctrl: qcom: Add GPIO to PDC wakeirq map for sdmshrike" 2021-01-02 01:03:50 -08:00
qctecmdr
cda63c9989 Merge "clk: qcom: Remove measure support for unregistered clocks in Lahaina" 2021-01-01 22:21:01 -08:00
qctecmdr
694f449bf2 Merge "defconfig : Enabling NET and NF configs" 2021-01-01 04:41:58 -08:00
qctecmdr
4f20029327 Merge "usb: xhci: Increase xhci halt timeout" 2020-12-31 21:57:35 -08:00
qctecmdr
3f83f41dfe Merge "clk: qcom: debugcc-shima: Remove measure support for unregistered clocks" 2020-12-31 21:57:34 -08:00
qctecmdr
270ab53fac Merge "usb: gsi: Fix runtime PM usage count for MBIM interface" 2020-12-31 21:57:34 -08:00
qctecmdr
3253e07071 Merge "regulator: Add snapshot of virtio regulator driver" 2020-12-31 21:57:33 -08:00
qctecmdr
9c5df45428 Merge "clk: qcom: Add snapshot of virtio clock driver" 2020-12-31 21:57:32 -08:00
qctecmdr
542bc66c71 Merge "cnss2: add check if wlan driver supported device existing" 2020-12-31 04:41:33 -08:00
qctecmdr
bb4160a82e Merge "scsi: ufs: Add UFS3.0 in ufs HCI version check" 2020-12-31 04:41:33 -08:00
qctecmdr
19ee4e1f60 Merge "soc: qcom: socinfo: Add soc information for Monaco" 2020-12-31 04:41:33 -08:00
qctecmdr
c8a24a5ba5 Merge "msm: pcie: Return EACCESS when link access is not allowed" 2020-12-31 04:41:32 -08:00
qctecmdr
d703eb2b30 Merge "icnss2: change to avoid device crash if RF card is not present" 2020-12-31 04:41:32 -08:00
qctecmdr
fbf1700c12 Merge "soc: fix macro definitions of subsystems" 2020-12-31 04:41:31 -08:00
qctecmdr
570af260d2 Merge "pinctrl: qcom: Update GPIO to PDC map for yupik" 2020-12-31 04:41:31 -08:00
Chandana Kishori Chiluveru
e9000bd1eb usb: gsi: Fix runtime PM usage count for MBIM interface
GSI Driver get the usage count in work handler when set_alt 1 happens
and this counter will decrement in disconnect work due to cable disconnect
or in gsi_suspend for suspended state.

In this case set alt to 0 came for MBIM interface and clear the
data_interface_up flag. After that suspend happens and does not decrement
the counter in gsi_suspend. This causes a mismatch of usage count and
usb not entering to low power mode.

Fix this by checking for USB_PROT_GPS_CTRL instead of data_interface_up.

Change-Id: Iaabf3de46ed72e33980d1e3e386e8ca0ae651c74
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
2020-12-31 15:07:42 +05:30
Jagadeesh Kona
327c0a3539 clk: qcom: debugcc-shima: Remove measure support for unregistered clocks
Remove debug measure support for clocks that are not registered with the
clock framework. While at it update the external clocks in debugcc to
measure only clocks.

Change-Id: Icd6d59a098d116074403d24d9bc990fdebd7bdd7
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2020-12-31 13:43:16 +05:30
Harsh Agarwal
430a8df3f9 usb: xhci: Increase xhci halt timeout
Currently, certain controllers with lower core clock rates, takes
more than 32ms to set the halted bit. This results in XHCI halt
timeout.
Fix this by increasing the timeout to 48ms.

Change-Id: I2f2715a11a947e01303c659e257ef0cabb311cac
Signed-off-by: Harsh Agarwal <harshq@codeaurora.org>
2020-12-31 00:05:33 -08:00
Rakesh Kota
80d4f5d332 dt-bindings: clock: Add support for clock ids for sdxnightjar
Add MSS_Q6_BIMC_AXI and MSS_CFG_AHB clock IDs for GCC and clients
to be able to request for clocks from these clock controllers.

Change-Id: I2a7315d8d40348cf08515be9a43ad004f0c1d064
Signed-off-by: Rakesh Kota <kotarake@codeaurora.org>
2020-12-31 10:50:28 +05:30