Commit graph

875,876 commits

Author SHA1 Message Date
Taniya Das
b23d5d6083 cpufreq: qcom-hw: cleanup the driver for HW driver
Move the current code to support as per the upstream code and bring in
fixes required to support the EPSS driver. Fix em_register_perf_domain
as new API convention.

Change-Id: I267731a89a130d1fca5b1fb25aab95430a9099c7
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-17 15:09:37 +05:30
qctecmdr
3f05717d9f Merge "sched/walt: Improve the scheduler" 2019-12-16 19:50:47 -08:00
qctecmdr
3e91323fd9 Merge "defconfig: lahaina-gki: enable qpnp-power-on driver" 2019-12-16 19:12:35 -08:00
qctecmdr
4f3ef457ae Merge "defconfig: enable cdsp loader on Lahaina as DLKM module" 2019-12-16 19:12:34 -08:00
qctecmdr
c1ddf94399 Merge "arm64: defconfig: Enable tz_log driver for Lahaina" 2019-12-16 18:31:02 -08:00
qctecmdr
9cee81e699 Merge "defconfig: lahaina-qgki: enable regmap debugfs features" 2019-12-16 18:31:02 -08:00
qctecmdr
5861050a5b Merge "firmware: qcom: Add TZ log driver snapshot for Lahaina" 2019-12-16 17:48:32 -08:00
Edgar Flores
a2d145d127 defconfig: enable cdsp loader on Lahaina as DLKM module
Enable cdsp loader driver as a DLKM module for
lahaina-gki configuration.

Change-Id: I89de24d1b2d09b8c856d569a4da217f6d41a3cc1
Signed-off-by: Edgar Flores <edgarf@codeaurora.org>
2019-12-16 15:50:23 -08:00
qctecmdr
635b627365 Merge "drivers: thermal: of-thermal: Add support for virtual sensor" 2019-12-16 15:44:47 -08:00
qctecmdr
be343ccd35 Merge "pinctrl: qcom: spmi-gpio: define an irqchip for each pinctrl device" 2019-12-16 15:06:25 -08:00
qctecmdr
8213b6428a Merge "drivers: thermal: Add QTI_THERMAL config" 2019-12-16 15:06:24 -08:00
qctecmdr
24d7be2e04 Merge "drivers: soc: qcom: Add snapshot of EUD driver" 2019-12-16 14:26:30 -08:00
qctecmdr
f096eb3342 Merge "iio: adc: Add support for PMIC7 VADC" 2019-12-16 14:26:29 -08:00
qctecmdr
cf3335cdae Merge "defconfig: enable fastrpc driver on Lahaina" 2019-12-16 14:26:29 -08:00
Sai Harshini Nimmala
44a9fe8ad9 sched/walt: Improve the scheduler
This change is for general scheduler improvement.

Change-Id: I33e9ec890f8b54d673770d5d02dba489a8e08ce7
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
[satyap@codeaurora.org: port to 5.4 and resolve trivial merge conflicts]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-16 13:16:54 -08:00
Maria Yu
e673c734f3 sched/fair: Avoid force newly idle load balance if have iowait task
If this runqueue have iowait task and still force newly
idle load balance, will make iowait task performance
worse. Need to do the average idle time check if
there is iowait task on this runqueue to have upcoming
iowait task have enough cpu resource.

Change-Id: I8e4dd440edbbd14d5170fbcf358bdaf5cc5b26e8
Signed-off-by: Maria Yu <aiquny@codeaurora.org>
Signed-off-by: Biao Long <blong@codeaurora.org>
2019-12-16 13:16:49 -08:00
Pavankumar Kondeti
bab437b714 sched/fair: Improve the scheduler
This change is for general scheduler improvement.

Change-Id: I7e6cc760a6add9ebdab7d67a176559bc640f7790
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
[satyap@codeaurora.org: port to 5.4 and minor update for WALT]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-16 13:16:04 -08:00
Pavankumar Kondeti
ac0eba9b32 sched/fair: Force gold cpus to do idle lb when silver has big tasks
We often see traces that gold cpus goes to idle even when silver
has big tasks. This is because avg_idle checks does not allow
the gold cpus to enter idle balance. This is NOT okay when
silver CPUs have big tasks.

Change-Id: Ice00d43c70be105b5bc3ad09caa6047aa98d7402
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
[satyap@codeaurora.org: port to 5.4 and add WALT checks]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-16 13:15:35 -08:00
qctecmdr
f8142d1124 Merge "wil6210: send uevent when creating sysfs files" 2019-12-16 12:53:55 -08:00
qctecmdr
00a0a5045c Merge "arm64: Remove cpu_soft_reset() prototype" 2019-12-16 12:06:01 -08:00
qctecmdr
5b1b65d030 Merge "arm64: defconfig: Enable QUPv3 and GPI drivers on lahaina" 2019-12-16 11:29:58 -08:00
qctecmdr
7847fb4f8a Merge "msm: ipa: load IPA FW after smmu CB are probed" 2019-12-16 11:29:57 -08:00
qctecmdr
9adbc34dba Merge "Revert "perf: Set the DSU PMU to be readable from any CPU"" 2019-12-16 11:29:57 -08:00
Edgar Flores
49d6324914 defconfig: enable fastrpc driver on Lahaina
Enable compilation of fastrpc driver as DLKM module on Lahaina.
This driver will be part of Lahaina GKI config.

Change-Id: Ie34249640949b192557735ccc64ffd75526b48ed
Signed-off-by: Edgar Flores <edgarf@codeaurora.org>
2019-12-16 11:29:13 -08:00
qctecmdr
abe6d961ff Merge "msm: ipa: Add graceful handling to skip partial packets" 2019-12-16 10:50:50 -08:00
qctecmdr
abdbe88f83 Merge "msm: ipa: Fix not to update state during pipe reset" 2019-12-16 10:50:50 -08:00
qctecmdr
224be36813 Merge "msm: ipa: add support to updated wdi3 scratch register2 alone" 2019-12-16 10:50:49 -08:00
David Collins
9d223aa497 defconfig: lahaina-gki: enable qpnp-power-on driver
Enable the qpnp-power-on driver so that the desired power off
type can be configured (i.e. shutdown, reset, or warm reset).

Change-Id: I9e1d0157423c4d032fd5d948af1b008d7851310e
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:44:48 -08:00
David Collins
513b6c63e1 input: qpnp-power-on: add support for PON_GEN3 subtype PON peripherals
Add support to control PON_GEN3_PBS and PON_GEN3_HLOS subtype
PON peripherals.  These support a more limited feature set than
previous PON peripherals.

Change-Id: Id76ccc6ffd285ac68f350fb194f70bbbb04bd558
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:44:47 -08:00
David Collins
ec0c13cc56 dt-bindings: input: add qpnp-power-on bindings
Add device tree bindings for Qualcomm Technologies, Inc. QPNP
Power-on devices.  These are PMIC peripherals which manage PMIC
power on, power off, key presses, and other related activities.

This snapshot is taken as of msm-4.19
commit 47598dd0e809 ("input: misc: qpnp-power-on: add support
to power off a modem chip").

Change-Id: If5e727c812a3c8cdcc263a40c72de50bb3ffbc78
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:44:46 -08:00
David Collins
726328684e input: add snapshot of qpnp-power-on driver
The qpnp-power-on driver provides support for key presses via
several key specific PMIC inputs.  It also supports reading
power-on reasons and configuring the power-off type (i.e.
restart, shutdown, etc).

This snapshot is taken as of msm-4.19
commit 47598dd0e809 ("input: misc: qpnp-power-on: add support
to power off a modem chip").

Note that support for boot_reason, cold_boot, and ship_mode
configuration was removed as these have unmet dependencies and
are no longer needed.

Change-Id: I8105cf74d65609932146157f82a8e99f29a4dde2
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:44:45 -08:00
David Collins
76b233c18e defconfig: lahaina-qgki: enable regmap debugfs features
Enable CONFIG_REGMAP_QTI_DEBUG and CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS
to facilitate easier debugging.

Change-Id: I8a1f34819f80df9ee988aea59b3895bd0af0843a
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:44:44 -08:00
David Collins
5fdcaaf6f1 defconfig: lahaina-gki: enable gpio-keys driver
Enable the gpio-keys driver so that GPIO buttons can be monitored.

Change-Id: I6e73af4ad85dbba8a087cca80f2f1b9b99ff5799
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:44:43 -08:00
David Collins
c9ce2cc0c0 defconfig: lahaina-gki: enable SPMI and PMIC drivers
Enable several SPMI and PMIC drivers which are needed to provide
baseline support of PMIC peripherals.

Change-Id: Ifb4414083764bbae64904d8629528cc4dda3a39c
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:43:06 -08:00
David Collins
92ac3f9f32 defconfig: lahaina-qgki: enable CONFIG_IIO
Enable CONFIG_IIO in lahaina_QGKI.config so that drivers which
depend upon it can function before CONFIG_IIO is enabled in
gki_defconfig.

Change-Id: I6afa93e6054d67157b1d435aa10688ab37220612
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:43:04 -08:00
David Collins
5cc6a7c454 pinctrl: qcom: spmi-gpio: define an irqchip for each pinctrl device
Generate a new irqchip struct for each pinctrl device that is
registered to avoid sharing the same irqchip between devices.
This corrects the following error which is printed when
registering more than one pinctrl-spmi-gpio device:

  "detected irqchip that is shared with multiple gpiochips:
   please fix the driver."

Change-Id: I80ce67fc674b96f4386499f547395ceed7480583
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:43:03 -08:00
David Collins
b1ebdc3778 pinctrl: qcom: spmi-gpio: add support for PMR735A and PMR735B PMIC variants
Add support for qcom,pmr735a-gpio and qcom,pmr735b-gpio variants.

Change-Id: I773d2539af146be56b091ced8709ae8dabe6e36e
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-12-16 10:43:02 -08:00
qctecmdr
1e336131de Merge "drivers: llcc edac: Add Cache Error Reporting driver for llcc" 2019-12-16 10:09:15 -08:00
qctecmdr
a11cd8cdd1 Merge "drivers: soc: qcom: Add snapshot of boot stats driver" 2019-12-16 10:09:14 -08:00
qctecmdr
6c5735d14c Merge "Revert "soc: qcom: socinfo: Expose custom attributes"" 2019-12-16 10:09:14 -08:00
qctecmdr
c24ca01eac Merge "arm64: defconfig: Enable spcom driver on Lahaina" 2019-12-16 10:09:14 -08:00
qctecmdr
ea118c4263 Merge "msm: ipa: Fix not sending QMI sync indication" 2019-12-16 10:09:14 -08:00
qctecmdr
7c77c9622d Merge "cpufreq: qcom: Update cycle counter logic for CPUFREQ HW" 2019-12-16 09:32:55 -08:00
Ghanim Fodi
d3e8fba561 msm: ipa: load IPA FW after smmu CB are probed
Now with GKI, SMMU CB can be delayed in probe
due to dependencies. The change waits for the
probe before triggering fw loading and post_init
call.

Change-Id: I468edd730a91de01ba9619385ab0c76083bc9382
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
2019-12-16 15:20:23 +02:00
Jishnu Prakash
87e13fd46d iio: adc: Add support for PMIC7 VADC
The VADC architecture on PMIC7 is changed as compared to PMIC5. The
major change from PMIC5 is that all SW communication to ADC goes through
PMK8350, which communicates with other PMICs through PBS when the VADC
on PMK8350 works in master mode. The SID register is used to identify the
PMICs with which the PBS needs to communicate. Add support for the same.

Change-Id: If5c651e01be9363a61d1bf546e0b6d82a023904c
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2019-12-16 03:48:57 -08:00
Jishnu Prakash
2635e99701 dt-bindings: iio: Add PMIC7 ADC support
Add definitions for ADC channels and scaling function IDs for PMIC7
ADC drivers. Add virtual channel definitions per PMIC, to be used
by ADC clients for PMIC7.

Change-Id: If857612a8087b928901dc08327aea3a8f4df7b01
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2019-12-16 03:47:35 -08:00
Vipin Deep Kaur
ad58b3b633 arm64: defconfig: Enable QUPv3 and GPI drivers on lahaina
Enable QUPv3(I2C, SPI, I3C) and GPI drivers on lahaina.

Change-Id: I0f539bbe782870bf8e982c645ccef77238e93049
Signed-off-by: Vipin Deep Kaur <vkaur@codeaurora.org>
2019-12-16 11:19:04 +05:30
Chaitanya Pratapa
2f2eea29bc msm: ipa: add support to updated wdi3 scratch register2 alone
To update QMAP ID there is no need to start and stop the GSI
channel. Make changes to read only scratch2 register for WDI3
protocol and update the QMAP ID without affecting other registers.

Change-Id: I7f873386fd01d624629fed15b841c6abd558a9ce
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-12-15 12:30:39 -08:00
Chaitanya Pratapa
8872e11021 msm: ipa: Fix not sending QMI sync indication
If back to back SSR is triggered there is a possibility
of race condition where we try to send QMI sync indication
with a invalid handle. Make a change to validate the handle
before sending the indication.

Change-Id: If912b6676b562bd4a23c68512e9c80e6c0ac7a49
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-12-15 12:25:10 -08:00
Chaitanya Pratapa
e54481078f msm: ipa: Add graceful handling to skip partial packets
Partial packets are not expected to be receievd on WAN_CONS
pipe. Make changes to handle gracefully if EOB packets
are received on WAN_CONS pipe in cases where network is
misbehaving.

Change-Id: I4a4ce96a0c86f353e1764d016edbb00011367205
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2019-12-15 12:23:03 -08:00