For synchronous messages sent from the agent to platform,
agent waits for response for 30 milli seconds (max_rx_timeout)
before timing out if response gets delayed from platform.
Increase the timeout value to 1 second to minimize message
send failures in case of delays.
Change-Id: I72e9ab33a9be675b64301e904e8d43fb8bb89e50
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
There might be spurious HS PHY IRQ after USB bus has gone into
hibernation which leads to dwc3_msm_resume and in_lpm flag
getting cleared. Next when the restore from hibernation happens,
dwc3_msm_resume becomes a no-op but in reality, the HW resources
are all turned off. This leads to an unclocked access from
xhci_resume.
Fix this by disabling PHY wakeup IRQs on hibernation/pm_suspend
for automotive targets.
Change-Id: I753fb3593fca31f12406b9126f73f75520dab1b0
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
Introduce Qualcomm Yupik specific real provider driver using the
interconnect framework. Also add sync_state for interconenct
provider driver.
Change-Id: Ifd61a5d1d8eb1fb532b865d128b14ae673a1acdf
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Cpu possible sibling cpu mask is only used by WALT for its cluster
population. And WALT is directly getting the cpu possible sibling mask.
So remove this unused cpu mask support by reverting commit:
'6df025a02c49f65("topology: Add snapshot of possible sibling
cpu mask changes")'.
Change-Id: If65842a37cad95e8b52425a1397d12c32a95dc1e
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
Commit 36b196ce5c ("msm: kgsl: Add software timelines") didn't properly
advance the user source pointer while walking the incoming list of timeline
signals in an aux commmand which resulted in only the first listed timeline
getting signaled.
Fixes: 36b196ce5c ("msm: kgsl: Add software timelines")
Change-Id: Ic0dedbad400f276abea6b368421ccdcef1645b9e
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Following flags are needed to support block crypto
based inline encryption framework on eMMC devices:
1. CONFIG_MMC_CQHCI_CRYPTO
2. CONFIG_MMC_CQHCI_CRYPTO_QTI.
Change-Id: Ic87330eaa1e95d7347a13d631bb5c0c734b92d2c
Signed-off-by: Phanindra Babu Pabba <pabba@codeaurora.org>
There is some power impact seen with autohibern8 idle
timer value of 10ms. Hence reverting back the autohiber8 timer
value back to 5ms.
This reverts commit ef3f24dd1c.
Change-Id: Ic2f97e6f53e1711a869c9617e15c06e53d1e2e33
Signed-off-by: Nitin Rawat <nitirawa@codeaurora.org>
Enable gcc/rpm-smd/debugcc clock drivers to support clock peripherals.
Change-Id: I64c82e468a5874ac8a97dc2558746fa2d21fb969
Signed-off-by: Rakesh Kota <kotarake@codeaurora.org>
Add support for new UFS PHY on SM8150 platform.
Change-Id: I8d28e798c080706280e0b55bcf474c3422985d2a
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
With fragmented physical memory, mappings are generated of lower granule.
This increases the unmap latency of large buffers. When not supporting
demand paging in smmu, unmap can defer the invalidation till next map.
This change aggregates invalidations across multiple unmaps till a new
mapping is created on that context. The new mapping can be using an iova
previously unmapped hence the stale TLB can cause issue. Hence invalidate
the TLB during map.
Change-Id: I1d64227ca075067a43075729ba26be684126d679
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
When a context bank's SCTLR is programmed for an SMMU client
that wishes to bypass S1 translations and enable io-coherency, the
SHCFG bitfield of the SCTLR is set to 0. This means that a
client's transaction's shareability memory attribute will not be
modified as it goes through the SMMU.
This is problematic if the SMMU client's transaction is marked as
non-shareable, as the attribute will not be modified to be classified
as io-coherent, since io-coherent transactions should be cacheable
and shareable. Instead, the transaction will not snoop the CPU
caches, and will go to DDR, and may read incorrect data.
Thus, program the SHCFG bitfield in the context bank's SCTLR to
override the shareability attribute to outer shareable when
enabling io-coherency for clients using S1 bypass.
Change-Id: Ia4c1bbe7812ce7c2062c636e2b1bb39fa1ac516c
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
When running concurrent iptables rules replacement with data, the per CPU
sequence count is checked after the assignment of the new information.
The sequence count is used to synchronize with the packet path without the
use of any explicit locking. If there are any packets in the packet path
using the table information, the sequence count is incremented to an odd
value and is incremented to an even after the packet process completion.
The new table value assignment is followed by a write memory barrier so
every CPU should see the latest value. If the packet path has started with
the old table information, the sequence counter will be odd and the
iptables replacement will wait till the sequence count is even prior to
freeing the old table info.
However, this assumes that the new table information assignment and the
memory barrier is actually executed prior to the counter check in the
replacement thread. If CPU decides to execute the assignment later as there
is no user of the table information prior to the sequence check, the packet
path in another CPU may use the old table information. The replacement
thread would then free the table information under it leading to a use
after free in the packet processing context-
Unable to handle kernel NULL pointer dereference at virtual
address 000000000000008e
pc : ip6t_do_table+0x5d0/0x89c
lr : ip6t_do_table+0x5b8/0x89c
ip6t_do_table+0x5d0/0x89c
ip6table_filter_hook+0x24/0x30
nf_hook_slow+0x84/0x120
ip6_input+0x74/0xe0
ip6_rcv_finish+0x7c/0x128
ipv6_rcv+0xac/0xe4
__netif_receive_skb+0x84/0x17c
process_backlog+0x15c/0x1b8
napi_poll+0x88/0x284
net_rx_action+0xbc/0x23c
__do_softirq+0x20c/0x48c
This could be fixed by forcing instruction order after the new table
information assignment or by switching to RCU for the synchronization.
Change-Id: I41ffb931b711cd2de9896d9ca7f13dda79e6709f
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
