Commit graph

899,755 commits

Author SHA1 Message Date
qctecmdr
b586f853fe Merge "icnss2: Update QMI timeout value dynamically" 2021-09-28 15:11:48 -07:00
qctecmdr
69e66a0ecc Merge "icnss2: Send WPSS restart level to FW through QMI" 2021-09-28 06:28:24 -07:00
Vijay Patil
46ccd23c43 icnss2: Update QMI timeout value dynamically
QMI timeout value is to be sent to the icnss2 module
during initialization using module_param.

Change-Id: Ibb6038ccdcac5b59b4f72597588312b4b064da0e
Signed-off-by: Vijay Patil <vijaylil@codeaurora.org>
2021-09-28 11:36:58 +05:30
qctecmdr
5f4eec377a Merge "mm/madvise: use mmap_sem lock from passed mm_struct" 2021-09-27 17:45:18 -07:00
qctecmdr
b92310fc44 Merge "clk: qcom: clk-cpu-sdxlemur: Use lucid_5lpe ops with latch bypass" 2021-09-27 17:45:17 -07:00
qctecmdr
839ed61723 Merge "cnss2: Set pcie link speed as default_gen_speed in dts" 2021-09-27 08:20:27 -07:00
Jianmin Zhu
c18ee2624c cnss2: Set pcie link speed as default_gen_speed in dts
For qca6490, read dts first to get default gen speed, if valid
setting existing, then use it, else use gen2.

Change-Id: I6cb507746d677da114408e78076c3cc21073a829
CRs-Fixed: 3003876
Signed-off-by: Jianmin Zhu <jianminz@codeaurora.org>
2021-09-27 12:47:44 +08:00
qctecmdr
d4762490a3 Merge "msm: ep-pcie: ipq: Enable global irq before link enum" 2021-09-25 19:28:08 -07:00
qctecmdr
67441c43a2 Merge "clk: qcom: clk-cpu-sdxlemur: Update max apcs_cpu_pll frequencies" 2021-09-24 19:24:02 -07:00
qctecmdr
d6cc60163d Merge "msm: ep-pcie: Fix icc bus vote and add icc bus unvote" 2021-09-24 10:09:45 -07:00
qctecmdr
17cfb60189 Merge "defconfig: sdxnightjar: disable panic on oom on sdxnightjar" 2021-09-24 10:09:44 -07:00
Charan Teja Reddy
6f65360b49 mm/madvise: use mmap_sem lock from passed mm_struct
Use the mmap_sem lock from passed 'mm' rather than the 'current' as it
is required because of the patchset[1]. The commit f4fa8d937e ("mm:
madvise: fix vma user-after-free") changed the 'mmap_sem' to use from
'current' instead of 'mm' context. Revert it.

Link: [1] https://patchwork.kernel.org/project/linux-mm/patch/20200302193630.68771-2-minchan@kernel.org/.

Change-Id: Ifc9deb2a5f0775c2bc97c85db3584f61fa3a43ae
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
2021-09-24 21:28:35 +05:30
Karthick Shanmugham
d4be9fe646 msm: ep-pcie: ipq: Enable global irq before link enum
Enabling global irq after link enumeration causes link
failure with IPQ host. Global irq is enabled before
enumeration for ipq host alone.

Change-Id: I20fa69c05bd3bc97fddea35e9e30833bca04c54b
Signed-off-by: Karthick Shanmugham <kartshan@codeaurora.org>
2021-09-24 08:44:03 -07:00
qctecmdr
aa5852b099 Merge "mm: reap tasks that are killed by prekill" 2021-09-24 05:19:03 -07:00
qctecmdr
d54b4c3701 Merge "msm: kgsl: Fix out of bound write in adreno_profile_submit_time" 2021-09-24 05:19:02 -07:00
Can Guo
adc98ccffc msm: ep-pcie: Fix icc bus vote and add icc bus unvote
We need to perform icc bus vote when enable endpoint and bus unvote when
disable endpoint. However, icc_path is released during endpoint disable
(by ep_pcie_clk_deinit()). This change fixes icc bus vote and adds icc bus
unvote accordingly.

Change-Id: Iaa4c6e4df5923a325f038dba689ef17bc746bab4
Signed-off-by: Can Guo <cang@codeaurora.org>
2021-09-24 03:46:34 -07:00
Vijayanand Jitta
81eea5271c defconfig: sdxnightjar: disable panic on oom on sdxnightjar
sdx targets rely on oom killer to kill the processes as there is
no lmk. so, disable panic_on_oom on sdxnightjar.

Change-Id: I67f055ec9e7412495360cdc5f1aa2350a4e3fab9
Signed-off-by: Vijayanand Jitta <vjitta@codeaurora.org>
2021-09-24 03:42:11 -07:00
Kamal Agrawal
ad5c168053 msm: kgsl: Fix out of bound write in adreno_profile_submit_time
Make sure there is enough room in the memory descriptor to store the
entire profiling buffer object.

Change-Id: I1e1c73097bb2bba9645b0a3c66fdbbc71d8ba8fa
Signed-off-by: Kamal Agrawal <kamaagra@codeaurora.org>
2021-09-24 12:37:19 +05:30
qctecmdr
58992ee3c2 Merge "rpmsg: glink: Change error logging to avoid throttling" 2021-09-23 21:23:24 -07:00
Vijay Patil
93498d0163 icnss2: Send WPSS restart level to FW through QMI
Send WPSS restart level type as enable or disable PHY processor
SSR to FW using QMI.

Change-Id: I28879cf13e5874c49b2c346c076082f7f8a59fe1
Signed-off-by: Vijay Patil <vijaylil@codeaurora.org>
2021-09-24 09:33:47 +05:30
Kamal Agrawal
80e82cf4fb msm: kgsl: Avoid parsing IBs during atomic snapshot
During IB parse, vmalloc is called which can sleep and
should not be called from atomic context. Since IBs are not
dumped during atomic snapshot, there is no need to parse it.

Change-Id: I116d095958d99a8caeafb24dc45684ead01c961d
Signed-off-by: Kamal Agrawal <kamaagra@codeaurora.org>
2021-09-23 07:16:11 -07:00
Mike Tipton
f7a60ad3b8 clk: qcom: clk-cpu-sdxlemur: Update max apcs_cpu_pll frequencies
Update the maximum apcs_cpu_pll frequencies based on the latest
lucid_5lpe HW recommendations.

Change-Id: I3e88cbae6c60bde9648ec2b454765c27ff07bee4
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2021-09-22 10:31:32 -07:00
Mike Tipton
8818857f12 clk: qcom: clk-cpu-sdxlemur: Use lucid_5lpe ops with latch bypass
The CPU PLLs latch interface is custom and not entirely reliable. So
instead use the standard lucid_5lpe ops and bypass the latch interface.

Change-Id: I0bc46e329ed5e135f26a08a4f09dd1872013ed7a
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2021-09-22 10:20:14 -07:00
Mike Tipton
73b5ea9778 clk: qcom: clk-alpha-pll: Add lucid_5lpe support for bypassing latch
Some PLL instances don't have a fully functional latch interface and
it's not strictly required in all circumstances. So add support for
bypassing it.

Change-Id: I60c319c0f50c8eca159afa32ee3cbd83bb1af510
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2021-09-22 10:19:26 -07:00
Srinivasarao P
fc6b78b376 mm: reap tasks that are killed by prekill
Reap tasks that are killed by PreKillActionT.

Change-Id: I367e803848121d071d8143952eaa9b7195ae04d6
Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
2021-09-22 19:02:42 +05:30
Sarannya S
39d2f49e03 rpmsg: glink: Change error logging to avoid throttling
Avoid printing error when ENODEV is returned from glink callback
and use dev_err_ratelimited so that throttling will not happen
due to excessive logging.

Change-Id: I9369046c2f907ecd38416c8927764c7a8b7c1ca4
Signed-off-by: Sarannya S <sarannya@codeaurora.org>
2021-09-22 04:13:53 -07:00
qctecmdr
2a0102449d Merge "cnss2: Fix the pbl log sram start address for QCA6490" 2021-09-21 19:20:50 -07:00
qctecmdr
d4f4116092 Merge "cnss2: Dump PCIE SOC scratch registers along with mhi reg dumps" 2021-09-21 19:20:49 -07:00
qctecmdr
d2e56b0026 Merge "msm: mhi_dev: Process the PM_RST_DEAST event in the caller context" 2021-09-21 19:20:49 -07:00
qctecmdr
6f420e10da Merge "i2c: i2c-msm-geni: Do i2c transfer if GENI IOS in proper state" 2021-09-21 09:42:13 -07:00
qctecmdr
c8ece5af7b Merge "msm: kgsl: Add support for A643 GPU" 2021-09-21 09:42:12 -07:00
qctecmdr
fe45705041 Merge "soc: qcom: qmi_interface: allocate high priority work queue" 2021-09-21 04:50:57 -07:00
Mukesh Kumar Savaliya
5ad2f9de06 i2c: i2c-msm-geni: Do i2c transfer if GENI IOS in proper state
This change ensures the IOS lines are in protocol default state before
starting the data transfer. This ensures the slave is properly powered
up and also protocol lines are in IDLE High state.

We can prevent any further try to send data which can be failed due to
lines not in proper state.

Change-Id: Ibd9a6109133dd776f86a841f8bde305d08d2c187
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
2021-09-21 03:43:30 -07:00
Veerabhadrarao Badiganti
04e87d8bc7 msm: mhi_dev: Process the PM_RST_DEAST event in the caller context
With the commit <37ea867103f2>("msm: ep-pcie: Use threaded irq for
PERST de-assertion handling"), PCIe driver notifies the PM_RST_DEAST
event in threadedIRQ context. Process this event in the same
context so that we can finish link initialization and training as
quickly as possible.

Change-Id: If920fd9b653d6ae82cea599effb2d912a9b08174
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
2021-09-21 15:30:38 +05:30
Veerabhadrarao Badiganti
3143451298 msm: ep-pcie: Use threaded irq for PERST de-assertion handling
When the host de-asserts the PERST, ep-pcie driver needs to bring-up
the link as quickly as possible (within 150ms). Otherwise, the host
may fail to detect the link.

In our current design, we are doing the link initialization and
link training in a kworker thread context. In some scenarios
this context is incurring context switches and scheduling  delays
which is resulting in issues like the host fails to detect the link.

To fix this, perform the link initialization and training in the
highest possible priority (threaedIRQ). With this change, PCIe driver
notifies clients in threadedIRQ context and the clients (Eg MHI)
supposed to invoke the link training in the same context.

Change-Id: I04de4a1dfb3a145b947a2824c6961da70215944b
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
2021-09-21 15:30:31 +05:30
qctecmdr
b8bf0ad232 Merge "soc: qcom: hab: Fix potential memory leak when receiving msg" 2021-09-20 03:39:36 -07:00
qctecmdr
86bc9bf101 Merge "msm: mhi_dev: Ensure the flush list is empty for a stopped channel" 2021-09-19 23:38:34 -07:00
qctecmdr
9bf32d7027 Merge "Revert "icnss2: Enable PHY processor SSR along with WPSS SSR"" 2021-09-19 07:09:27 -07:00
qctecmdr
aa07adacf1 Merge "input: qcom-hv-haptics: Update "get_fifo_length_us" with T_LRA_X" 2021-09-17 16:15:25 -07:00
Naman Padhiar
c06d158bdb Revert "icnss2: Enable PHY processor SSR along with WPSS SSR"
This reverts commit 047f485e92.

Change-Id: I2125637403cd445066a849a8913d02e4897b2a8f
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
2021-09-17 12:58:43 +05:30
lixiang
f510918743 soc: qcom: hab: Fix potential memory leak when receiving msg
Fix potential memory leak situation when receiving a message of type
HAB_PAYLOAD_TYPE_EXPORT_ACK. Add kfree() to free ack_recvd.

Change-Id: Iaa5cb10af694b20647f2f04f3c030bfa2ba59a3d
Signed-off-by: lixiang <lixiang@codeaurora.org>
2021-09-16 20:09:28 -07:00
Kiran Gunda
3cb186f032 input: qcom-hv-haptics: Update "get_fifo_length_us" with T_LRA_X
Update "get_fifo_length_us" function to support the T_LRA_X_2/4/8
periods. So that the FIFO mode can work for all T_LRA periods.

Change-Id: I5d6b2c95eff66cddcec9388082c4d540493f2c86
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
2021-09-16 05:53:27 -07:00
qctecmdr
adc03f0e9a Merge "usb: dwc3: Don't perform pm rt sync operations in atomic context" 2021-09-16 04:04:07 -07:00
qctecmdr
15d558c6d7 Merge "USB: u_ether: Prevent unclocked access when running rndis interface down" 2021-09-15 16:23:47 -07:00
qctecmdr
c7c6e9717f Merge "arm64: defconfig: lahaina_QGKI: Enable CONFIG_PRINTK_CALLER" 2021-09-15 16:23:46 -07:00
Rohith Kollalsi
b269576798 usb: dwc3: Don't perform pm rt sync operations in atomic context
For mass storage function driver ep_disable will be called in worker
thread context. Making sure controller is active and then calling
ep_disable and then putting controller back to lpm is very difficult
to achieve in mass storage driver. The reason is that fsg_disable
raises an exception which actaully waits for the completion
callback to come from gadget driver and if for some reason (like
command timeout error) if it doesn't, then do_set_iterface will
not be called which will do put_sync. This can prevent controller
from going to lpm.

To solve above problem, commit ad8d260c33 ("usb: dwc3: gadget: Check
controller status with endpoint enable/disable") moved pm_runtime_sync
operations from mass storage driver to gadget driver. But there is a
chance that pm_runtime get_sync and put sync operations in gadget
driver can be called in atomic context (taking spin_lock in function
driver and then calling) and lead to crash. Adding in_lpm check and
performing these operations only if controller is in lpm will ensure
that these operations will be done only for mass storage driver and
not be done in atomic context. For other function drivers where
ep_disable will be called in atomic context, there is no chance that
ep_disable will be called when controller is in lpm as bh_work or
resume work will be called and will ensure controller to be out of
LPM before ep_disable is called.

Change-Id: I37635fd75e44a67deadbd4796b757d85d604aed4
Signed-off-by: Rohith Kollalsi <rkollals@codeaurora.org>
2021-09-15 09:25:14 -07:00
Rohith Kollalsi
da0ce57aed USB: u_ether: Prevent unclocked access when running rndis interface down
When in rndis composition, if device is disabled in device manager,
usb enters low power mode. Then if rndis interface is put down,
ep_disable is called leading to crash due to unclocked access as
clocks are turned off when usb enters lpm. Fix this by waking up
the controller, then performing ep_disable operation and then
putting controller back to lpm.

Change-Id: I45d29ef2e2678a3d6383d3fdd5550c8b8e156875
Signed-off-by: Rohith Kollalsi <rkollals@codeaurora.org>
2021-09-15 09:22:37 -07:00
Manu Gautam
7b0acdb1b0 USB: f_fs: Disable USB LPM on bus_suspend with ADB
ADB function is mainly used for debugging, hence it is
not expected to allow USB LPM followed by system suspend
in device bus suspend. Driver also doesn't handle
usb_ep_dequeue failure in LPM when adbd is interrupted
by signal as buffer is left queued to the hardware after
usb_ep_dequeue failure and can cause memory corruption.

In addition to above comments, when controller is in lpm
there is a chance that ffs_ioctl can issue clear halt as
a part of which send_gadget_ep_cmd will be called where
registers are accessed with clock's turned off leading
to crash due to unclocked access. Hence do not allow usb
lpm with adb.

Change-Id: Ib89c80318dcdd0dbb35d122a2ab77fb61f83518e
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Signed-off-by: Rohith Kollalsi <rkollals@codeaurora.org>
2021-09-15 09:22:02 -07:00
Veerabhadrarao Badiganti
4b3ca62138 msm: mhi_dev: Ensure the flush list is empty for a stopped channel
If a channel gets stopped, while there are some outstanding requests/
transfers with IPA, then we simply ignore the completion from IPA.
But we must have already added the transfer-completion-event to the
flush list before submitting the transfer to IPA.

There is a possibility that we flush these stale events along with new
flush events (for new requests) when the channel gets re-started.
This un-intentional completion event can lead to out-of-sequence
events at the host.

So while stopping a channel, ensure all elements in the flush list
of that channel are discarded and the flush list is empty.

Change-Id: I04445b1f9f4d2d4fce0b8a96277517de14481ead
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
2021-09-15 06:00:14 -07:00
Mohammed Siddiq
404f28d635 cnss2: Dump PCIE SOC scratch registers along with mhi reg dumps
Add code to dump PCIE SOC scratch registers along with mhi reg
dumps to enhance debug info.

Change-Id: I65fc8324a8cccac6f5ffe73f6fc9513a561ee32e
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
2021-09-15 17:54:10 +05:30