Commit graph

858,586 commits

Author SHA1 Message Date
Bojun Pan
bc912e31b9 msm: gsi: gsi channel QoS register update
GSI QoS register upgrade for GSI v2.9, introduce the
new field of db_in_bytes.

Change-Id: I1d0ff4381a6b6ac1f5119d0be2efea29a49a5dcc
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-10-08 10:11:01 -07:00
Bojun Pan
e2df375d79 msm: ipa: update mem_part table for IPA SRAM
mem_partition table update for IPA SRAM.

Change-Id: I1cabeeca7eef8f82792d30f5a62c06bc3e08b049
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-10-04 12:20:01 -07:00
Bojun Pan
54f5b081c1 msm: gsi: gsi 2.9 upgrade
Driver upgrade for GSI v2.9.

Change-Id: I5d148ead27499e6571196bc320c60da1e727163d
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-10-04 12:19:55 -07:00
Bojun Pan
76a1edce0e msm: ipa: Configure IPA pipes and group resources for Lahaina IPA 4.9
Lahaina uses different pipe endpoint mappings and group resources.
This change captures these configurations.

Change-Id: Ib45848bb52d9a6680b38b4305cbab38c0b00e7d2
Acked-by: Priyadarshini Rajagopal <prajagop@qti.qualcomm.com>
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-10-04 12:19:50 -07:00
qctecmdr
bbb789f449 Merge "irqchip: qcom-pdc: Add IPC logging support" 2019-10-04 10:35:50 -07:00
qctecmdr
d9f382896a Merge "serial: msm_geni_serial:Add snapshot of serial UART driver" 2019-10-04 00:05:49 -07:00
qctecmdr
ca6ceb9883 Merge "irqchip: qcom-pdc: add irqchip set/get state calls" 2019-10-03 23:03:38 -07:00
Isaac J. Manjarres
8ba9def729 soc: qcom: secure_buffer: Fix secure buffer device initialization
Ensure that the secure buffer device is set only if dma_set_mask()
occurs successfully.

Change-Id: I9b84692b2860bafd8fe645b95e05d6436698d840
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-10-03 14:53:01 -07:00
qctecmdr
23e1365ce8 Merge "iommu/arm-smmu: Fix context fault interrupt test" 2019-10-03 14:00:20 -07:00
qctecmdr
7a21e4007b Merge "iommu: iommu-debug: check valid pfn before performing ATOS ops" 2019-10-03 13:17:48 -07:00
qctecmdr
03ea966837 Merge "iommu/arm-smmu: Adopt bitfield model for remaining SMMU registers" 2019-10-03 12:39:41 -07:00
qctecmdr
1578f1693e Merge "ARM: smp: export pending IPI state" 2019-10-03 11:51:41 -07:00
qctecmdr
0bd47772b8 Merge "iommu/arm-smmu: Add reset implementation hook" 2019-10-03 10:39:24 -07:00
qctecmdr
7da1ef4b30 Merge "iommu/arm-smmu: Move Secure access quirk to implementation" 2019-10-03 10:00:03 -07:00
qctecmdr
da9d4994d3 Merge "iommu/arm-smmu: Rename arm-smmu-regs.h" 2019-10-03 09:16:24 -07:00
Isaac J. Manjarres
5c502c5c3c iommu/arm-smmu: Fix context fault interrupt test
Fix the context fault interrupt test so that it can use
the abstracted context bank read/write routines.

Change-Id: I58ba80bd5e96b1cbcc68d5f8bc16150e9d335226
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-10-03 09:03:43 -07:00
Isaac J. Manjarres
a71e0d6b6a iommu/arm-smmu: Use bitfields for the TBU debug registers
Migrate to using bitfields for the TBU debug registers.

Change-Id: Iac1321784969018a3ad8757bcafbcb986c58be76
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-10-03 09:03:37 -07:00
qctecmdr
88623cbbdd Merge "usb: dwc3: qcom: Use GDSC regulator if available" 2019-10-03 08:31:49 -07:00
Akash Asthana
6d7a4ec947 serial: msm_geni_serial:Add snapshot of serial UART driver
This snapshot is taken as of msm-4.19 'commit <c01ec6b5c60a8>'
'("geni-qcom-se: Reduce the ab of QUP Core2x clock")'.

Change-Id: Ia40e9d48bca27bb253cbf73ad9fcde9d087820d3
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
2019-10-03 19:18:17 +05:30
Akash Asthana
f0450c1149 platform: msm: Add snapshot of GENI serial engine driver
This snapshot taken as of msm-4.19 'commit <5d5df09fbdf5>'
'("qcom_geni_se: Add a check in QUP common driver to vote for BW")'
GENI serial engine driver provides common functionality used by
other serial bus drivers (such as I2c, SPI, UART), and does
resource management for those drivers. Add ICC API support also.

Change-Id: I088457bbfa654253f7afe797ea3f89f63d06e823
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
2019-10-03 19:17:14 +05:30
qctecmdr
b5d0ace88f Merge "regulator: add verbose error messages for invalid voltage requests" 2019-10-02 19:16:13 -07:00
David Collins
85a85aada0 regulator: add verbose error messages for invalid voltage requests
Add error messages into the regulator_check_voltage() and
regulator_check_consumers() functions which explain exactly what
is not correct about given voltage requests.  This makes
debugging regulator_set_voltage() errors easier.

Change-Id: I8b3ec8d6a78c94b436b57bd2228b8bd5c362cecd
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-10-02 18:22:14 -07:00
qctecmdr
c78315c521 Merge "defconfig: lahaina-gki: enable rpmh-regulator driver" 2019-10-02 18:08:32 -07:00
qctecmdr
0adc799684 Merge "iommu/arm-smmu: Abstract context bank accesses" 2019-10-02 17:32:25 -07:00
Jack Pham
ae9ad6b5c6 usb: dwc3: qcom: Use GDSC regulator if available
GDSC can be specified as a regulator in device tree as
'USB3_GDSC-supply'. If present, use it and enable it
prior to enabling the clocks.

Change-Id: I50c056dd920b457fe77fd364414657e98413f4d0
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2019-10-02 17:28:02 -07:00
qctecmdr
a75e17c39a Merge "iommu/arm-smmu: Get rid of weird "atomic" write" 2019-10-02 16:59:17 -07:00
qctecmdr
b39f25a096 Merge "iommu/arm-smmu: Rework cb_base handling" 2019-10-02 16:23:24 -07:00
qctecmdr
8063c4d617 Merge "net: qrtr: Make qrtr_port_lookup() use RCU" 2019-10-02 15:47:38 -07:00
qctecmdr
c415245873 Merge "iommu/arm-smmu: Convert GR1 registers to bitfields" 2019-10-02 15:14:20 -07:00
qctecmdr
d14393ebc7 Merge "net: qrtr: Implement outgoing flow control" 2019-10-02 14:38:38 -07:00
David Collins
df8ac4a79d defconfig: lahaina-gki: enable rpmh-regulator driver
Enable the rpmh-regulator driver so that consumers can manage
PMIC regulator states via RPMh.

Change-Id: Ia5ee73dc04d9fcbd6412d49fd82172ff7d006a47
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-10-02 14:07:31 -07:00
qctecmdr
5d0063a99b Merge "net: qrtr: Stop rx_worker before freeing node" 2019-10-02 14:02:31 -07:00
qctecmdr
566cdcacb2 Merge "iommu/arm-smmu: Convert GR0 registers to bitfields" 2019-10-02 13:29:25 -07:00
qctecmdr
027cf3c126 Merge "rpmsg: Add snapshot of RPMSG drivers for lahaina" 2019-10-02 12:41:22 -07:00
qctecmdr
edb7abf4fb Merge "msm: ipa3: SRAM NAT, DDR NAT, back-and-forth NAT" 2019-10-02 06:47:54 -07:00
qctecmdr
16ee17d4b6 Merge "regulator: add rpmh-regulator driver" 2019-10-01 23:35:15 -07:00
qctecmdr
5426c7c971 Merge "arm64: defconfig: Enable SSR, PIL, Sysmon, and PDR drivers" 2019-10-01 20:50:25 -07:00
qctecmdr
557352c895 Merge "drivers: qcom: rpmh-rsc: add IPC logging support for RSC driver" 2019-10-01 20:02:43 -07:00
qctecmdr
5c4d2e8fa3 Merge "drivers: clksource: add API to return cval" 2019-10-01 19:17:25 -07:00
qctecmdr
a49a3b4be7 Merge "soc: qcom: rpmh: Fix sending incorrect data during rpmh flush" 2019-10-01 19:17:25 -07:00
qctecmdr
97b5ab5509 Merge "iommu/arm-smmu: Fix SMMU derivation in arm_smmu_power_off_atomic" 2019-10-01 18:44:28 -07:00
qctecmdr
91dda46f8b Merge "iommu: iommu-debug: Add support for page table dump" 2019-10-01 18:08:24 -07:00
qctecmdr
bb93ad4d2b Merge "soc: qcom: Fix printk format warnings from subsystem restart" 2019-10-01 17:32:42 -07:00
qctecmdr
ecc7656ce7 Merge "msm: ipa4: Fix to add wake up handle for coalescing pipe" 2019-10-01 17:32:41 -07:00
qctecmdr
6484f51a25 Merge "of: reserved_mem: add missing of_node_put() for proper ref-counting" 2019-10-01 16:53:22 -07:00
qctecmdr
811cdc9fa1 Merge "iommu: iommu-debug: select IOMMU_DEBUGFS for iommu tests" 2019-10-01 16:53:21 -07:00
qctecmdr
bdb2791054 Merge "dt-bindings: regulator: rpmh-regulator: add new intermediate voltage levels" 2019-10-01 16:14:30 -07:00
qctecmdr
c58400efd6 Merge "dt-binding: regulator: rpmh-regulator: define RPMh sets and regulator modes" 2019-10-01 15:38:30 -07:00
Bjorn Andersson
8757d5ff17 net: qrtr: Make qrtr_port_lookup() use RCU
The important part of qrtr_port_lookup() wrt synchronization is that the
function returns a reference counted struct qrtr_sock, or fail.

As such we need only to ensure that an decrement of the object's
refcount happens inbetween the finding of the object in the idr and
qrtr_port_lookup()'s own increment of the object.

By using RCU and putting a synchronization point after we remove the
mapping from the idr, but before it can be released we achieve this -
with the benefit of not having to hold the mutex in qrtr_port_lookup().

Change-Id: Ia9907a9c97a29e92a92e67afa988207f501a2f48
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Patch-mainline: linux-arm-kernel @ 07/05/19, 23:06
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-01 15:32:25 -07:00
Bjorn Andersson
332849c5f7 net: qrtr: Implement outgoing flow control
In order to prevent overconsumption of resources on the remote side QRTR
implements a flow control mechanism.

The mechanism works by the sender keeping track of the number of
outstanding unconfirmed messages that has been transmitted to a
particular node/port pair.

Upon count reaching a low watermark (L) the confirm_rx bit is set in the
outgoing message and when the count reaching a high watermark (H)
transmission will be blocked upon the reception of a resume_tx message
from the remote, that resets the counter to 0.

This guarantees that there will be at most 2H - L messages in flight.
Values chosen for L and H are 5 and 10 respectively.

Change-Id: Ifa3c0c5821d31e385c34428d0bd4f5b5eec2fb77
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Patch-mainline: linux-arm-kernel @ 07/05/19, 23:06
[clew@codeaurora.org: Fix uninitialized qrtr_tx_lock mutex]
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-01 15:32:25 -07:00