Enable several SPMI and PMIC drivers which are needed to provide
baseline support of PMIC peripherals.
Change-Id: Ifb4414083764bbae64904d8629528cc4dda3a39c
Signed-off-by: David Collins <collinsd@codeaurora.org>
Enable CONFIG_IIO in lahaina_QGKI.config so that drivers which
depend upon it can function before CONFIG_IIO is enabled in
gki_defconfig.
Change-Id: I6afa93e6054d67157b1d435aa10688ab37220612
Signed-off-by: David Collins <collinsd@codeaurora.org>
Generate a new irqchip struct for each pinctrl device that is
registered to avoid sharing the same irqchip between devices.
This corrects the following error which is printed when
registering more than one pinctrl-spmi-gpio device:
"detected irqchip that is shared with multiple gpiochips:
please fix the driver."
Change-Id: I80ce67fc674b96f4386499f547395ceed7480583
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for qcom,pmr735a-gpio and qcom,pmr735b-gpio variants.
Change-Id: I773d2539af146be56b091ced8709ae8dabe6e36e
Signed-off-by: David Collins <collinsd@codeaurora.org>
There could be cpufreq hw where accumulative cycle counters are not
supported. Add a device tree property to identify the same.
On those hardware the cycle counter needs to be read from core-0 of the
frequency domain.
Change-Id: Ib7969b2c5aaaf78f7c8359d7c417b9453e6c1f2f
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Initialization of the spinlock is required to avoid the below trace.
cpufreq: driver qcom-cpufreq-hw up and running
BUG: spinlock bad magic on CPU#7, swapper/0/1
lock: qcom_cpufreq_counter+0x128/0x140, .magic: 00000000,
.owner: <none>/-1, .owner_cpu: 0.
Change-Id: I079ebd7c0009c3b634d2d5d41ac880da06cf8f6d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Update the cpufreq hardware register offsets data for non EPSS devices to
be able to parse the LUTs of frequency and voltage.
Re-introduce the commit '00319840a4af ("cpufreq: qcom-hw: Update freq_scale
from fast_switch path")'
The freq_scale maintained by the topology driver needs to be updated when
the frequency is transitioned. Without this, the current capacity of a CPU
metric gets broken in the scheduler.
The current code calls arch_set_freq_scale() from the target_index method
but not from the fast_switch method. Fix this.
Change-Id: I2789b76f14b4c0fe8ad52b449ed9f4ea3a4bff32
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The freq_scale maintained by the topology driver needs to be
updated when the frequency is transitioned. Without this,
the current capacity of a CPU metric gets broken in the scheduler.
The current code calls arch_set_freq_scale() from the target_index
method but not from the fast_switch method. Fix this.
Change-Id: I92cafba9ffd4a70c8a06ed54e4e410336de4d453
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This is in preparation for updating the current driver to the upstreamed
code. Add support to take care of EPSS firmware related code.
Change-Id: I4bd4165a8457dcaedc26d3bc8704db0c886832ed
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The generation of kheader.tar.xz file uses xargs in ways that seems to
be unaccepatble by certain build environments, thus leading to build
failures. Disable the CONFIG to avoid the situation.
Change-Id: Ib7a2ca0c449f22021e80ac1382a9e5bdf6b388ba
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
CPU cooling driver uses the IDA index to name the CPU cooling device.
This doesn't give the visibility of which cpufreq policy this particular
cooling device is managing.
Use the Policy CPU as the cooling device ID and this will have a one to
one correlation to the cpufreq policy ID.
Change-Id: I1ee0ac383328f4eb7e3f83e970d03af97aba9953
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
Include qcom thermal drivers when CONFIG_ARCH_QCOM is enabled instead of
CONFIG_QCOM_TSENS, which is associated with tsens sensor driver.
Change-Id: I944caf2de153f482a3607ad103da3b400f902885
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
Remove IPC logging from fastrpc driver since fastrpc will be
enable as a DLKM module on lahaina-gki config but IPC logging
will not be supported on lahina-gki configuration.
Change-Id: I31c65090c7dc5b01941c0f7356a898a0d5c81f01
Signed-off-by: Edgar Flores <edgarf@codeaurora.org>
PCIe DRV needs to recover the link as soon as possible before
the device on the other side of the link times out. Allow PCIe
DRV to register for early SSR notifications to have a chance of
making the recovery latency.
Change-Id: I75ce59075efcebc7c4457d300f7558b837d725a0
Signed-off-by: Tony Truong <truong@codeaurora.org>
Add support for the RTC peripheral found in PMK8350 PMIC chips.
Change-Id: Id4b93ae8017a174f577496078ed8ab8d73eabff8
Signed-off-by: David Collins <collinsd@codeaurora.org>
The QTI Tri-driver enables the configuration of the output of LED
channels in the TRI_LED and HR_LED peripherals found in QTI PMICs.
Change-Id: I4ecf94b0dc9e4b53d81c8c9d7328d039504f8c66
Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org>
