Commit graph

879,608 commits

Author SHA1 Message Date
George Shen
da53e790e2 msm: cvp: Optimize synX handling in cvp driver
Make synX handling in kernel independent of CVP features. It also
simplified handling logic.

Change-Id: I598d2c78f0fea4463c5801b5db945b74c071ebab
Signed-off-by: George Shen <sqiao@codeaurora.org>
2020-04-02 16:15:39 -07:00
qctecmdr
f115a8d721 Merge "usb: phy: Keep regulators on in probe if EUD is enabled" 2020-04-01 13:43:12 -07:00
qctecmdr
4a558998c4 Merge "haven: Include notifer header file" 2020-04-01 13:43:12 -07:00
qctecmdr
8a7d97989a Merge "msm: cvp: Reverse cvp gdsc and cbcr ctrl sequence" 2020-04-01 13:43:12 -07:00
qctecmdr
9b7f353e03 Merge "msm: adsprpc: remove DMA coherency attributes in fastrpc driver" 2020-04-01 13:43:11 -07:00
qctecmdr
5e6a4ba46b Merge "msm: pcie: validate speed switch request" 2020-04-01 02:51:03 -07:00
qctecmdr
48acb36f17 Merge "msm: pcie: use a local copy for PCIe event callback" 2020-04-01 02:51:03 -07:00
qctecmdr
b794026d80 Merge "iommu: iommu-debug: Fix input IOVA usage in atos_write()" 2020-04-01 02:51:02 -07:00
qctecmdr
c3faeded5b Merge "arm64: defconfig: Enable neuron for genericarmv8" 2020-03-31 21:53:24 -07:00
qctecmdr
713c086d78 Merge "msm: cvp: Relocate CVP DSP interface init" 2020-03-31 21:53:23 -07:00
Isaac J. Manjarres
4b38a9359f haven: Include notifer header file
The haven RM driver header file exposes functions where notifier
blocks are used. However, not all clients who include the
header file will necessarily have the notifier header file
in their source file, which causes compilation errors. Thus,
include the notifier header file in the RM driver header file
so that all other clients don't have to.

Change-Id: If74509e5d7fc2bbaeb4a427a7cd576f853fd8358
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-03-31 16:43:23 -07:00
Himateja Reddy
137dd394d0 msm: adsprpc: remove DMA coherency attributes in fastrpc driver
Remove the use of DMA_ATTR_FORCE_NON_COHERENT and
DMA_ATTR_FORCE_COHERENT attributes while allocating and mapping
memory in the fastrpc driver, as they are not supported in a GKI
kernel. Ignore any per-buffer coherency attributes passed by
userspace.

Add a new config option that can be used by the fastrpc driver to
detect if it is being compiled in a QGKI kernel. Read the DMA
coherency property of the fastrpc device nodes only if this config
has been enabled. On a GKI kernel, the cache maintenance will
always be done by the fastrpc driver.

Change-Id: Id1e715da4462d9fb8819fc1c85f7b0c7d8610f24
Acked-by: Thyagarajan Venkatanarayanan <venkatan@qti.qualcomm.com>
Signed-off-by: Himateja Reddy <hmreddy@codeaurora.org>
2020-03-31 12:09:04 -07:00
George Shen
762ad3fd5b msm: cvp: Reverse cvp gdsc and cbcr ctrl sequence
It fixes a CVP CBCR access timeout induced NOC ERR.

Change-Id: I5ec7b016c0db62b84ffc05c58cba5cbc3b29f98d
Signed-off-by: George Shen <sqiao@codeaurora.org>
2020-03-31 11:50:40 -07:00
qctecmdr
b459044e6e Merge "Revert "cnss2: Add support for bus bandwidth scale"" 2020-03-31 11:49:53 -07:00
qctecmdr
e58b281c91 Merge "FROMGIT: BACKPORT: driver core: Add device links from fwnode only for the primary device" 2020-03-31 11:49:53 -07:00
Isaac J. Manjarres
54ea4d3484 iommu: iommu-debug: Fix input IOVA usage in atos_write()
atos_write() uses the IOVA stored in the debug device structure
for translating the input IOVA to a physical address, which is
not correct, given that the debug device structure's IOVA field
has not been initialized yet. Use the IOVA given as an input
for translating the IOVA to a physical address.

Change-Id: I7a8f241abc573fcf877147ca4d808c025cbb45f9
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-03-31 11:17:47 -07:00
Chris Lew
fe74842bfa arm64: defconfig: Enable neuron for genericarmv8
Enable Neuron service, block and transport drivers to enable block
device sharing across virtual machines.

Change-Id: Ia5dcc5c3010340a9e70f2163fad0a5dddbedd59d
Signed-off-by: Chris Lew <clew@codeaurora.org>
2020-03-30 21:45:58 -07:00
Chris Lew
49bf251961 arm64: defconfig: Enable neuron for lahaina
Enable neuron service, neuron block application and haven
transport drivers for lahaina.

Change-Id: I800cfda913c666fc5f8586bce0ce85bf1c6f4f8b
Signed-off-by: Chris Lew <clew@codeaurora.org>
2020-03-30 21:45:42 -07:00
Chris Lew
6493564fe3 net: Add Neuron Framework
Neuron is a device-sharing framework which is used by guests of the
haven hypervisor to serve or access shared I/O devices and other
inter-VM services.

There are three main layers that make up a neuron service.
channel - the physical layer transport that uses the hypervisor
          provided transports.

protocol - defines the syntax and semantics to virtualize a specific
           device across VMs. Block and Net are examples of protocols.

application - integrates the neuron service components into the rest of
              the system. There would be front and back end application
              drivers for the net protocol.

Change-Id: Ic7278fdaee1cd30147e91e1126643bce79c05e52
Signed-off-by: Chris Lew <clew@codeaurora.org>
2020-03-30 21:44:24 -07:00
George Shen
16f3b60054 msm: cvp: Relocate CVP DSP interface init
It fixed a page fault issue if DSP glink probing happens before
cvp device probing.

Change-Id: Ie3ec2cf3c213fca9fc685c6c44cccbf4d1e59bde
Signed-off-by: George Shen <sqiao@codeaurora.org>
2020-03-30 16:04:08 -07:00
Mayank Rana
667a4a62b3 usb: phy: Keep regulators on in probe if EUD is enabled
EUD may be enable in boot loader and to keep EUD session alive across
kernel boot till USB phy driver is initialized based on cable status,
keep regulators on from USB high speed phy driver's probe. Regulators
shall get turn off while handling USB cable disconnect routine for
both boot up with and without USB cable case.

Change-Id: Ic6ac92be11a91c18ec89c39f17d7c445dee98263
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-03-30 11:44:12 -07:00
qctecmdr
1264c046de Merge "sched: walt: Improve the Scheduler" 2020-03-30 07:21:11 -07:00
qctecmdr
5ab3549e29 Merge "arm64: defconfig: Add support for LKDTM on Lahaina" 2020-03-30 07:21:11 -07:00
qctecmdr
237a73f401 Merge "msm: ipa4: new qmap flow control pipe definitions" 2020-03-30 07:21:10 -07:00
qctecmdr
c592caba4a Merge "haven: msgq: Initialize the cap-id with U64_MAX" 2020-03-30 07:21:10 -07:00
qctecmdr
51b24ffda1 Merge "msm: kgsl: Scale hub clock to 150 Mhz" 2020-03-30 07:21:10 -07:00
qctecmdr
026e011961 Merge "coresight: Add spin_lock_init for funnel and replicator" 2020-03-30 07:21:10 -07:00
qctecmdr
fd77bb96cc Merge "cnss2: Make sure PCIe link is in L0 state before updating time sync" 2020-03-29 21:21:57 -07:00
qctecmdr
9da0a58535 Merge "staging: ion: Allow for attach and detach ops to be overridden" 2020-03-29 21:21:56 -07:00
qctecmdr
47ab010aef Merge "pinctrl: qcom: Add GPIO wakeup interrupt map for Shima" 2020-03-29 21:21:56 -07:00
Raghavendra Rao Ananta
1bdf8b9d3e haven: msgq: Initialize the cap-id with U64_MAX
Currently, the cap-id for Tx and Rx of the message-queue are
initialized with 0. However, 0 is a valid value for cap-id.
A better value to initialize the cap-id is with U64_MAX. Hence,
make corrections to use U64_MAX, defined as HH_CAPID_INVAL, in
the message-queue driver.

Change-Id: Ia501e87dc3cb8d880ea3d35ff000ca07b64aeced
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-03-29 13:00:48 -07:00
qctecmdr
3df7f60dd2 Merge "msm: kgsl: Don't send same bus vote repeatedly" 2020-03-29 00:33:17 -07:00
qctecmdr
e96549e852 Merge "HID: qvr: Removing axis orientation" 2020-03-29 00:33:16 -07:00
qctecmdr
3a1a6e84ba Merge "FROMGIT: driver core: Call sync_state() even if supplier has no consumers" 2020-03-29 00:33:16 -07:00
qctecmdr
1affd44480 Merge "coresight: cti: Correct checking return value of device resume" 2020-03-29 00:33:16 -07:00
qctecmdr
834d2b560e Merge "msm: adsprpc: Adding inrout buffer cache maintenance support" 2020-03-28 12:42:23 -07:00
qctecmdr
a6e75c3ac2 Merge "mhi: cntrl: qcom: notify DRV suspend if device wake is set" 2020-03-28 12:42:22 -07:00
qctecmdr
d84e7b7049 Merge "mhi: core: Add range check for channel id received in event ring" 2020-03-28 12:42:22 -07:00
qctecmdr
ed86236edb Merge "power: supply: qti_battery_charger: Allow ICL to be set only for SDP" 2020-03-28 12:42:22 -07:00
Manikandan Mohan
b2f765d2d7 Revert "cnss2: Add support for bus bandwidth scale"
This reverts commit c1284ad3b8.

Change-Id: Icc94b6d0b880260601218f7040baf4755e180b5f
Signed-off-by: Manikandan Mohan <manikand@codeaurora.org>
2020-03-28 12:01:43 -07:00
qctecmdr
d711937055 Merge "arm64: defconfig: Enable hung tasks detection" 2020-03-28 07:28:13 -07:00
qctecmdr
9d40a272d9 Merge "drivers: input: touchscreen: defer probe if panel not found" 2020-03-28 07:28:13 -07:00
qctecmdr
cf92dce455 Merge "regulator: qpnp-lcdb: Replace revid checks with DT compatible properties" 2020-03-28 07:28:13 -07:00
qctecmdr
a9f7a23680 Merge "msm: pcie: skip memory access when collecting PCIe PARF registers" 2020-03-28 07:28:12 -07:00
qctecmdr
672df0d169 Merge "defconfig: Enable mem_dump driver on gki build for lahaina" 2020-03-28 07:28:11 -07:00
Mao Jinlong
2966cf8c26 coresight: Add spin_lock_init for funnel and replicator
Add spin_lock_init for funnel and replicator to avoid spinlock issue.

Change-Id: I6cb14bfd363e8d92070af2e0e99e60eaf45d923b
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
2020-03-28 10:26:50 +08:00
Yue Ma
b29497153c cnss2: Make sure PCIe link is in L0 state before updating time sync
Current driver will check PCIe link status by reading PCIe config space
before updating time sync registers. However, there is a drawback to use
PCIe API pci_read_config_word() to access config space since it will
disable interrupt and then perform read. If PCIe link is in L1 or L1ss
state, there may be more than 4ms needed to change the link state to L0
in order to access so it will cause jank for other time critical tasks.
Hence make sure PCIe link is in L0 state before updating time sync
registers instead of checking config space.

Change-Id: I59ca63c38b5af9e38e5a04d8e679f4dfde294746
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2020-03-27 17:21:04 -07:00
qctecmdr
303048eeb5 Merge "msm: cvp: A fix of cvp issue in camera" 2020-03-27 12:03:31 -07:00
Mayank Rana
93be488bb0 arm64: defconfig: Enable media and UVC drivers on Lahaina
Media and USB Video Class drivers are needed to get USB video
devices functional in USB host mode. Hence enable media and USB
video class drivers on Lahaina.

Change-Id: I70ccc146b55a564b4408496a54b044d52cbf9e41
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-03-27 08:53:16 -07:00
qctecmdr
e51f74d2f1 Merge "msm: kgsl: LPAC is using incorrect pagetable" 2020-03-27 03:47:19 -07:00