Commit graph

898,761 commits

Author SHA1 Message Date
qctecmdr
f716cd752c Merge "msm: ep-pcie: Correct two CAP reg offsets" 2021-05-12 23:55:16 -07:00
qctecmdr
ff3d25b276 Merge "clk: qcom: gdsc: Update the BLK_ARES assert/deassert delay" 2021-05-12 23:55:16 -07:00
qctecmdr
5b628b2f9a Merge "usb: phy: Drive a pulse on DP on CDP detection" 2021-05-12 23:55:15 -07:00
qctecmdr
dbb99d92c2 Merge "cnss2: Fix invalid assignment due to type mismatch" 2021-05-12 23:55:15 -07:00
qctecmdr
3ecdedce1b Merge "defconfig: monaco: add stm proto basic" 2021-05-12 19:00:45 -07:00
qctecmdr
4beeba5338 Merge "arm: defconfig: enable thermal drivers for monaco" 2021-05-12 16:18:45 -07:00
qctecmdr
ed787f8498 Merge "soc: qcom: ddr_stats: update driver to get reg in probe" 2021-05-12 13:36:29 -07:00
qctecmdr
552a812707 Merge "msm: kgsl: Fix snapshot collection for ib1" 2021-05-12 08:42:25 -07:00
qctecmdr
146fa24541 Merge "soc: qcom: smem: Fix compilation warning" 2021-05-12 08:42:25 -07:00
qctecmdr
7909de7b54 Merge "sched: walt: Fix stale walt CPU reservation flag" 2021-05-12 05:57:27 -07:00
qctecmdr
787f7bf33d Merge "char: virtio_fastrpc: read domain number from device tree" 2021-05-12 03:01:03 -07:00
qctecmdr
060901c8f1 Merge "arm64: defconfig: Enable IOMMU related configs on direwolf" 2021-05-12 03:01:03 -07:00
qctecmdr
34a80d7261 Merge "pinctrl: qcom: spmi-pmic: Add "pm5100-gpio" compatible string" 2021-05-12 03:01:03 -07:00
qctecmdr
dc53396363 Merge "cnss2: Dump MHI/PBL/SBL debug data during MHI power on" 2021-05-12 00:07:02 -07:00
qctecmdr
e38c09a5b8 Merge "pci: msm: msm_pcie_iatu_config API clean" 2021-05-11 18:40:45 -07:00
Can Guo
c150d993f3 msm: ep-pcie: Correct two CAP reg offsets
Correct the offsets of L1SUB_CAPABILITY_REG and L1SUB_CONTROL1_REG.

Change-Id: I6130a7eab50d85e34d87c28bde3a48c058ee9eee
Signed-off-by: Can Guo <cang@codeaurora.org>
2021-05-12 07:59:40 +08:00
Can Guo
bab76a95c0 msm: ep-pcie: Allow device enter L1 right after BME is set
Allow device enter L1, i.e. clear PCIE_0_PCIE_PARF_PM_CTRL[REQ_NOT_ENTR_L1]
once we find out BME is set.

Change-Id: I8aca816446a286d02ef51724d157cb7c75057250
Signed-off-by: Can Guo <cang@codeaurora.org>
2021-05-12 07:59:17 +08:00
qctecmdr
e65b513369 Merge "pci: msm: Add dynamic iATU config for ep config space access" 2021-05-11 15:52:29 -07:00
Manaf Meethalavalappu Pallikunhi
6095d843da arm: defconfig: enable thermal drivers for monaco
Enable thermal sensors, governors and cooling device
drivers for monaco.

Change-Id: Iabc1a6501cb953dbfdf2813716022ceac0194d86
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
2021-05-11 22:39:53 +05:30
Pankaj Gupta
274824c561 msm: kgsl: Fix snapshot collection for ib1
Sometimes IB1_BASE from register does not match with IB1 of the
ring buffer, this may happen while doing save restore of IB
during preemption. In such case, to dump IB1 in snapshot, check
for overlap between IB1_BASE and IB1 from the ring buffer and
dump IB1 in snapshot as per ring buffer's IB1 base and size.

Change-Id: Ic3af8678a11f20f447fcbcbd3ec209283619b96a
Signed-off-by: Pankaj Gupta <gpankaj@codeaurora.org>
2021-05-11 17:18:11 +05:30
qctecmdr
887e689725 Merge "Fixing the GVM suspend failure due to veth_ipa_suspend" 2021-05-11 04:21:50 -07:00
Minghao Xue
735d4c5201 char: virtio_fastrpc: read domain number from device tree
domain number could be different between platforms.

Change-Id: I6fa33635305ec71ec2ebaec35f7a68bbe0181609
Signed-off-by: Minghao Xue <mingxue@codeaurora.org>
2021-05-11 16:53:13 +08:00
qctecmdr
8f48489bc2 Merge "clk: qcom: gcc-blair: Add support for AHB clocks" 2021-05-11 01:42:47 -07:00
qctecmdr
b9ca7556ae Merge "drivers: rename_block: Enable A/B support" 2021-05-11 01:42:47 -07:00
Minghao Zhang
89d7b6ef3d soc: qcom: ddr_stats: update driver to get reg in probe
This change optimizes to get reg during probe.
With this change no need to ioremap_nocache() reg for every
ddr_stats_show() call.

Change-Id: Ieb38280d1f03e1d613e638a7532b7b014525fbf1
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
Signed-off-by: Minghao Zhang <minghao@codeaurora.org>
2021-05-11 16:39:13 +08:00
Veera Vegivada
938bcb66ce arm64: defconfig: Enable IOMMU related configs on direwolf
Enable the ARM SMMU driver as a module for direwolf GKI
and also enable other IOMMU configs for direwolf QGKI.

Change-Id: I3b27eda0efbf64411de22a36a430121356bb79bd
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2021-05-11 10:20:27 +05:30
Vivek Kumar
95dae267d0 arm64: defconfig: Enable IPCC driver as a module for direwolf
Enable IPCC driver as a loadable kernel module for direwolf.

Change-Id: I03bdc05193b9892e99a02c9855dcfe3e6a20a69e
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
2021-05-11 10:19:39 +05:30
Sriharsha Allenki
ef4e7c17dd usb: phy: Drive a pulse on DP on CDP detection
Some USB host PCs switch the downstream port mode from
CDP to SDP if the device does not pull DP up within certain
duration (~2s).
This limits the current drawn by the device to 500mA(or 900mA)
as opposed to the possible 1.5A resulting in slow charging of
the battery.
Fix this by driving a DP pulse when there is a connect
notification from PMIC and detected the charger type as CDP.

Change-Id: I76ac4c33dbbc538f5cb680fd1b5c15f8fb3bfe50
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Signed-off-by: Udipto Goswami <ugoswami@codeaurora.org>
2021-05-11 09:57:01 +05:30
Hemant Kumar
12f060439d pci: msm: msm_pcie_iatu_config API clean
Get rid of access to pciedev_table. Update data type
for bdf from unsigned long to u32. Prevent iATU config
for root port BDF. Do not save config values to rc_shadow
as iATU is configured dynamically.

Change-Id: I9e7254d1e6d91869db71c71f1c5b699a4d6376f4
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:12:13 -07:00
Hemant Kumar
5d4e8db03a pci: msm: Refactor endpoint event registration
For endpoint event registration do not depend on
num_ep, active_num_ep and pending_ep_reg variables.
Instead, create a list of registered endpoints and
notify an endpoint by iterating over the list of
registered endpoints with their corresponding
registered event. This also removes dependency on
PCIe device table and simplifies
msm_pcie_config_device_table function. Keep the
handling of upstream port I/O, memory and BME.

Change-Id: I5ab25ef300f0bc59ae5c2d973c662a0f81e44f43
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:12:05 -07:00
Hemant Kumar
5d3e24ee00 pci: msm: Use endpoint list to track suspend and resume
Decouple endpoint event registration from link suspend.
Instead of relying on pending_ep_reg and num_active_ep
create an enumerated endpoint list at the time of endpoint
enumeration and move it to suspended endpoint list up
on link suspend. If enumerated endpoint list becomes
empty allow link suspend. Move endpoint back to enumerated
list upon resume. This also removes a race where all
endpoints have not completed their enumeration and one of
the endpoints request to suspend the link.

Change-Id: I22ac6e52a4c93d294d2a365da63cc7292e5e36ce
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:12:00 -07:00
Hemant Kumar
3d8ab59065 pic: msm: Clean up msm_pcie_pm_control API
Instead of using global array of msm_pcie_dev use
existing PCIe device pointer in the function. Also
fix the indentation of the debug log strings.

Change-Id: I82eaaf2bfcbd4f588d1970131e0185f51d0f8ea5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:54 -07:00
Hemant Kumar
aae80a9b0f pci: msm: Add dynamic iATU config for ep config space access
It possible that EP gets PCI probe and tries to access EP config
space before driver could finish setting up PCIe device table.
Due to this race before driver could populate the config base
address in table, operation config call back from framework
tries to de-reference config base address which is NULL. Fix
this issue by dynamically configuring iATU with config space
address range mapping to the BDF for which config space is
requested for. This prevents access to pcie device table which
is used for static mapping for multiple device config space to
its BDF.

Change-Id: Ie6a83355087912369e46f028d8ffe5e4b5a5fba5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:47 -07:00
Hemant Kumar
b492f59d0f pci: msm: Use operation config read/write APIs in AER handler
AER handler is directly using raw read and write APIs to access
endpoint config space. Instead, use PCI framework provided APIs
as well as the register macros to stream line all config space
reads and writes to go through PCI read and write operation.
Also, use PCI framework APIs to find the pci device using BDF
this removes the dependency on local pci device table.

Change-Id: I5b0fa2dc6eb383d9db2dc42f026a2b6cb85b3d71
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:31 -07:00
Hemant Kumar
4ae8c3a83e pci: msm: Handle AER in threaded irq context
AER handling requires finding the source pci device on
the bus which causes the AER. Source pci device is found
using bus, device and function number. Finding pci device
requires sleeping context because bus is walked by holding
semaphore. Hence move AER handling to threaded irq context.

Change-Id: Ia51b91560326be2a85e17ce98315ea39d25641e2
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-05-10 21:11:01 -07:00
qctecmdr
07852f68c9 Merge "srcu: Avoid escaped section names" 2021-05-10 20:12:42 -07:00
qctecmdr
eb6b3094be Merge "pci: msm: Refactor msm_pcie_confirm_linkup function" 2021-05-10 17:29:47 -07:00
Mahesh Kumar Kalikot Veetil
beec968224 cnss2: Fix invalid assignment due to type mismatch
The firmware size returned by request_firmware api is size_t which is
unsigned long in some platforms. Typeacast the size to u32 to match with
supported interface definition.

Change-Id: I61a484e74bf7932508295aac2fe7cfd7298d7953
Signed-off-by: Mahesh Kumar Kalikot Veetil <mkalikot@codeaurora.org>
2021-05-10 15:46:29 -07:00
Shyam Kumar Thella
c5600f6ce2 pinctrl: qcom: spmi-pmic: Add "pm5100-gpio" compatible string
Add "pm5100-gpio" compatible string to add support for PM5100
gpios.

Change-Id: I4eceac12880767d72f822d00911ace2295c56f46
Signed-off-by: Shyam Kumar Thella <sthella@codeaurora.org>
2021-05-10 22:37:34 +05:30
qctecmdr
8b02e66e74 Merge "drivers: thermal: Snapshot of lmh cpu VDD driver from msm-4.19" 2021-05-10 07:00:10 -07:00
qctecmdr
22033f03e8 Merge "defconfig: sdmsteppeauto: Enable kenel debug flags" 2021-05-10 07:00:10 -07:00
qctecmdr
5743323a4d Merge "net: qrtr: Use cyclic idr allocator for port assignment" 2021-05-10 07:00:07 -07:00
Huixian Ma
c1908797dc defconfig: monaco: add stm proto basic
Enable STM_PROTO_BASIC to support to write log to /dev/coresight-stm

Change-Id: I37dc42a5ba1c9a2b973ca5150b66c1354c047a86
Signed-off-by: Huixian Ma <huixma@codeaurora.org>
2021-05-10 19:15:13 +08:00
Jagadeesh Kona
ae78a04c5f clk: qcom: gcc-blair: Add support for AHB clocks
Add support for Camera, Display, GPU and Video
AHB clocks.

Change-Id: I1c60f2f720b57659ab92e770448c1ce1c27a359e
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
2021-05-10 14:09:41 +05:30
qctecmdr
8e8bbdacf2 Merge "msm: kgsl: Avoid flooding kernel log with invalid ioctl errors" 2021-05-10 01:39:19 -07:00
Nick Desaulniers
b8cbf3a702 srcu: Avoid escaped section names
The stringification operator, `#`, in the preprocessor escapes strings.
For example, `# "foo"` becomes `"\"foo\""`.  GCC and Clang differ in how
they treat section names that contain \".
The portable solution is to not use a string literal with the
preprocessor stringification operator.

Change-Id: I7ec44bd2ef15fa8019f2fa5efe2eddf40585ab5a
Link: https://bugs.llvm.org/show_bug.cgi?id=42950
Fixes: fe15b50cde ("srcu: Allocate per-CPU data for DEFINE_SRCU() in modules")
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Git-commit: c1370c128cf49147f1d4c670b7101134231b3dc5
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: lixiang <lixiang@codeaurora.org>
2021-05-10 01:35:52 -07:00
Bojun Pan
8a64c61c18 Fixing the GVM suspend failure due to veth_ipa_suspend
veth_ipa_suspend function returning an error when the interface
is already in deactivated is fixed. Changed the return
value from -EPERM to non error as there is no error in this case.

Change-Id: I10f283e767a442e6897c4d35cc370bbc84dd2d9d
Acked-by: Sarosh Hasan <sarohasa@qti.qualcomm.com>
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2021-05-10 00:43:10 -07:00
Venkata Rao Kakani
57d4114d68 drivers: rename_block: Enable A/B support
Enable A/B support by appending slot suffix based on
androidboot.slot_suffix.

Change-Id: I7bdc798f6203ba026606d56cf0bc76e0cfbb6b4a
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-05-10 13:08:57 +05:30
Pavankumar Kondeti
dc23aae552 sched: walt: Fix stale walt CPU reservation flag
When CPU trying to move a task to other cpu in active load balance or
by other means, then the other helping cpu marked as reserved to avoid
 it for other scheduler decisions. Once the task moved successfully,
the reservation will be cleared enables for other scheduler decisions.
The reserved flag is been analogously protected with busy cpu’s
rq->active_balance, which is protected with runqueue locks. So whenever
rq->active_balance is set for busy cpu, then reserved flag would set for
helping cpu.

Sometimes, it is observed that, cpu is marked as reserved with no cpu's
rq->active_balance set. There are some unlikely possible corner cases
may cause this behavior:
 - On active load balance path, cpu stop machine returns queued status
   of active_balance work on cpu_stopper, which is not checked on active
   balance path. so when stop machine is not able to queue ( unlikely),
   then reserved flag wouldn't be cleared.

   So, catch the return value and on failure, clear reserved flag for cpu.

 - Clear_walt_request() called on the cpu to clear any pending walt works,
   it may possible that, push_task might have changed or cleared, then
   reserved cpu would be left uncleared.

   So clear the push_cpu independent of push_task.

Change-Id: I75d032bf399cb3da8e807186b1bc903114168a4e
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
2021-05-10 12:24:29 +05:30
Vinay Sudra
7a5cc733fe defconfig: sdmsteppeauto: Enable kenel debug flags
Enable debug flags for various kernel subsystem

Change-Id: I3e61d072a935811ecece09e45870e0e200a45bb0
Signed-off-by: Vinay Sudra <vsudra@codeaurora.org>
2021-05-09 23:48:06 -07:00