A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-15 01:01:56 -04:00
Code Issues Projects Releases Packages Wiki Activity
3,282 commits 10 branches 0 tags 2.1 GiB
Commit graph

3,282 commits

This branch
This branch
All branches
Author SHA1 Message Date
Kiran Gunda
2139ab6586 dt-bindings: input: qpnp-power-on: Update "reg" property description 
Update the description of "reg" property to add the PON_PBS base
address along with PON_HLOS base address. Also add "reg-names"
property.

Change-Id: I257950babd4b68f3ab933679bd94936813531e25
 2020-11-25 04:35:08 -08:00
qctecmdr
46b4d4213f Merge "ARM: dts: msm: refine QDSS config for sdxlemur" 2020-11-24 22:12:51 -08:00
qctecmdr
8f5a8ade5a Merge "ARM: dts: msm: modify dcc_ram_offset for sdxlemur" 2020-11-24 22:12:51 -08:00
qctecmdr
d1bcd59ada Merge "ARM: dts: msm: Update GPUCC clock node and GDSC for YUPIK" 2020-11-24 12:44:42 -08:00
qctecmdr
4a21f2577d Merge "ARM: dts: msm: Add dma-coherent for tmc-etr on Lahaina" 2020-11-24 12:44:42 -08:00
qctecmdr
8de9d2bfb2 Merge "ARM: dts: msm: Add UFS support for SA8155" 2020-11-24 12:44:42 -08:00
qctecmdr
76964c82cb Merge "ARM: dts: msm: DDR cooling device no mitigation for lahaina" 2020-11-24 12:44:42 -08:00
qctecmdr
54d0913edc Merge "ARM: dts: msm: Add Wakeup interrupt controller for scuba-iot" 2020-11-24 09:02:36 -08:00
qctecmdr
784b16624c Merge "ARM: dts: msm: Reduce secure heap to 30MB" 2020-11-24 09:02:36 -08:00
qctecmdr
3f05045f22 Merge "ARM: dts: msm: Add ARM PMU node for Yupik" 2020-11-24 09:02:35 -08:00
qctecmdr
3a8770cf70 Merge "ARM: dts: msm: Enable NAND and SD card for sdxlemur target" 2020-11-24 09:02:35 -08:00
qctecmdr
21eaa5d824 Merge "ARM: dts: msm: Support CNSS WLAN device for sdxlemur" 2020-11-24 09:02:35 -08:00
qctecmdr
9c62606c6a Merge "ARM: dts: msm: Enable bluetooth for sdxlemur" 2020-11-24 09:02:35 -08:00
qctecmdr
b2549548aa Merge "ARM: dts: msm: Change the node location for optimization for Shima" 2020-11-24 05:19:03 -08:00
qctecmdr
5b0380ed0d Merge "ARM: dts: msm: Add QUPv3 SE and GPI DT nodes for yupik" 2020-11-24 05:19:03 -08:00
qctecmdr
702cd3fa53 Merge "ARM: dts: msm: Add Bus voting support" 2020-11-24 05:19:03 -08:00
qctecmdr
f99cb8e509 Merge "ARM: dts: msm: Disable scaling for SD and eMMC on sdxlemur" 2020-11-24 05:19:02 -08:00
Yuanfang Zhang
38202b5574 ARM: dts: msm: modify dcc_ram_offset for sdxlemur 
Modify dcc_ram_offset to 0x12000 on sdxlemur.

Change-Id: Iadb7d0ce55976cb9a29fdc6d57b4ea46783bc6b1
 2020-11-24 17:57:07 +08:00
Yuanfang Zhang
84870f513d ARM: dts: msm: refine QDSS config for sdxlemur 
Add reset and flush trigger number for etr and etf.

Change-Id: Iec420ee00ac45ca37e525f3736e0204d6c36e71b
 2020-11-24 17:54:50 +08:00
Veera Vegivada
1d1f0d89ff ARM: dts: msm: Add UFS support for SA8155 
Add UFS host controller and UFS PHY (attached to embedded UFS card)
for SM8150 platform and SA8155.

Change-Id: I2f58f3bd2457fed0baaffa5233bbd2c92ec22c12
 2020-11-24 14:01:41 +05:30
Veera Vegivada
67d4b4a46a ARM: dts: msm: add interconnect devices for sm8150 
Add stub interconnect devices for aggre1_noc, aggre2_noc,
camnoc_virt, compute_noc, config_noc, dc_noc, gem_noc,
ipa_virt, mc_virt, mmss_noc, system_noc, gem_noc_display,
mc_virt_display, mmss_noc_display. This will allow consumers
to get their path and set bandwidth constraints on them.
And add bcm voter devices that live under RSC devices
to allow interconnect providers to target their votes
for meeting bandwidth constraints.

Change-Id: I6c46d36928ecfbeaa5b568a61d3dfee9e9e0349d
 2020-11-24 14:01:33 +05:30
Veera Vegivada
5e05c42789 ARM: dts: msm: Add clock controller and gdsc nodes for sm8150 
Add support for all the clock controllers and also add
gdsc regulators.

Change-Id: Ic313db887845e43c1d69b82f6bd8af4154145832
 2020-11-24 14:00:28 +05:30
Mao Jinlong
725dae8c34 ARM: dts: msm: Add dma-coherent for tmc-etr on Lahaina 
Add dma-coherent for tmc-etr to avoid cache flush issue between etr and
usb.

Change-Id: Iba762e88442294c93c22675f2b4d2c2937c1e9dd
 2020-11-24 16:27:39 +08:00
qctecmdr
f4da5787aa Merge "ARM: dts: msm: add MX entries to qcom,bw-scale for PCIe on shima" 2020-11-23 23:23:26 -08:00
qctecmdr
111f2bcd7d Merge "ARM: dts: msm: keep PCIe in EQ Master Phase for at least 1ms on sdxlemur" 2020-11-23 23:23:26 -08:00
Sarthak Garg
6c782f4eca ARM: dts: msm: Enable NAND and SD card for sdxlemur target 
Enable NAND and SD card for all the boards available on sdxlemur target.

Change-Id: I17b3321bde161fbfbec8950d9893854912297ba9
 2020-11-24 08:49:46 +05:30
qctecmdr
b97cdd1765 Merge "ARM: dts: msm: Add dummy clock nodes for MONACO" 2020-11-23 19:13:31 -08:00
Zijun Hu
dba69406a9 ARM: dts: msm: Enable bluetooth for sdxlemur 
Enable bluetooth for sdxlemur.

CRs-Fixed: 2824381
Change-Id: I37762923eb49bfb3b3bbb19a5f088540f473f4e4
 2020-11-23 18:43:01 -08:00
Zijun Hu
0c7191e1f9 ARM: dts: msm: Add label for bluetooth bootstrap pin EDL_MODE on sdxlemur 
GPIO17 also drives bluetooth bootstrap pin EDL_MODE for sdxlemur, so
add a label for bluetooth.

CRs-Fixed: 2824381
Change-Id: I3779e8fa26e9a41b6a0a378b4ed97b7b985bd2c1
 2020-11-23 18:42:41 -08:00
Ram Chandrasekar
b50c0db4e9 ARM: dts: msm: DDR cooling device no mitigation for lahaina 
DDR cooling device right now votes for the lowest bandwidth when there
is no request from cooling device. Instead of voting to lowest level,
vote for zero bandwidth, so that it doesn't prevent sleep.

Change-Id: Ibf7895568f7c102bd4dc7267327b7decf45362e8
 2020-11-23 16:06:53 -08:00
Wu Gao
d95d897fe1 ARM: dts: msm: Support CNSS WLAN device for sdxlemur 
Support CNSS WLAN device for sdxlemur.

Change-Id: I152ecbd2064b63f15ea38cc300531371d4c0d925
 2020-11-23 21:36:34 +08:00
Saurabh Sahu
43876698d9 ARM: dts: msm: Add dummy clock nodes for MONACO 
Dummy clock nodes are required for clocks client to
request, so add support for the same. Also add the
dummy GDSCs required by clients for monaco.

Change-Id: I16e204fb2c04cbe750db25af4364a8af0b252404
 2020-11-23 17:39:19 +05:30
qctecmdr
d2558bf2ce Merge "ARM: dts: msm: Add missing memory map region for sdxlemur" 2020-11-23 03:49:18 -08:00
qctecmdr
fec81e9b29 Merge "ARM: dts: msm: Enable eMMC for sdxlemur target" 2020-11-23 03:49:18 -08:00
qctecmdr
1d9559f07e Merge "ARM: dts: msm: add spmi_debug_bus for sdxlemur" 2020-11-22 23:40:44 -08:00
qctecmdr
24c5370e70 Merge "ARM: dts: msm: Disable PMX65 VBUS_DET on sdxlemur MTP-MBB and RCM-RC boards" 2020-11-22 23:40:44 -08:00
qctecmdr
6f45296e08 Merge "ARM: dts: msm: specify thermal mitigation levels for sdxlemur platforms" 2020-11-22 23:40:43 -08:00
qctecmdr
8dd6512240 Merge "ARM: dts: msm: add gfx smmu node on yupik" 2020-11-22 23:40:43 -08:00
Sarthak Garg
c38bd24e6a ARM: dts: msm: Disable scaling for SD and eMMC on sdxlemur 
Disable scaling for SD and eMMC as for SD card the clocks were not
getting scaled properly.

Change-Id: Ic90f783ad141a9cb8e8bde10aacfd365aac3b3dc
 2020-11-22 10:59:45 +05:30
Jagadeesh Kona
be359f7620 ARM: dts: msm: Update GPUCC clock node and GDSC for YUPIK 
Update GPUCC clock node and corresponding GDSC's for YUPIK.

Change-Id: Ib5c4e21fa3e8da086689c16a3f766a869d459969
 2020-11-21 20:41:11 +05:30
Jagadeesh Kona
1ba8455681 ARM: dts: msm: Update GCC clock node and GDSC for YUPIK 
Update the global clock controller node and the corresponding
GDSC's of YUPIK. While at it, move the qcom,retain-regs property
from platform specific shima dtsi file to generic shima gdsc dtsi
file which is used by SHIMA and YUPIK.

Change-Id: Idbeea95e2a5c2cf7ac69b1f764325b2464713b18
 2020-11-21 20:36:44 +05:30
qctecmdr
c2378f1850 Merge "ARM: dts: msm: Add ion heap for monaco" 2020-11-21 06:18:43 -08:00
Patrick Daly
3d99d4f10d ARM: dts: msm: Add missing memory map region for sdxlemur 
Correct the memory map to match version 1.

Change-Id: I2da959263e0d0805b75ecc78c79b76ffaa08f41b
 2020-11-20 17:09:30 -08:00
Guru Das Srinagesh
e64f6ee14d ARM: dts: msm: Disable PMX65 VBUS_DET on sdxlemur MTP-MBB and RCM-RC boards 
On these boards, VBUS detection is through PM7250B, so disable the
VBUS_DET peripheral.

Change-Id: If408b620c296df6bf1fbfeafb96b3e720de83114
 2020-11-20 15:12:58 -08:00
qctecmdr
a98054dd60 Merge "ARM: dts: msm: Add CDSP pil node for Yupik" 2020-11-20 07:39:57 -08:00
qctecmdr
cb1c6a5c5f Merge "ARM: dts: msm: Enable SMMU and PSCI for scuba" 2020-11-20 03:39:33 -08:00
qctecmdr
152ce6a89f Merge "ARM: dts: msm: Add LPASS pil node for Yupik" 2020-11-20 03:39:33 -08:00
nishant chaubey
c3ffae6e28 ARM: dts: msm: Reduce secure heap to 30MB 
30MB memory is sufficient for fastrpc securepd usecase. 
Reduce secure heap to 30MB.

Change-Id: Ic680bfb74ff6ac37925a2c9b4edae275acc9d260
 2020-11-20 13:34:20 +05:30
Vishwanath Raju K
8059e46e26 ARM: dts: msm: Add ion heap for monaco 
Describe the memory region reserved for the ion allocator.

Change-Id: I53ce5c36dc77909fdbd8e1b2b24bd7292e6ef728
 2020-11-19 20:42:55 -08:00
Subbaraman Narayanamurthy
1afeacbe78 ARM: dts: msm: specify thermal mitigation levels for sdxlemur platforms 
Specify thermal mitigation levels for sdxlemur platforms based on
the battery used. This is used to limit charging current when
thermal SW requests different levels through charge_control_limit
property in battery power supply.

Change-Id: I2fe6142f110701b47d9f9f467a02632b20f1d7bb
 2020-11-19 20:41:24 -08:00