Commit graph

878,424 commits

Author SHA1 Message Date
Govindaraj Rajagopal
4267dcfae7 msm: cvp: avoid OOB write while accessing memory
Exclude 4 bytes which holds the size of the buffer while calculating
the actual buffer size to avoid OOB write.

Change-Id: I79704181e0bafc905064621d7cd6e682cca15982
Signed-off-by: suchawla <suchawla@codeaurora.org>
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-03-03 11:49:57 +05:30
qctecmdr
f3ed56f0e1 Merge "msm: pcie: add option to disable L1ss TO for DRV suspend" 2020-03-02 18:28:28 -08:00
qctecmdr
2194df887b Merge "msm: kgsl: Set default bus control to true" 2020-03-02 18:28:27 -08:00
qctecmdr
59c71da3d6 Merge "msm: kgsl: Make a device specific scales_bandwidth function" 2020-03-02 18:28:27 -08:00
qctecmdr
f5b276ebbd Merge "interconnect: qcom: Remove duplicate compatible string" 2020-03-02 15:30:40 -08:00
qctecmdr
1723ebdd64 Merge "msm: cvp: Add AXI reset pulse" 2020-03-02 11:58:08 -08:00
qctecmdr
e834b0464c Merge "usb: dwc3: Do not initiate remote wakeup from core layer" 2020-03-02 11:58:08 -08:00
qctecmdr
1dc2d12bba Merge "msm: kgsl: Remove the extra recovery hop" 2020-03-02 11:58:08 -08:00
qctecmdr
692509a8fa Merge "Merge fbe changes from upstream 5.4" 2020-03-02 11:58:08 -08:00
qctecmdr
0963e5d909 Merge "phy: ufs: Refactor phy_power_on and phy_calibrate callbacks" 2020-03-02 09:05:58 -08:00
qctecmdr
8b6560577f Merge "dt-bindings: clock: Add support for clock ids for SHIMA" 2020-03-02 09:05:58 -08:00
Jordan Crouse
88dcd53516 msm: kgsl: Make a device specific scales_bandwidth function
To make it easier for the upcoming change to move GMU to a component
device make a real function to test if the target is capable of
scaling the bus bandwidth on the GMU.

Change-Id: Ic0dedbad255622428de2ac01a5833a9e28c9c3ac
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-03-02 09:33:10 -07:00
qctecmdr
9ee272676c Merge "arm64: Honor limits set by boot parameter" 2020-03-02 04:36:30 -08:00
qctecmdr
1ab609531c Merge "arm64: mm: improve the mem-offline device node availability check" 2020-03-02 04:36:30 -08:00
qctecmdr
592ae25d40 Merge "defconfig: arm64: Enable data defconfigs" 2020-03-02 04:36:29 -08:00
qctecmdr
bdbcfb1ea2 Merge "msm: kgsl: Add A660 hardware clock gating register values" 2020-03-02 00:26:49 -08:00
qctecmdr
ca6ad9e77f Merge "iommu/arm-smmu: Cleanup context fault logging logic" 2020-03-02 00:26:48 -08:00
qctecmdr
fc4dced779 Merge "ion: don't wakeup refill threads for order-0 requests" 2020-03-02 00:26:48 -08:00
Can Guo
5409868760 phy: ufs: Refactor phy_power_on and phy_calibrate callbacks
Move UFS PHY calibration, starting serdes and PCS ready status polling
from phy_power_on callback to phy_calibrate callback.

Change-Id: I772978735f00ac31539eb3bec471d4d7e5f16d73
Signed-off-by: Can Guo <cang@codeaurora.org>
2020-03-01 21:04:01 -08:00
qctecmdr
201f211f2d Merge "sched: walt: Improve the scheduler" 2020-03-01 20:58:29 -08:00
Taniya Das
087303dadb dt-bindings: clock: Add support for clock ids for SHIMA
Add clock IDs for CAMCC/DISPCC/GCC/GPUCC/VIDEOCC for clients to be able to
request for clocks from these clock controllers.

Change-Id: Ic809b350cfb15d7dce4667907fe6176a7293bdcd
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-03-01 19:58:56 -08:00
qctecmdr
93655ae632 Merge "msm: ipa: Fix ipa3_wwan_xmit return type" 2020-03-01 18:13:00 -08:00
qctecmdr
36bcbe78a2 Merge "mmc: sdhci-msm: Support Retention of SDCC Regs in CX Collapse" 2020-03-01 18:13:00 -08:00
qctecmdr
2e946461cd Merge "msm: kgsl: Override UBWC configuration for A660 based on DDR type" 2020-03-01 18:13:00 -08:00
qctecmdr
4367382eb6 Merge "mm/oom-kill: Remove obsolete IS_ENABLED check" 2020-03-01 15:21:59 -08:00
Charan Teja Reddy
703ccaaab4 arm64: mm: improve the mem-offline device node availability check
Even if we use status = "disabled" in mem-offline node, still the
update_memory_limit() will go and update memory_limit variable and
thus the removed memory is never added to system as the
mem-offline driver is disabled. Correct this logic.

Change-Id: I80102830f0a5a82dcd4cddfaddb0de21bfdd0110
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-02-28 15:15:12 -08:00
Vijayanand Jitta
cdab8bbfe2 arm64: Honor limits set by boot parameter
Consider the memory limit enforced by boot parameter and
restrict adding beyond this boundary during a memory hotplug.

Change-Id: Ibd13e47ee13004381a1ddff649150fae13429c87
Signed-off-by: Vijayanand Jitta <vjitta@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-02-28 15:03:03 -08:00
George Shen
165addafd8 msm: cvp: Add AXI reset pulse
Hardware programming guide requires reset AXI clock in
CVP power on sequence.

Change-Id: Idf153e8dac1237f677c267162727173eee724317
Signed-off-by: George Shen <sqiao@codeaurora.org>
2020-02-28 14:36:51 -08:00
Mohammed Mirza Mandayappurath Manzoor
c9d8f0d483 msm: kgsl: Set default bus control to true
All the targets now do independent bus calculations.

Change-Id: Ie3303499cc4bb9a1f58c830e366a75f8f0058c42
Signed-off-by: Mohammed Mirza Mandayappurath Manzoor <mmandaya@codeaurora.org>
2020-02-28 11:26:39 -08:00
Mohammed Mirza Mandayappurath Manzoor
6888ee0104 defconfig: lahaina: Enable gpu devfreq governors on lahaina
Enable gpu governors to dynamically scale gpu frequency and bus frequency
based on gpu load.

Change-Id: I76a067a76481fa34b364c7d5699bb40168bea9de
Signed-off-by: Mohammed Mirza Mandayappurath Manzoor <mmandaya@codeaurora.org>
2020-02-28 10:23:16 -08:00
qctecmdr
41dfbf027b Merge "leds: qti-flash: Add maximum available flash current prediction" 2020-02-28 09:29:37 -08:00
qctecmdr
c6aacf321e Merge "defconfig: lahaina: enable QBT_HANDLER" 2020-02-28 07:11:58 -08:00
qctecmdr
40287648fd Merge "slim-msm-ngd: Check current state of sub system restart notifier" 2020-02-28 04:39:55 -08:00
qctecmdr
32e8550ed0 Merge "scsi: ufs-qcom: Refactor phy_power_on/off calls" 2020-02-28 04:39:55 -08:00
Prudhvi Yarlagadda
80269d295f slim-msm-ngd: Check current state of sub system restart notifier
Check for the current state of sub system restart notifier when
the LOCATOR_UP notification is given to slimbus driver and do the
slimbus initialization if the current state is already set to
SERVREG_NOTIF_SERVICE_STATE_UP_V01.

This change is needed in the cases where LOCATOR_UP notification
to slimbus driver got delayed and the state of the sub system restart
notifier is already set to SERVREG_NOTIF_SERVICE_STATE_UP_V01 as
slimbus will be expecting the SERVREG_NOTIF_SERVICE_STATE_UP_V01
notification which is not going to come as the notifier state is
already changed.

Change-Id: I4804bbb13e065ac78be7a442993286532402db9d
Signed-off-by: Prudhvi Yarlagadda <pyarlaga@codeaurora.org>
2020-02-27 23:24:25 -08:00
Prudhvi Yarlagadda
e7761f93ac slim-msm-ngd: Prevent system suspend during initialization
Prevent system suspend from happening during slimbus initialization
process where the NGD Slimbus component gets enummerated with
ADSP slimbus component and then queries the logical addresses of
the clients connected.

This is to prevent the issue where the slimbus driver goes to
suspend due to system suspend after the enumeration phase is
done after an SSR/PDR. Driver again resumes for querying logical
addresses of clients connected assuming enumeration process is
already done whereas it has to be re-enumerated as driver got
suspened and resumed.

Change-Id: I42ab3f7a6061a1c464d436aa13e43d27eb312fd4
Signed-off-by: Prudhvi Yarlagadda <pyarlaga@codeaurora.org>
2020-02-27 23:23:23 -08:00
Abir Ghosh
7db2b2ff28 defconfig: lahaina: enable QBT_HANDLER
Enable support for ultrasonic fingerprint
driver in lahaina defconfig.

Change-Id: Ib66316b7b3e6fc186f6f5a92c50e62e1332e92b8
Signed-off-by: Abir Ghosh <abirg@codeaurora.org>
2020-02-27 22:42:35 -08:00
qctecmdr
b0866600a2 Merge "scripts: gki: Ensure HOSTLD and HOSTAR are not changed" 2020-02-27 22:33:41 -08:00
qctecmdr
c84acc8ce0 Merge "scsi: ufs-qcom: Adjust the order of bus bandwidth voting and unvoting" 2020-02-27 22:33:41 -08:00
qctecmdr
fadb781fa7 Merge "arm64: defconfig: Enable the pinctrl-shima driver" 2020-02-27 22:33:40 -08:00
Shyam Kumar Thella
19b532c6ac leds: qti-flash: Add maximum available flash current prediction
Add support to calculate maximum current available for flash module.
Clients of flash LED makes use of this API qti_flash_led_prepare()
to query maximum available current for different flash LED channels.

Change-Id: I26988b1afb1e57a190aa25061189b71ca3f7ea95
Signed-off-by: Shyam Kumar Thella <sthella@codeaurora.org>
2020-02-28 10:36:59 +05:30
Abir Ghosh
a309409b03 qbt_handler: Change return type of qbt_poll
Add changes to make touch events notifier static.
Change the return type of qbt_poll from unsigned int
to __poll_t.

Change-Id: Ib43f6bb5ba77cb48d1e47e1ecd1d5b810f7c9159
Signed-off-by: Abir Ghosh <abirg@codeaurora.org>
2020-02-28 10:23:20 +05:30
Prakruthi Deepak Heragu
49983a65ef scripts: gki: Ensure HOSTLD and HOSTAR are not changed
Change the way the HOSTLD and HOSTAR are assigned in the envsetup.sh
so that the original values don't get overwritten.

Change-Id: Ia2dd91d47b1ab3a527305973a67d8b5b5368a607
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
2020-02-27 17:29:46 -08:00
Can Guo
33714450cb scsi: ufs-qcom: Refactor phy_power_on/off calls
Commit 052553af6a ("ufs/phy: qcom: Refactor to use phy_init call") puts
enabling regulators & clks, calibrating UFS PHY, starting serdes and
polling PCS ready status into phy_power_on.

Due to UFS PHY's registers are retained after power collapse, so
calibrating UFS PHY, starting serdes and polling PCS ready status need to
be done only when start hba, but not needed every time when phy_power_on
is called during resume. Keep the codes which enables PHY's regulators &
clks in phy_power_on but move the rest steps into PHY's general calibration
func, namely phy_calibrate.

Commit 3f6d1767b1 ("phy: ufs-qcom: Refactor all init steps into
phy_poweron") removes the phy_power_on/off from ufs_qcom_setup_clocks.

To have a better power saving, remove the phy_power_on/off calls from
resume/suspend path and put them back to ufs_qcom_setup_clocks, so that
PHY's regulators & clks can be turned on/off along with UFS's clocks.

At last, add a mutex lock to protect the usage of is_phy_pwr_on against
possible racing.

Change-Id: I1ed5d5d6968c3f16018e9723eab010ea7ed798b2
Signed-off-by: Can Guo <cang@codeaurora.org>
2020-02-27 16:54:51 -08:00
Can Guo
55af5bb593 scsi: ufs-qcom: Adjust the order of bus bandwidth voting and unvoting
The bus bandwidth voting is required to be done before the bus clocks
are enabled, and the unvoting is required to be done only after the bus
clocks are disabled.

Change-Id: Ie231d9c373c0d8c8f3dd90b8322ff24fabdfae26
Signed-off-by: Can Guo <cang@codeaurora.org>
2020-02-27 16:54:50 -08:00
qctecmdr
bdd1662e16 Merge "pinctrl: qcom: Add support for Shima SoC pin control" 2020-02-27 16:25:38 -08:00
qctecmdr
3ea7271f60 Merge "ASoC: compare CPU DAI stream name to find BE DAI" 2020-02-27 16:25:38 -08:00
qctecmdr
db213e8a9e Merge "trace/sched: Fix compilation issues on !SMP" 2020-02-27 16:25:37 -08:00
qctecmdr
3ad38dff23 Merge "msm: ADSPRPC: Enable Asynchronous RPC" 2020-02-27 16:25:37 -08:00
qctecmdr
e0f0b6a5db Merge "cnss2: Retry if PCI link training fails" 2020-02-27 16:25:37 -08:00