Add changes to re-apply the dma_map attributes during secure UI
to secure-video transition to avoid mismatch of attributes
between the import_attach newly created and the msm_iommu
mappings already existed.
Change-Id: I5a902d6d88c6ea9f633b4396e8121c2b14708f31
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Currently, in SST mode, sink edid is read once after hpd
and reused on subsequent mode enumeration calls. But in
MST mode, there is no caching and the driver re-reads the
edid from the sink on every get_modes call for each monitor.
Each read takes more than 500ms causing unnecessary delays
during MST enumeration.
This change reads the edid once per hpd and uses the
cached data on subsequent calls.
Change-Id: I27545a44b9f9bd40000dde60735815f9c47fa54c
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
Prior to Makena, hardware requires SW to retry FEC EN sequence when first
attempts fails. This is needed because hardware doesn't prevent FEC EN
logic to be inserted while BS symbols are sent. Which can lead to some
sink device to not being able to detect FEC EN sequence.
This change implements HPG guidelines, by monitoring FEC_STATUS and
retrying 3 times before failing the enable call.
Change-Id: I350eabe31d39f619e536ef87648874b4d58a7292
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
During ESD check failure, DSI video engine can get stuck
sending data from display engine. In use cases where GDSC
toggle does not happen like DP MST connected or secure video
playback, display does not recover back after ESD failure.
This change adds support to perform soft reset when DSI
video engine gets stuck.
Change-Id: I9cb31e6c71c4da171f9fe22fc3bee9175711831d
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Change clears the DSI TX command buffer allocated for debugfs
command transfers and destroys the command packets in case of
error during command transfer.
Change-Id: Ia1e822b9b60d44f7eba325116d416916419471fa
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This patch allows event log and display ramdump
module compilation when DEBUG_FS config is in disabled
state.
Change-Id: Ibe1ff7d9d4a4f3c64091df757caba2450295e7ec
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
The change batches DSI commands sent using the debugfs node, in a
separate buffer from the TX command buffer to ensure that they are not
triggered before the last command bit is set. Once the last command
bit is set the buffer is then copied to the DSI TX buffer and triggered.
Change-Id: I9ba624e4e19341696a974994817603315c6c8a45
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Currently, PLL_CFG1(1:0) register is updated with cached values
in dsi_pll_enable. This can create issue when UEFI and kernel
cfg1 programming is not same. To fix it, return cached value
of cfg1 when its read in pclk_mux_read, so that pclk_mux_write
is called and cached value is updated.
Change-Id: I1e45ff0685797bf4dd2e3a52af4753425f31edfc
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
When a physical DP sink is connected after a simulation
session, the attention events from the sink are ignored.
The forced_disconnect flag prevents handling of attention
events when disconnect is simulated or forced. This flag
does not get reset when a physical sink is connected.
Certain sinks which lose link integrity after link
training sequence fail to display image.
This change will reset the flag so that the attention
events which occur after the cable hotplug can be processed.
Change-Id: Ie551ead19ecff0e93da48acc2dbb1d761c55fa20
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
Currently, changing panel configuration from firmware approach is present
for single display. This change adds support for secondary display using
firmware approach.
Change-Id: I8095dceed1567d8582c7473c0ac7f59c4666a200
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
This change adds support to program both qsync and variable
refresh rate in the same atomic commit. During vrr
usecase, if qsync is enabled, avr ctrl gets programmed
during prepare phase as well as after configuring timing
engine. This change also handles such scenarios to prevent
double programming of avr ctrl.
Change-Id: I19461423b0ae08c8204b5edeb98e3d73ce16a21b
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
In current implementation qsync min fps is single value.
It is same for all the list of supported dfps list.
Added support for new dt entry dsi-supported-qsync-min-fps-list
corresponding to the fps supported in the dfps list
dsi-supported-dfps-list.
Change-Id: Ifd5309c2f51865a3c0d9fadb65cbcd291b6ef42b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Currently vblank enable/disable events are processed based
on the vm ownership check. Use the vblank helper functions
instead, during the transitions to avoid processing the
vblank from DRM framework level.
Change-Id: Icb2bd569e73d9206a234489a288320fecf631845
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add changes to extend the current evtlogs for ease
of debug purposes.
Change-Id: Ibe136afbf25b8b8decfc06ef3868e3f628df4dcb
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
This change adds support to have same panel names for dual displays.
Without this change, the secondary panel bind will fail if it has the
same panel name as primary since the primary panel debugfs directory
would have been created during its display bind and when display bind
for secondary panel is initiated with the same name it will try to
create a debugfs directory with the same name resulting in bind failure.
This change appends a string as secondary in the panel name and creates the
debugfs directory.
Change-Id: I2bd25672ce0105a3b8225bbf17e13d4e373ad10b
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Avoid crtc_state active_changed flag and explicitly check new/old
crtc_state active to decide if trusted vm transition checks are
required. As the active_changed might not be set at this point
in atomic_check sequence.
Change-Id: I142befad68359ae5ee862a1306bdc75531d63e70
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
As per current design in crtc disable sequence event thread
can cause deadlock.This change avoids mutex lock for crtc
flush event thread to flush all event work.
Change-Id: Ia7156032bee9245fe84fd1621cf1994920b8e574
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
By default use a slice height of 108 lines as it provides better
performance while maximizing compression and avoiding creating
artifacts at the slice boundary. This value is the recommended
one in VESA DSC specification and it is required for DP DSC CTS
tests with CRC validation to PASS.
Change-Id: I5c295873e4cf79f9fcf2da167a2349289118783b
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Currently, in firmware approach, the panel node is null
for secondary display. As a result, the number of display
remains one, in case of dual display also. This change
updates the number of displays.
Change-Id: I4b945b8b94d931e0dedf7ca7b27cb1a288b9d6ab
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
The lane_count used for validating the display mode
to be set is wrongly taken from the initial panel
capability. So, when lane count is reduced during
link training, the reduced lane count will not be
considered for validating supported modes. Hence
reporting incorrect display modes.
This change will use the correct lane count which
is obtained after the link training sequence.
Change-Id: Iab6239280c29961f7bc6f945ff3ecee9954b0b73
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
For phy ver 4.0 chipsets, configure DSI controller and DSI PHY to
force clk lane to HS mode always. This change was missed while
propagating from 4.19 to 5.4.
Change-Id: I60370034f7b9ed5d036d9d22f0807250afbcbcd5
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Upon receiving a CP_IRQ, the current implementation waits for up to 200
milliseconds for the link polling to be enabled, before reading the
message from the sink. This wait is currently done in the DP HDCP
module's main event thread. However, polling mode is also enabled in the
same event thread upon a wakeup triggered by the HDCP engine. This can
be problematic if the CP_IRQ comes before link has been transitioned to
the polling mode. Such a sequence of event is easily seen when executing
HDCP 2.3 CTS test 1B-09 using Unigraf UCD-400 test equipment.
To address this, wait for the polling mode to be enabled from the CP_IRQ
handler context directly and invoke the event thread only for reading
the CP_IRQ message after the link has transitioned to polling mode.
In addition to the above change, increase the wait time for link to
transition to polling mode to 300ms. This is needed because, in the
current implementation there is a fixed delay of 200ms as part of the
call to the QSEECOM API to enable encryption after the authentication is
successful.
Change-Id: I0bdd4893bf63e6ae0fcda5dfb61f23e901061207
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Reinitialize video_comp completion variable before using it again
to wait for interrupt.
Change-Id: Ifc105eaa758d85ef604a440b3be7adfdafe7fc0f
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
