Commit graph

894,303 commits

Author SHA1 Message Date
Yue Ma
55df7912d1 cnss2: Use separate DT entry to add firmware path prefix
qcom,converged-dt is meant to use one DT node which has multiple
sub-nodes to support multiple devices. There is also one simple
scenario that one same DT node can be directly used by multiple
devices without creating sub-nodes. Use separate DT entry for such
case to add firmware path prefix to simplify implementation and
avoid conflicts.

Change-Id: I3beb3dfce30d31f086eeb6667afa83560880ff32
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-03-01 18:16:24 -08:00
qctecmdr
a77dc8abd6 Merge "mmc: core: Update mmc_scale_high logic properly for HS400 mode" 2021-03-01 10:10:57 -08:00
qctecmdr
6efcd53294 Merge "mmc: core: Set the correct frequency when scaling down to DDR mode" 2021-03-01 10:10:56 -08:00
qctecmdr
0ef7ecb4c0 Merge "clk: qcom: gcc-yupik: Use floor ops for SDCC clocks" 2021-03-01 10:10:55 -08:00
qctecmdr
f2428d889d Merge "mmc: sdhci-msm: Use actual clock for mclk_freq calculation" 2021-03-01 10:10:55 -08:00
qctecmdr
67000e0bbe Merge "usb: dwc3: gadget: Bail out for short packets/ZLPs only if IOC is not set" 2021-03-01 10:10:55 -08:00
qctecmdr
562954a4b6 Merge "interconnect: qcom: update prio for gpu_tc of scshrike" 2021-03-01 10:10:54 -08:00
qctecmdr
60fc349577 Merge "mmc: host: Check for reset prior to DMA address unmap" 2021-03-01 10:10:54 -08:00
qctecmdr
d56d87abb0 Merge "msm: adsprpc: Do length check to avoid arbitrary memory access" 2021-02-28 22:04:14 -08:00
qctecmdr
1648c740e3 Merge "msm: adsprpc: Fix double fetch from fastrpc HLOS driver" 2021-02-28 22:04:14 -08:00
qctecmdr
131e38d699 Merge "drivers: llcc: Disable MMUHWT retention" 2021-02-28 22:04:14 -08:00
qctecmdr
71b383810a Merge "defconfig: Enable linux bridge on gen3auto config" 2021-02-28 22:04:13 -08:00
qctecmdr
3a7028cbf4 Merge "arm64: defconfig: Add mproc related defconfig for sa6155" 2021-02-28 22:04:13 -08:00
qctecmdr
600ea62bc0 Merge "defconfig: Disable CONFIG_CNSS2_DEBUG for perf build" 2021-02-28 22:04:13 -08:00
qctecmdr
30ca003d16 Merge "leds: qcom-clk: Add support to set default trigger for LED" 2021-02-28 22:04:12 -08:00
qctecmdr
0ad563f877 Merge "Bluetooth: Free the XO clk GPIO after use" 2021-02-28 22:04:12 -08:00
qctecmdr
d4490ffc9b Merge "defconfig: enable rimps plh interface" 2021-02-28 22:04:12 -08:00
qctecmdr
1f84d24c6a Merge "drivers: soc: qcom: Add slatecom driver" 2021-02-28 22:04:11 -08:00
wadesong
9ce85c9c9b defconfig: Enable linux bridge on gen3auto config
Enable linux bridge on QGKI builds to support multi-AP bridge mode.

Change-Id: I1c8278b3ca29d973ea5350028c8f065370e91271
Signed-off-by: wadesong <wadesong@codeaurora.org>
2021-03-01 09:56:56 +08:00
Arun Prakash
4b91711f77 arm64: defconfig: Add mproc related defconfig for sa6155
Add mproc related defconfig for sa8155 which inlcudes
qrtr,hwspinlock,mailbox,glink,smem,smp2p,ipc irq bridge
and ipc logging related configurations.

Change-Id: I64e8feea35a0acabf48e538dfe9e7bdd3b547b11
Signed-off-by: Arun Prakash <app@codeaurora.org>
2021-02-28 23:42:11 +05:30
Ajay Agarwal
12658022a9 usb: dwc3: gadget: Bail out for short packets/ZLPs only if IOC is not set
Currently the driver explicitly clears the HWO bit of the TRB
prepared for short packet or ZLP for EPs in both the directions,
and returns with non-zero code which breaks cleanup of completed
requests. The driver does this because it is written with the
understanding that the HW does not clear HWO for such packets.
But the databook section 4.2.3.2 says that the HW does not clear
HWO for such packets on the OUT EP only.

Now consider a device-to-host(USB IN) usecase like SW NCM, where
the u_ether driver looks for interrupt on every 5th request(say).
In between these 5 requests, if there is any packet of multiple
of MPS, then ZLP TRB will also be prepared. When the event is
received for the 5th request, we will only handle upto the ZLP
TRB because of the faulty logic described above. And only on the
event for the 10th request, we handle the 5th request (because of
IOC set on the 5th request). So, clearly the TRB cleanup logic is
lagging behind the HW actually completing the requests. When this
mismatch happens multiple times, there eventually comes a time
when the SW does not have any free requests anymore and hence
stall will be seen.

Fix this by returning with non-zero code only if the IOC bit is
set for the short packet or ZLP TRB, so that the cleanup routine
continues upto the TRB for which the event was raised.

Change-Id: I984e6de383993fc3c2da6b74147d6f50e081de34
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
2021-02-28 06:18:59 -08:00
Veera Vegivada
aa9cd16cb5 leds: qcom-clk: Add support to set default trigger for LED
Add property to configure the default trigger for the LED.
This will allow clients to use trigger APIs to configure
the brightness of the LED if needed.

Change-Id: I1db0a5f2d697c6ac6f6ae1296e43ae55509f2298
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2021-02-27 13:36:34 +05:30
qctecmdr
607818c6ab Merge "drivers: MAX31760: disable VDD of MAX31760 and fan in RBC" 2021-02-26 11:11:01 -08:00
qctecmdr
ebc88295bf Merge "drivers: soc: qcom: rimps_memlat: add configs to get PMU/AMU count" 2021-02-26 11:11:00 -08:00
qctecmdr
42fa1dcf73 Merge "scsi: ufs: remove voting for hw ice clk" 2021-02-26 11:11:00 -08:00
qctecmdr
2e0d151b3f Merge "soc: qcom: Add support to read apps stats from smem" 2021-02-26 11:10:59 -08:00
qctecmdr
557f5fe6f2 Merge "defconfig: arm: qcom: Enable thermal drivers for sdxnightjar" 2021-02-26 11:10:59 -08:00
qctecmdr
5751df3b77 Merge "defconfig: quinvm: Enable HGSL" 2021-02-26 11:10:59 -08:00
qctecmdr
ce5a393067 Merge "defconfig: gen3auto: Enable led-qcom-clk driver" 2021-02-26 06:40:50 -08:00
qctecmdr
df8b48b300 Merge "pinctrl: Update GPIOs for wake capability disablement" 2021-02-26 06:40:50 -08:00
qctecmdr
1b59f1001f Merge "pinctrl: qcom: Enable clock while configuring slpi tlmm registers" 2021-02-26 06:40:50 -08:00
qctecmdr
4255c3c603 Merge "msm: pcie: add support for gcc_aggre_noc_pcie_*_axi_clk" 2021-02-26 06:40:49 -08:00
qctecmdr
6a7f9fe1d0 Merge "usb: f_gsi: Clean up low memory buffer size/depth definitions" 2021-02-26 06:40:49 -08:00
qctecmdr
695b140e10 Merge "atlantic forwarding driver v1.1.15" 2021-02-26 06:40:48 -08:00
Gaurav Singh
08643a099a defconfig: enable rimps plh interface
Enables SCMI PLH protocol, SCMI client and
CPUCP PLH interface.

Change-Id: Ia9765c0a3574cf585d6a70bb76af21268bd81b3d
Signed-off-by: Gaurav Singh <sgaurav@codeaurora.org>
2021-02-26 06:39:38 -08:00
Ajit Kumar
a3d4f5d5c3 drivers: soc: qcom: Add slatecom driver
slatecom driver provides a set of apis to perform
register, fifo, ahb read and write operations with
slate coprocessor over spi interface.
slatecom driver is ported from bgcom driver.

Change-Id: Ibaacf4748d893511196e4a66ed17ff26a854809b
Signed-off-by: Ajit Kumar <kajit@codeaurora.org>
2021-02-26 19:36:10 +05:30
Manaf Meethalavalappu Pallikunhi
88082dddc5 defconfig: arm: qcom: Enable thermal drivers for sdxnightjar
Enable thermal drivers like TSENS, userspace, QMI cooling device
driver and regulator cooling device driver for sdxnightjar.

Change-Id: I6a5c8d32b584ee9c9786e5037499d8f50ea1bc48
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
2021-02-26 17:45:50 +05:30
qctecmdr
ca57039ff7 Merge "defconfig: Enable generic serial driver on sdxlemur" 2021-02-26 02:48:47 -08:00
qctecmdr
5d32b21daf Merge "defconfig: sm6150: Enable SDC_QTI config flag" 2021-02-26 02:48:46 -08:00
qctecmdr
c44e3414e4 Merge "mhi: core: Increase RDDM timeout to 250ms" 2021-02-26 02:48:46 -08:00
qctecmdr
cdced88eab Merge "cnss2: Export remote memory info" 2021-02-26 02:48:46 -08:00
qctecmdr
49f75290c2 Merge "Bluetooth: Update power sources for auto BT SoCs" 2021-02-26 02:48:45 -08:00
Santosh Mardi
a1e161fc46 drivers: soc: qcom: rimps_memlat: add configs to get PMU/AMU count
Add CONFIG options to get the number of AMUs and PMUs supported on
a given target to define the size of structures accordingly in driver.

Change-Id: I6ed58465f789156887a28bd49da7220396854e50
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
2021-02-26 15:30:07 +05:30
Naina Mehta
2d0ea1fd0e drivers: llcc: Disable MMUHWT retention
Disable MMUHWT retention on power collapse.

Change-Id: I4ea3e2c0322c2fb214548bbdb0e98a653ab932dc
Signed-off-by: Naina Mehta <nainmeht@codeaurora.org>
2021-02-26 00:36:46 -08:00
qctecmdr
efcfcec441 Merge "dcc_v2: suppress the log for dcc list on success" 2021-02-25 22:06:56 -08:00
qctecmdr
93d8db2eb7 Merge "msm: kgsl: Add snapshot memory region in minidump only once" 2021-02-25 22:06:55 -08:00
qctecmdr
b3589b508b Merge "msm: Add config option for Realtek R8125 IOSS glue driver" 2021-02-25 22:06:54 -08:00
qctecmdr
bfd929085d Merge "msm: ipa: IPAv5 ULSO" 2021-02-25 22:06:54 -08:00
qctecmdr
655caac9ea Merge "drivers: pinctrl: Add custom GPIO to PDC pin mapping list support" 2021-02-25 22:06:54 -08:00
qctecmdr
e6e68d5386 Merge "Revert "Fallback to dma_alloc_coherent if shmbridge is disabled"" 2021-02-25 22:06:53 -08:00