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874,492 commits

Author SHA1 Message Date
David Dai
614bbc4d3b cpufreq: qcom-hw: use no_log when reading cpu counter val
Use the no_log version of readl_relaxed when reading out the
counter values for CPUs to reduce the amount of logging in
RTB Logs. Scheduler activity is very frequent and clogs up the
buffer, which can potentially reduce the amount of useful logs.

Change-Id: Ib5c7595c8bae1822837c3b1f1ae56fdc3c612933
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-11 09:14:06 +05:30
Ram Chandrasekar
6297328964 cpufreq: qcom-hw: Add ready callback to register CPU cooling device
Add a ready callback, which will be called when a CPU policy is ready.
As a part of this callback, register the corresponding CPU cooling
device.

Change-Id: Ic12e0a8f7cd13fda583844454e3a0eb600a2cad3
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2019-12-11 09:14:05 +05:30
Ram Chandrasekar
74e7ed3831 cpufreq: qcom-hw: Register child devices
Register child devices once a successful probe is done. This
will enable the dependent child devices to be probed immediately after
the cpufreq probe is done.

Change-Id: I9108636e1e6ad03bb6f5add9da9ba5507248c129
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2019-12-11 09:14:05 +05:30
David Dai
7663559af5 cpufreq: qcom-hw: add cycle counter support
The scheduler needs a way to track cpu cycle counts,
return the total cycle count by adding the difference between
the current cycle count and the previous from reading the EPSS
cycle counters.

Change-Id: Ifacdb0fe8fb9c692322d3ef7fcd25c6c5d5cd4f3
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-11 09:14:04 +05:30
David Dai
6523e1a94c cpufreq: qcom-hw: remove check for hw enable during probe
Given that there are no issues selecting a desired_state before
EPSS is enabled for a particular cluster, let's skip the check
for enable bit on clusters to give better flexibility to the
cpufreq driver to probe successfully on configuration where
not all clusters are enabled.

Change-Id: I3548c5390f899e5a1108d00c00e24837726c9543
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2019-12-11 09:14:04 +05:30
Pavankumar Kondeti
12a9b84eee cpufreq: qcom-hw: Notify the current frequency to the topology driver
The topology driver keeps track of the current capacity of a CPU and
make it available via arch_scale_freq_capacity(). The PELT load
tracking in the scheduler and energy-aware task placement are the
clients of this API. Hence notify the new frequency to the topology
driver during frequency transition.

Change-Id: Ia0890956f59082496e7d5d7ba8a9c09b343e44ec
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
[satyap@codeaurora.org: resolve trivial merge conflict]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2019-12-11 09:14:03 +05:30
Pavankumar Kondeti
0aa9086a40 cpufreq: qcom-hw: Set dvfs_possible_from_any_cpu cpufreq driver flag
As remote cpufreq updates are supported on MSM platforms, set
dvfs_possible_from_any_cpu cpufreq driver flag.

Change-Id: I0ae9f130ad37654967ce754390152a9dbd0ec80b
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:03 +05:30
Satya Durga Srinivasu Prabhala
45f308f0cf cpufreq: qcom-hw: register with Energy Model framework
To be able to use Energy Model based on values supplied in DT
for "dynamic-power-coefficient" property, need to register with
Energy Model framework. This is to make placement decisions
based on Energy Model by Energy Aware Scheduler (EAS).

Change-Id: Iecc5c12bec2bf5e50d405cf43b501537274249df
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:02 +05:30
Taniya Das
91dbad4a60 cpufreq: qcom: Read voltage LUT and populate OPP
Add support to read the voltage look up table and populate OPP for all
corresponding CPUs.

Change-Id: I8b4cb9199db3aa202b9855237943f04675ec3e33
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:02 +05:30
David Dai
e05fb5b5a4 cpufreq: qcom-hw: use pre-defined core count for max cores
In order to support core boost where core counts is different than
the number of cores in the same frequency domain, use a predefined
value to determine max core count.

Change-Id: I076940b9b77f75ef1e5419bc3175635fb02a7549
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:14:01 +05:30
Taniya Das
ed7c3ccb4a cpufreq: qcom: Add snapshot of cpufreq-hw
This is snapshot of the cpufreq-hw as of msm-4.19
'commit b75185bdb985 ("cpufreq: qcom-hw:
Add support for QCOM cpufreq HW driver")'.

Change-Id: Ibd5bcf763513ba959e67eb736e707f30d30a41b0
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2019-12-11 09:12:27 +05:30
qctecmdr
7db9be171f Merge "firmware: qcom_scm-32: Use qcom_scm_desc in non-atomic calls" 2019-11-16 06:18:21 -08:00
qctecmdr
fe159bfa5a Merge "firmware: qcom_scm-32: Use SMC arch wrappers" 2019-11-16 05:42:55 -08:00
qctecmdr
37d4fdf777 Merge "firmware: qcom_scm-64: Improve SMC convention detection" 2019-11-16 05:07:59 -08:00
qctecmdr
9a5a88e8e4 Merge "firmware: qcom_scm-64: Fill SMC registers in qcom_scm_call_smccc" 2019-11-16 04:29:15 -08:00
qctecmdr
1e486afe4d Merge "firmware: qcom_scm-64: Remove qcom_scm_call_do_smccc" 2019-11-16 03:45:29 -08:00
qctecmdr
1bf368ea9f Merge "firmware: qcom_scm-64: Add SCM results to descriptor" 2019-11-16 03:01:59 -08:00
qctecmdr
2fecbc3812 Merge "firmware: qcom_scm-64: Move svc/cmd/owner into qcom_scm_desc" 2019-11-16 02:27:45 -08:00
qctecmdr
dc9a5781ad Merge "firmware: qcom_scm: Remove unused qcom_scm_get_version" 2019-11-16 01:46:20 -08:00
qctecmdr
25a16eb963 Merge "firmware: qcom_scm: Order functions, definitions by svc/cmd" 2019-11-16 01:12:08 -08:00
qctecmdr
ac0d8084e8 Merge "firmware: qcom_scm: Apply consistent naming scheme to command IDs" 2019-11-16 00:39:01 -08:00
qctecmdr
1951d5023d Merge "firmware: qcom_scm-64: Make SMCCC macros less magical" 2019-11-15 23:57:19 -08:00
qctecmdr
86d26b10fa Merge "firmware: qcom_scm: Add funcnum IDs" 2019-11-15 23:24:20 -08:00
qctecmdr
0115d870b8 Merge "firmware: qcom_scm: Rename macros and structures" 2019-11-15 22:48:28 -08:00
qctecmdr
01982fba17 Merge "firmware/qcom_scm: Add scm call to handle smmu errata" 2019-11-15 22:06:18 -08:00
qctecmdr
2c87407cf7 Merge "msm: ipa4: Fix to overcome KW issues" 2019-11-15 20:26:53 -08:00
qctecmdr
47acbf95eb Merge "soc: qcom: secure_buffer: Add missing dma_unmap_single" 2019-11-15 18:49:04 -08:00
qctecmdr
7165f40b45 Merge "arm64: defconfig: Enable CVP driver" 2019-11-15 18:10:52 -08:00
George Shen
293f99a9cf arm64: defconfig: Enable CVP driver
Enable CVP driver for Lahaina.

Change-Id: I7ee692c24595ac3c436203c9ebb12c1b9844da68
Signed-off-by: George Shen <sqiao@codeaurora.org>
2019-11-15 14:45:33 -08:00
Chris Goldsworthy
903fe10e59 soc: qcom: secure_buffer: Add missing dma_unmap_single
Add a missing dma_unmap_single() that was accidentally deleted when adding
tracepoints in the secure_buffer driver.

Change-Id: I8159bee354b4debffb2a55165d2e543d5979daff
Signed-off-by: Chris Goldsworthy <cgoldswo@codeaurora.org>
2019-11-15 14:08:45 -08:00
Elliot Berman
b6d0faef1b firmware: qcom_scm-32: Use qcom_scm_desc in non-atomic calls
Use qcom_scm_desc in non-atomic calls to remove legacy convention
details from every SCM wrapper function.

Change-Id: I6962d86b0a8edcedf0d7fe7700794aa8bfdac430
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
b2c9a7b7b6 firmware: qcom_scm-32: Use SMC arch wrappers
Use SMC arch wrappers instead of inline assembly.

Change-Id: Ia8b8518f842462eb3f7e0d3200497431ca9c2c4e
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
ea0f09d683 firmware: qcom_scm-64: Improve SMC convention detection
Improve the calling convention detection to use qcom_scm_call_atomic
and not blindly assume 32-bit mode if the checks fails.

__qcom_scm_is_call_available() cannot be used directly here as we want
an atomic variant of is_call_available(). This is also a necessary
requirement later when merging in legacy convention.

Change-Id: I66beec550d05afde6c680d256183e8ad207d7268
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
6b99839901 firmware: qcom_scm-64: Fill SMC registers in qcom_scm_call_smccc
qcom_scm_call_smccc should be responsible for converting qcom_scm_desc
into arguments for smc call. Consolidate the dispersed logic to convert
qcom_scm_desc into smc arguments inside qcom_scm_call_smccc.

Change-Id: Ieae23c5fc6c77dbd76ef28dc4040b0f64de872c0
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
8853f6612d firmware: qcom_scm-64: Remove qcom_scm_call_do_smccc
Remove thin wrapper to qcom_scm_call_do_smccc because it doesn't do
enough of anything interesting to dedicate its own function.

Change-Id: Ia726336e4dc14f0a473a86d6c15605a4a020b055
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
abe9598276 firmware: qcom_scm-64: Add SCM results to descriptor
Remove knowledge of arm_smccc_res struct from client wrappers so that
client wrappers only work QCOM SCM data structures. SCM calls may have
up to 3 arguments, so qcom_scm_call_smccc is responsible now for filling
those 3 arguments accordingly.

Change-Id: I9712f75f6bea0a6528ccd5a69bc1602493574e19
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
40ea361077 firmware: qcom_scm-64: Move svc/cmd/owner into qcom_scm_desc
Service, command, and owner IDs are all part of qcom_scm_desc struct and
have no special reason to be a function argument (or hard-coded in the
case of owner). Moving them to be part of qcom_scm_desc struct improves
readability.

Change-Id: I422e5b0c2c117ff4eafc80f16b34874ff86643d3
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
22afda04ff firmware: qcom_scm: Remove unused qcom_scm_get_version
Remove unused qcom_scm_get_version.

Change-Id: I7e638d3ece7a2d52b51f570bb680cf3c5dcdc347
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
7254c9cde6 firmware: qcom_scm: Order functions, definitions by svc/cmd
Definitions throughout qcom_scm are loosely grouped and loosely ordered.
Sort all the functions/definitions by service ID/command ID to improve
sanity when needing to add new functionality to this driver.

Change-Id: I698443e8e650d4bc9e65ac27d68c46d1e45ba8e3
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
2cfb4a6532 firmware: qcom_scm: Apply consistent naming scheme to command IDs
Create a consistent naming scheme for command IDs. The scheme is
QCOM_SCM_##svc_##cmd. Remove unused macros QCOM_SCM_FLAG_HLOS,
QCOM_SCM_FLAG_COLDBOOT_MC, QCOM_SCM_FLAG_WARMBOOT_MC,
QCOM_SCM_CMD_CORE_HOTPLUGGED, and QCOM_SCM_BOOT_ADDR_MC.

Change-Id: I88cb9ff6d29ec253a853422557a31856fae7477c
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
414a9a7c81 firmware: qcom_scm-64: Make SMCCC macros less magical
Improve understandability of SMCCC macros as they are all functions of
how many arguments can be shoved in registers and how many SCM arguments
are supported.

Change-Id: Iac0378fc4c5e20943a64b98223d53caa4955dd53
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
4d2296c9e6 firmware: qcom_scm: Add funcnum IDs
Add LEGACY_FUNCNUM to qcom_scm-32.c and move SMCCC_FUNCNUM closer to
other smccc-specific macros.

Change-Id: I385f0b5ba31cb14e304617d5aa67b37dc3c33c9c
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
5f79bd2348 firmware: qcom_scm: Rename macros and structures
Rename legacy-specific structures and macros with legacy prefix; rename
smccc-specific structures and macros with smccc prefix.

Change-Id: I501e38377f063e2ee27c1bc4b0a17426bb6e556e
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Vivek Gautam
ae18db422f firmware/qcom_scm: Add scm call to handle smmu errata
Qcom's smmu-500 needs to toggle wait-for-safe sequence to
handle TLB invalidation sync's.
Few firmwares allow doing that through SCM interface.
Add API to toggle wait for safe from firmware through a
SCM call.

Change-Id: I425b4dda32f285996178540e551e3168c51da610
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Andy Gross <agross@kernel.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Patch-mainline: https://lore.kernel.org/patchwork/patch/1129993/
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Vivek Gautam
c5691b4772 firmware: qcom_scm-64: Add atomic version of qcom_scm_call
There are scnenarios where drivers are required to make a
scm call in atomic context, such as in one of the qcom's
arm-smmu-500 errata [1].

[1] ("https://source.codeaurora.org/quic/la/kernel/msm-4.9/
      tree/drivers/iommu/arm-smmu.c?h=msm-4.9#n4842")

Change-Id: I5b313e6629a7ea54055c2cd83d439f5f0d9069c1
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Andy Gross <agross@kernel.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Patch-mainline: https://lore.kernel.org/patchwork/patch/1129992/
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
Elliot Berman
839919c528 defconfig: Enable QCOM_SCM on Lahaina QGKI
Enable QCOM_SCM on Lahaina QGKI.

Change-Id: I57c187810b1f234faf3548a8f17c915e259492ea
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-11-15 11:03:52 -08:00
qctecmdr
e22d4b67e1 Merge "spi: spi-msm-geni: Add SPI GENI driver snapshot" 2019-11-15 03:16:12 -08:00
qctecmdr
d6ed6ac63f Merge "soc: qcom: Add snapshot of watchdog driver" 2019-11-14 22:21:53 -08:00
qctecmdr
aed96b0763 Merge "defconfig: lahaina: Add QTI_PMIC_GLINK driver" 2019-11-14 21:47:07 -08:00
qctecmdr
1a9ad884b2 Merge "soc: qcom: Add PMIC Glink driver" 2019-11-14 21:13:38 -08:00